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authorSteve Reinhardt <stever@eecs.umich.edu>2006-09-05 16:24:47 -0400
committerSteve Reinhardt <stever@eecs.umich.edu>2006-09-05 16:24:47 -0400
commit6c7a490c2b779ea45adfc5708f50aa16718582e4 (patch)
tree3633153645f9f885e8155ba740ef7aaa1a221650 /tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual
parent89f0bc9e4c6e1c0bc58f5f5a88cdac5889758b1f (diff)
downloadgem5-6c7a490c2b779ea45adfc5708f50aa16718582e4.tar.xz
Update reference config.ini files to include port mappings.
--HG-- extra : convert_revision : f9e91a60fa09b707d2a26be57f265b7ab1c07263
Diffstat (limited to 'tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual')
-rw-r--r--tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini42
-rw-r--r--tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt8
-rw-r--r--tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout4
3 files changed, 48 insertions, 6 deletions
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini
index 430daba54..ae7a71c8c 100644
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini
@@ -67,6 +67,8 @@ delay=0
queue_size_a=16
queue_size_b=16
write_ack=false
+side_a=system.iobus.port[0]
+side_b=system.membus.port[0]
[system.cpu0]
type=TimingSimpleCPU
@@ -85,6 +87,8 @@ max_loads_any_thread=0
mem=system.physmem
profile=0
system=system
+dcache_port=system.membus.port[3]
+icache_port=system.membus.port[2]
[system.cpu0.dtb]
type=AlphaDTB
@@ -111,6 +115,8 @@ max_loads_any_thread=0
mem=system.physmem
profile=0
system=system
+dcache_port=system.membus.port[5]
+icache_port=system.membus.port[4]
[system.cpu1.dtb]
type=AlphaDTB
@@ -165,16 +171,20 @@ cpu=system.cpu0
[system.iobus]
type=Bus
bus_id=0
+default=system.tsunami.pciconfig.pio
+port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.console.pio system.tsunami.ide.pio system.tsunami.ide.dma system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.dma system.tsunami.ethernet.config
[system.membus]
type=Bus
bus_id=1
+port=system.bridge.side_b system.physmem.port system.cpu0.icache_port system.cpu0.dcache_port system.cpu1.icache_port system.cpu1.dcache_port
[system.physmem]
type=PhysicalMemory
file=
latency=1
range=0:134217727
+port=system.membus.port[1]
[system.sim_console]
type=SimConsole
@@ -213,6 +223,7 @@ pio_latency=2
platform=system.tsunami
system=system
tsunami=system.tsunami
+pio=system.iobus.port[1]
[system.tsunami.console]
type=AlphaConsole
@@ -223,6 +234,7 @@ pio_latency=2
platform=system.tsunami
sim_console=system.sim_console
system=system
+pio=system.iobus.port[25]
[system.tsunami.etherint]
type=NSGigEInt
@@ -258,6 +270,9 @@ system=system
tx_delay=2000
tx_fifo_size=524288
tx_thread=false
+config=system.iobus.port[31]
+dma=system.iobus.port[30]
+pio=system.iobus.port[29]
[system.tsunami.ethernet.configdata]
type=PciConfigData
@@ -301,6 +316,7 @@ pio_latency=2
pio_size=393216
platform=system.tsunami
system=system
+pio=system.iobus.port[9]
[system.tsunami.fake_ata0]
type=IsaFake
@@ -309,6 +325,7 @@ pio_latency=2
pio_size=8
platform=system.tsunami
system=system
+pio=system.iobus.port[20]
[system.tsunami.fake_ata1]
type=IsaFake
@@ -317,6 +334,7 @@ pio_latency=2
pio_size=8
platform=system.tsunami
system=system
+pio=system.iobus.port[21]
[system.tsunami.fake_pnp_addr]
type=IsaFake
@@ -325,6 +343,7 @@ pio_latency=2
pio_size=8
platform=system.tsunami
system=system
+pio=system.iobus.port[10]
[system.tsunami.fake_pnp_read0]
type=IsaFake
@@ -333,6 +352,7 @@ pio_latency=2
pio_size=8
platform=system.tsunami
system=system
+pio=system.iobus.port[12]
[system.tsunami.fake_pnp_read1]
type=IsaFake
@@ -341,6 +361,7 @@ pio_latency=2
pio_size=8
platform=system.tsunami
system=system
+pio=system.iobus.port[13]
[system.tsunami.fake_pnp_read2]
type=IsaFake
@@ -349,6 +370,7 @@ pio_latency=2
pio_size=8
platform=system.tsunami
system=system
+pio=system.iobus.port[14]
[system.tsunami.fake_pnp_read3]
type=IsaFake
@@ -357,6 +379,7 @@ pio_latency=2
pio_size=8
platform=system.tsunami
system=system
+pio=system.iobus.port[15]
[system.tsunami.fake_pnp_read4]
type=IsaFake
@@ -365,6 +388,7 @@ pio_latency=2
pio_size=8
platform=system.tsunami
system=system
+pio=system.iobus.port[16]
[system.tsunami.fake_pnp_read5]
type=IsaFake
@@ -373,6 +397,7 @@ pio_latency=2
pio_size=8
platform=system.tsunami
system=system
+pio=system.iobus.port[17]
[system.tsunami.fake_pnp_read6]
type=IsaFake
@@ -381,6 +406,7 @@ pio_latency=2
pio_size=8
platform=system.tsunami
system=system
+pio=system.iobus.port[18]
[system.tsunami.fake_pnp_read7]
type=IsaFake
@@ -389,6 +415,7 @@ pio_latency=2
pio_size=8
platform=system.tsunami
system=system
+pio=system.iobus.port[19]
[system.tsunami.fake_pnp_write]
type=IsaFake
@@ -397,6 +424,7 @@ pio_latency=2
pio_size=8
platform=system.tsunami
system=system
+pio=system.iobus.port[11]
[system.tsunami.fake_ppc]
type=IsaFake
@@ -405,6 +433,7 @@ pio_latency=2
pio_size=8
platform=system.tsunami
system=system
+pio=system.iobus.port[8]
[system.tsunami.fake_sm_chip]
type=IsaFake
@@ -413,6 +442,7 @@ pio_latency=2
pio_size=8
platform=system.tsunami
system=system
+pio=system.iobus.port[3]
[system.tsunami.fake_uart1]
type=IsaFake
@@ -421,6 +451,7 @@ pio_latency=2
pio_size=8
platform=system.tsunami
system=system
+pio=system.iobus.port[4]
[system.tsunami.fake_uart2]
type=IsaFake
@@ -429,6 +460,7 @@ pio_latency=2
pio_size=8
platform=system.tsunami
system=system
+pio=system.iobus.port[5]
[system.tsunami.fake_uart3]
type=IsaFake
@@ -437,6 +469,7 @@ pio_latency=2
pio_size=8
platform=system.tsunami
system=system
+pio=system.iobus.port[6]
[system.tsunami.fake_uart4]
type=IsaFake
@@ -445,6 +478,7 @@ pio_latency=2
pio_size=8
platform=system.tsunami
system=system
+pio=system.iobus.port[7]
[system.tsunami.fb]
type=BadDevice
@@ -453,6 +487,7 @@ pio_addr=8804615848912
pio_latency=2
platform=system.tsunami
system=system
+pio=system.iobus.port[22]
[system.tsunami.ide]
type=IdeController
@@ -466,6 +501,9 @@ pci_func=0
pio_latency=2
platform=system.tsunami
system=system
+config=system.iobus.port[28]
+dma=system.iobus.port[27]
+pio=system.iobus.port[26]
[system.tsunami.ide.configdata]
type=PciConfigData
@@ -511,6 +549,7 @@ platform=system.tsunami
system=system
time=1136073600
tsunami=system.tsunami
+pio=system.iobus.port[23]
[system.tsunami.pchip]
type=TsunamiPChip
@@ -519,6 +558,7 @@ pio_latency=2
platform=system.tsunami
system=system
tsunami=system.tsunami
+pio=system.iobus.port[2]
[system.tsunami.pciconfig]
type=PciConfigAll
@@ -527,6 +567,7 @@ pio_latency=1
platform=system.tsunami
size=16777216
system=system
+pio=system.iobus.default
[system.tsunami.uart]
type=Uart8250
@@ -535,6 +576,7 @@ pio_latency=2
platform=system.tsunami
sim_console=system.sim_console
system=system
+pio=system.iobus.port[24]
[trace]
bufsize=0
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt
index 1dc674569..666766e20 100644
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt
@@ -1,9 +1,9 @@
---------- Begin Simulation Statistics ----------
-host_inst_rate 845052 # Simulator instruction rate (inst/s)
-host_mem_usage 194484 # Number of bytes of host memory used
-host_seconds 74.66 # Real time elapsed on the host
-host_tick_rate 47409778 # Simulator tick rate (ticks/s)
+host_inst_rate 804715 # Simulator instruction rate (inst/s)
+host_mem_usage 194628 # Number of bytes of host memory used
+host_seconds 78.40 # Real time elapsed on the host
+host_tick_rate 45146741 # Simulator tick rate (ticks/s)
sim_freq 2000000000 # Frequency of simulated ticks
sim_insts 63088076 # Number of instructions simulated
sim_seconds 1.769718 # Number of seconds simulated
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout
index 47e826dde..33c194686 100644
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout
@@ -5,8 +5,8 @@ The Regents of The University of Michigan
All Rights Reserved
-M5 compiled Aug 17 2006 23:41:21
-M5 started Thu Aug 17 23:51:44 2006
+M5 compiled Sep 5 2006 15:32:34
+M5 started Tue Sep 5 15:45:11 2006
M5 executing on zizzer.eecs.umich.edu
command line: build/ALPHA_FS/m5.opt -d build/ALPHA_FS/tests/opt/quick/10.linux-boot/alpha/linux/tsunami-simple-timing-dual tests/run.py quick/10.linux-boot/alpha/linux/tsunami-simple-timing-dual
Exiting @ tick 3539435029 because m5_exit instruction encountered