diff options
author | Steve Reinhardt <stever@gmail.com> | 2009-02-16 12:09:45 -0500 |
---|---|---|
committer | Steve Reinhardt <stever@gmail.com> | 2009-02-16 12:09:45 -0500 |
commit | 89ea32325094665c16688212b5a2cd7b7bbf5f03 (patch) | |
tree | 2259a04ed0e6c700096d8f662726c51a2c6da525 /tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini | |
parent | 89a7fb03934b3e38c7d8b2c4818794b3ec874fdf (diff) | |
download | gem5-89ea32325094665c16688212b5a2cd7b7bbf5f03.tar.xz |
Update stats for new prefetching fixes.
Prefetching is not enabled in any of our regressions, so no significant
stat values have changed, but zero-valued prefetch stats no longer
show up when prefetching is disabled so there are noticable changes
in the reference stat files anyway.
Diffstat (limited to 'tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini')
-rw-r--r-- | tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini | 27 |
1 files changed, 19 insertions, 8 deletions
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini index 3e8e04375..468bf0248 100644 --- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini +++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini @@ -36,6 +36,7 @@ side_b=system.membus.port[0] [system.cpu] type=TimingSimpleCPU children=dcache dtb icache interrupts itb tracer +checker=Null clock=500 cpu_id=0 defer_registration=false @@ -71,12 +72,11 @@ latency=1000 max_miss_count=0 mem_side_filter_ranges= mshrs=4 -prefetch_access=false prefetch_cache_check_push=true prefetch_data_accesses_only=false prefetch_degree=1 prefetch_latency=10000 -prefetch_miss=false +prefetch_on_access=false prefetch_past_page=false prefetch_policy=none prefetch_serial_squash=false @@ -108,12 +108,11 @@ latency=1000 max_miss_count=0 mem_side_filter_ranges= mshrs=4 -prefetch_access=false prefetch_cache_check_push=true prefetch_data_accesses_only=false prefetch_degree=1 prefetch_latency=10000 -prefetch_miss=false +prefetch_on_access=false prefetch_past_page=false prefetch_policy=none prefetch_serial_squash=false @@ -151,6 +150,7 @@ image=system.disk0.image type=CowDiskImage children=child child=system.disk0.image.child +image_file= read_only=false table_size=65536 @@ -170,6 +170,7 @@ image=system.disk2.image type=CowDiskImage children=child child=system.disk2.image.child +image_file= read_only=false table_size=65536 @@ -204,12 +205,11 @@ latency=50000 max_miss_count=0 mem_side_filter_ranges=0:18446744073709551615 mshrs=20 -prefetch_access=false prefetch_cache_check_push=true prefetch_data_accesses_only=false prefetch_degree=1 prefetch_latency=500000 -prefetch_miss=false +prefetch_on_access=false prefetch_past_page=false prefetch_policy=none prefetch_serial_squash=false @@ -237,12 +237,11 @@ latency=10000 max_miss_count=0 mem_side_filter_ranges= mshrs=92 -prefetch_access=false prefetch_cache_check_push=true prefetch_data_accesses_only=false prefetch_degree=1 prefetch_latency=100000 -prefetch_miss=false +prefetch_on_access=false prefetch_past_page=false prefetch_policy=none prefetch_serial_squash=false @@ -372,16 +371,22 @@ pio=system.iobus.port[1] [system.tsunami.ethernet] type=NSGigE BAR0=1 +BAR0LegacyIO=false BAR0Size=256 BAR1=0 +BAR1LegacyIO=false BAR1Size=4096 BAR2=0 +BAR2LegacyIO=false BAR2Size=0 BAR3=0 +BAR3LegacyIO=false BAR3Size=0 BAR4=0 +BAR4LegacyIO=false BAR4Size=0 BAR5=0 +BAR5LegacyIO=false BAR5Size=0 BIST=0 CacheLineSize=0 @@ -750,16 +755,22 @@ pio=system.iobus.port[22] [system.tsunami.ide] type=IdeController BAR0=1 +BAR0LegacyIO=false BAR0Size=8 BAR1=1 +BAR1LegacyIO=false BAR1Size=4 BAR2=1 +BAR2LegacyIO=false BAR2Size=8 BAR3=1 +BAR3LegacyIO=false BAR3Size=4 BAR4=1 +BAR4LegacyIO=false BAR4Size=16 BAR5=1 +BAR5LegacyIO=false BAR5Size=0 BIST=0 CacheLineSize=0 |