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authorSteve Reinhardt <stever@gmail.com>2007-08-03 18:04:30 -0400
committerSteve Reinhardt <stever@gmail.com>2007-08-03 18:04:30 -0400
commitbb3f7dc83b9a4c7b20aeb893fea447854c855225 (patch)
tree17d17b775e1155fa42725df488ddd22a3ce65af8 /tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini
parent851e3c852be4eb031293ed271502a0e14ca9273f (diff)
downloadgem5-bb3f7dc83b9a4c7b20aeb893fea447854c855225.tar.xz
tests: new ref outputs for new cache model
--HG-- extra : convert_revision : 244749072f97e425c2ca1cf296f2b95f37e99eb6
Diffstat (limited to 'tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini')
-rw-r--r--tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini38
1 files changed, 9 insertions, 29 deletions
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini
index c726f11fe..1992f65a2 100644
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini
@@ -35,7 +35,7 @@ side_b=system.membus.port[0]
[system.cpu]
type=TimingSimpleCPU
-children=dcache dtb icache itb
+children=dcache dtb icache itb tracer
clock=500
cpu_id=0
defer_registration=false
@@ -54,17 +54,15 @@ phase=0
profile=0
progress_interval=0
system=system
+tracer=system.cpu.tracer
dcache_port=system.cpu.dcache.cpu_side
icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
-children=protocol
-adaptive_compression=false
+addr_range=0:18446744073709551615
assoc=4
block_size=64
-compressed_bus=false
-compression_latency=0
hash_delay=1
latency=1000
lifo=false
@@ -82,12 +80,10 @@ prefetch_serial_squash=false
prefetch_use_cpu_id=true
prefetcher_size=100
prioritizeRequests=false
-protocol=system.cpu.dcache.protocol
repl=Null
size=32768
split=false
split_size=0
-store_compressed=false
subblock_size=0
tgts_per_mshr=8
trace_addr=0
@@ -96,23 +92,15 @@ write_buffers=8
cpu_side=system.cpu.dcache_port
mem_side=system.toL2Bus.port[2]
-[system.cpu.dcache.protocol]
-type=CoherenceProtocol
-do_upgrades=true
-protocol=moesi
-
[system.cpu.dtb]
type=AlphaDTB
size=64
[system.cpu.icache]
type=BaseCache
-children=protocol
-adaptive_compression=false
+addr_range=0:18446744073709551615
assoc=1
block_size=64
-compressed_bus=false
-compression_latency=0
hash_delay=1
latency=1000
lifo=false
@@ -130,12 +118,10 @@ prefetch_serial_squash=false
prefetch_use_cpu_id=true
prefetcher_size=100
prioritizeRequests=false
-protocol=system.cpu.icache.protocol
repl=Null
size=32768
split=false
split_size=0
-store_compressed=false
subblock_size=0
tgts_per_mshr=8
trace_addr=0
@@ -144,15 +130,13 @@ write_buffers=8
cpu_side=system.cpu.icache_port
mem_side=system.toL2Bus.port[1]
-[system.cpu.icache.protocol]
-type=CoherenceProtocol
-do_upgrades=true
-protocol=moesi
-
[system.cpu.itb]
type=AlphaITB
size=48
+[system.cpu.tracer]
+type=ExeTracer
+
[system.disk0]
type=IdeDisk
children=image
@@ -207,11 +191,9 @@ port=system.bridge.side_a system.tsunami.cchip.pio system.tsunami.pchip.pio syst
[system.l2c]
type=BaseCache
-adaptive_compression=false
+addr_range=0:18446744073709551615
assoc=8
block_size=64
-compressed_bus=false
-compression_latency=0
hash_delay=1
latency=10000
lifo=false
@@ -229,12 +211,10 @@ prefetch_serial_squash=false
prefetch_use_cpu_id=true
prefetcher_size=100
prioritizeRequests=false
-protocol=Null
repl=Null
size=4194304
split=false
split_size=0
-store_compressed=false
subblock_size=0
tgts_per_mshr=16
trace_addr=0
@@ -798,7 +778,7 @@ pio_addr=8804615847936
pio_latency=1000
platform=system.tsunami
system=system
-time=2009 1 1 0 0 0 3 1
+time=Thu Jan 1 00:00:00 2009
tsunami=system.tsunami
year_is_bcd=false
pio=system.iobus.port[23]