update for small parameter and statistics name changes

--HG--
extra : convert_revision : d538b79986c11a462ab285c167cef45dd793da32

5 files changed, 16 insertions, 16 deletions

diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini
index ded525737..c726f11fe 100644
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini
@@ -74,7 +74,7 @@ prefetch_access=false
 prefetch_cache_check_push=true
 prefetch_data_accesses_only=false
 prefetch_degree=1
-prefetch_latency=10
+prefetch_latency=10000
 prefetch_miss=false
 prefetch_past_page=false
 prefetch_policy=none
@@ -122,7 +122,7 @@ prefetch_access=false
 prefetch_cache_check_push=true
 prefetch_data_accesses_only=false
 prefetch_degree=1
-prefetch_latency=10
+prefetch_latency=10000
 prefetch_miss=false
 prefetch_past_page=false
 prefetch_policy=none
@@ -221,7 +221,7 @@ prefetch_access=false
 prefetch_cache_check_push=true
 prefetch_data_accesses_only=false
 prefetch_degree=1
-prefetch_latency=10
+prefetch_latency=100000
 prefetch_miss=false
 prefetch_past_page=false
 prefetch_policy=none
@@ -252,7 +252,7 @@ clock=1000
 responder_set=false
 width=64
 default=system.membus.responder.pio
-port=system.bridge.side_b system.physmem.port system.l2c.mem_side
+port=system.bridge.side_b system.physmem.port[0] system.l2c.mem_side
 
 [system.membus.responder]
 type=IsaFake
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out
index b51eb234e..e0e32bce4 100644
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out
@@ -86,7 +86,7 @@ prefetch_access=false
 prefetcher_size=100
 prefetch_past_page=false
 prefetch_serial_squash=false
-prefetch_latency=10
+prefetch_latency=100000
 prefetch_degree=1
 prefetch_policy=none
 prefetch_cache_check_push=true
@@ -722,7 +722,7 @@ prefetch_access=false
 prefetcher_size=100
 prefetch_past_page=false
 prefetch_serial_squash=false
-prefetch_latency=10
+prefetch_latency=10000
 prefetch_degree=1
 prefetch_policy=none
 prefetch_cache_check_push=true
@@ -764,7 +764,7 @@ prefetch_access=false
 prefetcher_size=100
 prefetch_past_page=false
 prefetch_serial_squash=false
-prefetch_latency=10
+prefetch_latency=10000
 prefetch_degree=1
 prefetch_policy=none
 prefetch_cache_check_push=true
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt
index d9f42b16b..f72789e4b 100644
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt
@@ -1,9 +1,8 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                 212380                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 201984                       # Number of bytes of host memory used
-host_seconds                                   282.69                       # Real time elapsed on the host
-host_tick_rate                             6746442466                       # Simulator tick rate (ticks/s)
+host_inst_rate                                  62427                       # Simulator instruction rate (inst/s)
+host_seconds                                   961.73                       # Real time elapsed on the host
+host_tick_rate                             1983042717                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                    60037406                       # Number of instructions simulated
 sim_seconds                                  1.907146                       # Number of seconds simulated
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stderr b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stderr
index 072cb6c8c..f34493a86 100644
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stderr
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stderr
@@ -1,3 +1,3 @@
 Listening for system connection on port 3456
-0: system.remote_gdb.listener: listening for remote gdb on port 7000
+0: system.remote_gdb.listener: listening for remote gdb #0 on port 7000
 warn: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stdout b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stdout
index b8196fe27..db9ad862d 100644
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stdout
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stdout
@@ -5,9 +5,10 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled May 15 2007 19:06:05
-M5 started Tue May 15 19:07:53 2007
-M5 executing on zizzer.eecs.umich.edu
-command line: build/ALPHA_FS/m5.fast -d build/ALPHA_FS/tests/fast/quick/10.linux-boot/alpha/linux/tsunami-simple-timing tests/run.py quick/10.linux-boot/alpha/linux/tsunami-simple-timing
+M5 compiled Jun 10 2007 14:10:03
+M5 started Mon Jun 11 01:14:34 2007
+M5 executing on iceaxe
+command line: /Users/nate/build/outgoing/build/ALPHA_FS/m5.debug -d /Users/nate/build/outgoing/build/ALPHA_FS/tests/debug/quick/10.linux-boot/alpha/linux/tsunami-simple-timing tests/run.py quick/10.linux-boot/alpha/linux/tsunami-simple-timing
 Global frequency set at 1000000000000 ticks per second
+      0: system.tsunami.io.rtc: Real-time clock set to Thu Jan  1 00:00:00 2009
 Exiting @ tick 1907146437000 because m5_exit instruction encountered