Update stats for new prefetching fixes.

Prefetching is not enabled in any of our regressions, so no significant
stat values have changed, but zero-valued prefetch stats no longer
show up when prefetching is disabled so there are noticable changes
in the reference stat files anyway.

4 files changed, 31 insertions, 55 deletions

diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini
index 3e8e04375..468bf0248 100644
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini
@@ -36,6 +36,7 @@ side_b=system.membus.port[0]
 [system.cpu]
 type=TimingSimpleCPU
 children=dcache dtb icache interrupts itb tracer
+checker=Null
 clock=500
 cpu_id=0
 defer_registration=false
@@ -71,12 +72,11 @@ latency=1000
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=4
-prefetch_access=false
 prefetch_cache_check_push=true
 prefetch_data_accesses_only=false
 prefetch_degree=1
 prefetch_latency=10000
-prefetch_miss=false
+prefetch_on_access=false
 prefetch_past_page=false
 prefetch_policy=none
 prefetch_serial_squash=false
@@ -108,12 +108,11 @@ latency=1000
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=4
-prefetch_access=false
 prefetch_cache_check_push=true
 prefetch_data_accesses_only=false
 prefetch_degree=1
 prefetch_latency=10000
-prefetch_miss=false
+prefetch_on_access=false
 prefetch_past_page=false
 prefetch_policy=none
 prefetch_serial_squash=false
@@ -151,6 +150,7 @@ image=system.disk0.image
 type=CowDiskImage
 children=child
 child=system.disk0.image.child
+image_file=
 read_only=false
 table_size=65536
 
@@ -170,6 +170,7 @@ image=system.disk2.image
 type=CowDiskImage
 children=child
 child=system.disk2.image.child
+image_file=
 read_only=false
 table_size=65536
 
@@ -204,12 +205,11 @@ latency=50000
 max_miss_count=0
 mem_side_filter_ranges=0:18446744073709551615
 mshrs=20
-prefetch_access=false
 prefetch_cache_check_push=true
 prefetch_data_accesses_only=false
 prefetch_degree=1
 prefetch_latency=500000
-prefetch_miss=false
+prefetch_on_access=false
 prefetch_past_page=false
 prefetch_policy=none
 prefetch_serial_squash=false
@@ -237,12 +237,11 @@ latency=10000
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=92
-prefetch_access=false
 prefetch_cache_check_push=true
 prefetch_data_accesses_only=false
 prefetch_degree=1
 prefetch_latency=100000
-prefetch_miss=false
+prefetch_on_access=false
 prefetch_past_page=false
 prefetch_policy=none
 prefetch_serial_squash=false
@@ -372,16 +371,22 @@ pio=system.iobus.port[1]
 [system.tsunami.ethernet]
 type=NSGigE
 BAR0=1
+BAR0LegacyIO=false
 BAR0Size=256
 BAR1=0
+BAR1LegacyIO=false
 BAR1Size=4096
 BAR2=0
+BAR2LegacyIO=false
 BAR2Size=0
 BAR3=0
+BAR3LegacyIO=false
 BAR3Size=0
 BAR4=0
+BAR4LegacyIO=false
 BAR4Size=0
 BAR5=0
+BAR5LegacyIO=false
 BAR5Size=0
 BIST=0
 CacheLineSize=0
@@ -750,16 +755,22 @@ pio=system.iobus.port[22]
 [system.tsunami.ide]
 type=IdeController
 BAR0=1
+BAR0LegacyIO=false
 BAR0Size=8
 BAR1=1
+BAR1LegacyIO=false
 BAR1Size=4
 BAR2=1
+BAR2LegacyIO=false
 BAR2Size=8
 BAR3=1
+BAR3LegacyIO=false
 BAR3Size=4
 BAR4=1
+BAR4LegacyIO=false
 BAR4Size=16
 BAR5=1
+BAR5LegacyIO=false
 BAR5Size=0
 BIST=0
 CacheLineSize=0
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simerr b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simerr
index 1a557daf8..83c71fc5c 100755
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simerr
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simerr
@@ -1,4 +1,5 @@
-warn: kernel located at: /dist/m5/system/binaries/vmlinux
 warn: Sockets disabled, not accepting terminal connections
+For more information see: http://www.m5sim.org/warn/8742226b
 warn: Sockets disabled, not accepting gdb connections
-warn: be nice to actually delete the event here
+For more information see: http://www.m5sim.org/warn/d946bea6
+hack: be nice to actually delete the event here
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simout b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simout
index b196d52a3..ba86a45b9 100755
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simout
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simout
@@ -5,12 +5,12 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Dec 14 2008 21:47:07
-M5 revision 5776:07905796d7bea4187139808b7de687a99cbc3141
-M5 commit date Sun Dec 14 21:45:15 2008 -0800
-M5 started Dec 14 2008 21:47:59
-M5 executing on tater
+M5 compiled Feb 16 2009 00:15:24
+M5 revision d8c62c2eaaa6 5874 default qtip pf1 tip qbase
+M5 started Feb 16 2009 00:15:52
+M5 executing on zizzer
 command line: build/ALPHA_FS/m5.fast -d build/ALPHA_FS/tests/fast/quick/10.linux-boot/alpha/linux/tsunami-simple-timing -re tests/run.py quick/10.linux-boot/alpha/linux/tsunami-simple-timing
 Global frequency set at 1000000000000 ticks per second
+info: kernel located at: /dist/m5/system/binaries/vmlinux
 info: Entering event queue @ 0.  Starting simulation...
 Exiting @ tick 1930164593000 because m5_exit instruction encountered
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stats.txt b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stats.txt
index 76e60eed0..cbf231e85 100644
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stats.txt
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                 715830                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 287924                       # Number of bytes of host memory used
-host_seconds                                    78.52                       # Real time elapsed on the host
-host_tick_rate                            24582295405                       # Simulator tick rate (ticks/s)
+host_inst_rate                                1953289                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 288556                       # Number of bytes of host memory used
+host_seconds                                    28.78                       # Real time elapsed on the host
+host_tick_rate                            67077404616                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                    56205703                       # Number of instructions simulated
 sim_seconds                                  1.930165                       # Number of seconds simulated
@@ -88,15 +88,6 @@ system.cpu.dcache.overall_mshr_miss_rate     0.097749                       # ms
 system.cpu.dcache.overall_mshr_misses         1471029                       # number of overall MSHR misses
 system.cpu.dcache.overall_mshr_uncacheable_latency   2064006500                       # number of overall MSHR uncacheable cycles
 system.cpu.dcache.overall_mshr_uncacheable_misses            0                       # number of overall MSHR uncacheable misses
-system.cpu.dcache.prefetcher.num_hwpf_already_in_cache            0                       # number of hwpf that were already in the cache
-system.cpu.dcache.prefetcher.num_hwpf_already_in_mshr            0                       # number of hwpf that were already in mshr
-system.cpu.dcache.prefetcher.num_hwpf_already_in_prefetcher            0                       # number of hwpf that were already in the prefetch queue
-system.cpu.dcache.prefetcher.num_hwpf_evicted            0                       # number of hwpf removed due to no buffer left
-system.cpu.dcache.prefetcher.num_hwpf_identified            0                       # number of hwpf identified
-system.cpu.dcache.prefetcher.num_hwpf_issued            0                       # number of hwpf issued
-system.cpu.dcache.prefetcher.num_hwpf_removed_MSHR_hit            0                       # number of hwpf removed because MSHR allocated
-system.cpu.dcache.prefetcher.num_hwpf_span_page            0                       # number of hwpf spanning a virtual page
-system.cpu.dcache.prefetcher.num_hwpf_squashed_from_miss            0                       # number of hwpf that got squashed due to a miss aborting calculation time
 system.cpu.dcache.replacements                1391606                       # number of replacements
 system.cpu.dcache.sampled_refs                1392118                       # Sample count of references to valid blocks.
 system.cpu.dcache.soft_prefetch_mshr_full            0                       # number of mshr full events for SW prefetching instrutions
@@ -162,15 +153,6 @@ system.cpu.icache.overall_mshr_miss_rate     0.016562                       # ms
 system.cpu.icache.overall_mshr_misses          931101                       # number of overall MSHR misses
 system.cpu.icache.overall_mshr_uncacheable_latency            0                       # number of overall MSHR uncacheable cycles
 system.cpu.icache.overall_mshr_uncacheable_misses            0                       # number of overall MSHR uncacheable misses
-system.cpu.icache.prefetcher.num_hwpf_already_in_cache            0                       # number of hwpf that were already in the cache
-system.cpu.icache.prefetcher.num_hwpf_already_in_mshr            0                       # number of hwpf that were already in mshr
-system.cpu.icache.prefetcher.num_hwpf_already_in_prefetcher            0                       # number of hwpf that were already in the prefetch queue
-system.cpu.icache.prefetcher.num_hwpf_evicted            0                       # number of hwpf removed due to no buffer left
-system.cpu.icache.prefetcher.num_hwpf_identified            0                       # number of hwpf identified
-system.cpu.icache.prefetcher.num_hwpf_issued            0                       # number of hwpf issued
-system.cpu.icache.prefetcher.num_hwpf_removed_MSHR_hit            0                       # number of hwpf removed because MSHR allocated
-system.cpu.icache.prefetcher.num_hwpf_span_page            0                       # number of hwpf spanning a virtual page
-system.cpu.icache.prefetcher.num_hwpf_squashed_from_miss            0                       # number of hwpf that got squashed due to a miss aborting calculation time
 system.cpu.icache.replacements                 930429                       # number of replacements
 system.cpu.icache.sampled_refs                 930940                       # Sample count of references to valid blocks.
 system.cpu.icache.soft_prefetch_mshr_full            0                       # number of mshr full events for SW prefetching instrutions
@@ -337,15 +319,6 @@ system.iocache.overall_mshr_miss_rate               1                       # ms
 system.iocache.overall_mshr_misses              41725                       # number of overall MSHR misses
 system.iocache.overall_mshr_uncacheable_latency            0                       # number of overall MSHR uncacheable cycles
 system.iocache.overall_mshr_uncacheable_misses            0                       # number of overall MSHR uncacheable misses
-system.iocache.prefetcher.num_hwpf_already_in_cache            0                       # number of hwpf that were already in the cache
-system.iocache.prefetcher.num_hwpf_already_in_mshr            0                       # number of hwpf that were already in mshr
-system.iocache.prefetcher.num_hwpf_already_in_prefetcher            0                       # number of hwpf that were already in the prefetch queue
-system.iocache.prefetcher.num_hwpf_evicted            0                       # number of hwpf removed due to no buffer left
-system.iocache.prefetcher.num_hwpf_identified            0                       # number of hwpf identified
-system.iocache.prefetcher.num_hwpf_issued            0                       # number of hwpf issued
-system.iocache.prefetcher.num_hwpf_removed_MSHR_hit            0                       # number of hwpf removed because MSHR allocated
-system.iocache.prefetcher.num_hwpf_span_page            0                       # number of hwpf spanning a virtual page
-system.iocache.prefetcher.num_hwpf_squashed_from_miss            0                       # number of hwpf that got squashed due to a miss aborting calculation time
 system.iocache.replacements                     41685                       # number of replacements
 system.iocache.sampled_refs                     41701                       # Sample count of references to valid blocks.
 system.iocache.soft_prefetch_mshr_full              0                       # number of mshr full events for SW prefetching instrutions
@@ -423,15 +396,6 @@ system.l2c.overall_mshr_miss_rate            0.263528                       # ms
 system.l2c.overall_mshr_misses                 612229                       # number of overall MSHR misses
 system.l2c.overall_mshr_uncacheable_latency   1857972500                       # number of overall MSHR uncacheable cycles
 system.l2c.overall_mshr_uncacheable_misses            0                       # number of overall MSHR uncacheable misses
-system.l2c.prefetcher.num_hwpf_already_in_cache            0                       # number of hwpf that were already in the cache
-system.l2c.prefetcher.num_hwpf_already_in_mshr            0                       # number of hwpf that were already in mshr
-system.l2c.prefetcher.num_hwpf_already_in_prefetcher            0                       # number of hwpf that were already in the prefetch queue
-system.l2c.prefetcher.num_hwpf_evicted              0                       # number of hwpf removed due to no buffer left
-system.l2c.prefetcher.num_hwpf_identified            0                       # number of hwpf identified
-system.l2c.prefetcher.num_hwpf_issued               0                       # number of hwpf issued
-system.l2c.prefetcher.num_hwpf_removed_MSHR_hit            0                       # number of hwpf removed because MSHR allocated
-system.l2c.prefetcher.num_hwpf_span_page            0                       # number of hwpf spanning a virtual page
-system.l2c.prefetcher.num_hwpf_squashed_from_miss            0                       # number of hwpf that got squashed due to a miss aborting calculation time
 system.l2c.replacements                        394928                       # number of replacements
 system.l2c.sampled_refs                        425903                       # Sample count of references to valid blocks.
 system.l2c.soft_prefetch_mshr_full                  0                       # number of mshr full events for SW prefetching instrutions