diff options
author | Ali Saidi <Ali.Saidi@ARM.com> | 2011-05-04 20:38:28 -0500 |
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committer | Ali Saidi <Ali.Saidi@ARM.com> | 2011-05-04 20:38:28 -0500 |
commit | fea2c26402894aa26de7b7d8e14fe71070b76296 (patch) | |
tree | e0fda155959ce40d9528ef511c47ee851de516fb /tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/config.ini | |
parent | cefd6960e5312c27b613dcb783c66539baa0307d (diff) | |
download | gem5-fea2c26402894aa26de7b7d8e14fe71070b76296.tar.xz |
ARM: Update ARM_FS stats for mp changes
Diffstat (limited to 'tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/config.ini')
-rw-r--r-- | tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/config.ini | 25 |
1 files changed, 20 insertions, 5 deletions
diff --git a/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/config.ini b/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/config.ini index 5e47cea73..8d1301d9c 100644 --- a/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/config.ini +++ b/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/config.ini @@ -9,12 +9,17 @@ time_sync_spin_threshold=100000000 type=LinuxArmSystem children=bridge cpu diskmem intrctrl iobus iocache l2c membus physmem realview terminal toL2Bus vncserver boot_cpu_frequency=500 +boot_loader= +boot_loader_mem=Null boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB slram=slram0,0x8000000,+0x8000000 mtdparts=slram0:- root=/dev/mtdblock0 +flags_addr=0 +gic_cpu_addr=0 init_param=0 kernel=/chips/pd/randd/dist/binaries/vmlinux.arm load_addr_mask=268435455 machine_type=RealView_PBX mem_mode=timing +midr_regval=890236928 physmem=system.physmem readfile=tests/halt.sh symbolfile= @@ -218,7 +223,7 @@ trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.iobus.port[25] -mem_side=system.membus.port[5] +mem_side=system.membus.port[6] [system.l2c] type=BaseCache @@ -250,7 +255,7 @@ trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.toL2Bus.port[0] -mem_side=system.membus.port[6] +mem_side=system.membus.port[7] [system.membus] type=Bus @@ -262,7 +267,7 @@ header_cycles=1 use_default_range=false width=64 default=system.membus.badaddr_responder.pio -port=system.bridge.side_b system.diskmem.port[0] system.physmem.port[0] system.realview.gic.pio system.realview.l2x0_fake.pio system.iocache.mem_side system.l2c.mem_side +port=system.bridge.side_b system.diskmem.port[0] system.physmem.port[0] system.realview.gic.pio system.realview.l2x0_fake.pio system.realview.a9scu.pio system.iocache.mem_side system.l2c.mem_side [system.membus.badaddr_responder] type=IsaFake @@ -292,10 +297,18 @@ port=system.membus.port[2] [system.realview] type=RealView -children=aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake mmc_fake realview_io rtc_fake sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake +children=a9scu aaci_fake cf_ctrl clcd dmac_fake flash_fake gic gpio0_fake gpio1_fake gpio2_fake kmi0 kmi1 l2x0_fake mmc_fake realview_io rtc_fake sci_fake smc_fake sp810_fake ssp_fake timer0 timer1 uart uart1_fake uart2_fake uart3_fake watchdog_fake intrctrl=system.intrctrl system=system +[system.realview.a9scu] +type=A9SCU +pio_addr=520093696 +pio_latency=1000 +platform=system.realview +system=system +pio=system.membus.port[5] + [system.realview.aaci_fake] type=AmbaFake amba_id=0 @@ -392,7 +405,7 @@ pio=system.iobus.port[9] type=IsaFake pio_addr=1073741824 pio_latency=1000 -pio_size=67108864 +pio_size=536870912 platform=system.realview ret_bad_addr=false ret_data16=65535 @@ -410,6 +423,7 @@ cpu_addr=520093952 cpu_pio_delay=10000 dist_addr=520097792 dist_pio_delay=10000 +int_latency=10000 it_lines=128 platform=system.realview system=system @@ -501,6 +515,7 @@ pio=system.iobus.port[22] [system.realview.realview_io] type=RealViewCtrl +idreg=0 pio_addr=268435456 pio_latency=1000 platform=system.realview |