tests: update stats for name changes

8 files changed, 32 insertions, 32 deletions

diff --git a/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/config.ini b/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/config.ini
index 22389fff7..fa239be0f 100644
--- a/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/config.ini
+++ b/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/config.ini
@@ -11,7 +11,7 @@ children=bridge cpu diskmem intrctrl iobus iocache l2c membus physmem realview t
 boot_cpu_frequency=500
 boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB slram=slram0,0x8000000,+0x8000000 mtdparts=slram0:- root=/dev/mtdblock0 
 init_param=0
-kernel=/chips/pd/randd/dist/binaries/vmlinux.arm
+kernel=/dist/m5/system/binaries/vmlinux.arm
 load_addr_mask=268435455
 machine_type=RealView_PBX
 mem_mode=atomic
@@ -169,7 +169,7 @@ type=ExeTracer
 
 [system.diskmem]
 type=PhysicalMemory
-file=/chips/pd/randd/dist/disks/ael-arm.ext2
+file=/dist/m5/system/disks/ael-arm.ext2
 latency=30000
 latency_var=0
 null=false
diff --git a/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/simout b/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/simout
index fcaeba8a4..b43a524ba 100755
--- a/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/simout
+++ b/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/simout
@@ -5,11 +5,11 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Apr  4 2011 11:17:23
-M5 started Apr  4 2011 11:17:27
-M5 executing on u200439-lin.austin.arm.com
-command line: build/ARM_FS/m5.opt -d build/ARM_FS/tests/opt/quick/10.linux-boot/arm/linux/realview-simple-atomic -re tests/run.py build/ARM_FS/tests/opt/quick/10.linux-boot/arm/linux/realview-simple-atomic
+M5 compiled Apr 19 2011 13:41:05
+M5 started Apr 19 2011 13:41:08
+M5 executing on maize
+command line: build/ARM_FS/m5.fast -d build/ARM_FS/tests/fast/quick/10.linux-boot/arm/linux/realview-simple-atomic -re tests/run.py build/ARM_FS/tests/fast/quick/10.linux-boot/arm/linux/realview-simple-atomic
 Global frequency set at 1000000000000 ticks per second
-info: kernel located at: /chips/pd/randd/dist/binaries/vmlinux.arm
+info: kernel located at: /dist/m5/system/binaries/vmlinux.arm
 info: Entering event queue @ 0.  Starting simulation...
 Exiting @ tick 26405524500 because m5_exit instruction encountered
diff --git a/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/stats.txt b/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/stats.txt
index ef25e7d53..1d1cbe8c6 100644
--- a/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/stats.txt
+++ b/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                1925695                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 381972                       # Number of bytes of host memory used
-host_seconds                                    27.06                       # Real time elapsed on the host
-host_tick_rate                              975977117                       # Simulator tick rate (ticks/s)
+host_inst_rate                                3981428                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 333640                       # Number of bytes of host memory used
+host_seconds                                    13.09                       # Real time elapsed on the host
+host_tick_rate                             2017840381                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                    52100192                       # Number of instructions simulated
 sim_seconds                                  0.026406                       # Number of seconds simulated
@@ -67,8 +67,8 @@ system.cpu.dcache.demand_mshr_misses                0                       # nu
 system.cpu.dcache.fast_writes                       0                       # number of fast writes performed
 system.cpu.dcache.mshr_cap_events                   0                       # number of times MSHR cap was activated
 system.cpu.dcache.no_allocate_misses                0                       # Number of misses that were no-allocate
-system.cpu.dcache.occ_%::0                   0.999487                       # Average percentage of cache occupancy
 system.cpu.dcache.occ_blocks::0            511.737186                       # Average occupied blocks per context
+system.cpu.dcache.occ_percent::0             0.999487                       # Average percentage of cache occupancy
 system.cpu.dcache.overall_accesses::0        14508425                       # number of overall (read+write) accesses
 system.cpu.dcache.overall_accesses::1               0                       # number of overall (read+write) accesses
 system.cpu.dcache.overall_accesses::total     14508425                       # number of overall (read+write) accesses
@@ -164,8 +164,8 @@ system.cpu.icache.demand_mshr_misses                0                       # nu
 system.cpu.icache.fast_writes                       0                       # number of fast writes performed
 system.cpu.icache.mshr_cap_events                   0                       # number of times MSHR cap was activated
 system.cpu.icache.no_allocate_misses                0                       # Number of misses that were no-allocate
-system.cpu.icache.occ_%::0                   0.930522                       # Average percentage of cache occupancy
 system.cpu.icache.occ_blocks::0            476.427204                       # Average occupied blocks per context
+system.cpu.icache.occ_percent::0             0.930522                       # Average percentage of cache occupancy
 system.cpu.icache.overall_accesses::0        41566870                       # number of overall (read+write) accesses
 system.cpu.icache.overall_accesses::1               0                       # number of overall (read+write) accesses
 system.cpu.icache.overall_accesses::total     41566870                       # number of overall (read+write) accesses
@@ -374,10 +374,10 @@ system.l2c.demand_mshr_misses                       0                       # nu
 system.l2c.fast_writes                              0                       # number of fast writes performed
 system.l2c.mshr_cap_events                          0                       # number of times MSHR cap was activated
 system.l2c.no_allocate_misses                       0                       # Number of misses that were no-allocate
-system.l2c.occ_%::0                          0.076949                       # Average percentage of cache occupancy
-system.l2c.occ_%::1                          0.477056                       # Average percentage of cache occupancy
 system.l2c.occ_blocks::0                  5042.918302                       # Average occupied blocks per context
 system.l2c.occ_blocks::1                 31264.310783                       # Average occupied blocks per context
+system.l2c.occ_percent::0                    0.076949                       # Average percentage of cache occupancy
+system.l2c.occ_percent::1                    0.477056                       # Average percentage of cache occupancy
 system.l2c.overall_accesses::0                 843462                       # number of overall (read+write) accesses
 system.l2c.overall_accesses::1                   6142                       # number of overall (read+write) accesses
 system.l2c.overall_accesses::total             849604                       # number of overall (read+write) accesses
diff --git a/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/status b/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/status
index 586cb6b73..53b01d583 100644
--- a/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/status
+++ b/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/status
@@ -1 +1 @@
-build/ARM_FS/tests/opt/quick/10.linux-boot/arm/linux/realview-simple-atomic FAILED!
+build/ARM_FS/tests/fast/quick/10.linux-boot/arm/linux/realview-simple-atomic FAILED!
diff --git a/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/config.ini b/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/config.ini
index 5e47cea73..6cf3e5508 100644
--- a/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/config.ini
+++ b/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/config.ini
@@ -11,7 +11,7 @@ children=bridge cpu diskmem intrctrl iobus iocache l2c membus physmem realview t
 boot_cpu_frequency=500
 boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB slram=slram0,0x8000000,+0x8000000 mtdparts=slram0:- root=/dev/mtdblock0 
 init_param=0
-kernel=/chips/pd/randd/dist/binaries/vmlinux.arm
+kernel=/dist/m5/system/binaries/vmlinux.arm
 load_addr_mask=268435455
 machine_type=RealView_PBX
 mem_mode=timing
@@ -166,7 +166,7 @@ type=ExeTracer
 
 [system.diskmem]
 type=PhysicalMemory
-file=/chips/pd/randd/dist/disks/ael-arm.ext2
+file=/dist/m5/system/disks/ael-arm.ext2
 latency=30000
 latency_var=0
 null=false
diff --git a/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/simout b/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/simout
index fee47a4d1..397e3f68f 100755
--- a/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/simout
+++ b/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/simout
@@ -5,11 +5,11 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Apr  4 2011 11:17:23
-M5 started Apr  4 2011 11:17:27
-M5 executing on u200439-lin.austin.arm.com
-command line: build/ARM_FS/m5.opt -d build/ARM_FS/tests/opt/quick/10.linux-boot/arm/linux/realview-simple-timing -re tests/run.py build/ARM_FS/tests/opt/quick/10.linux-boot/arm/linux/realview-simple-timing
+M5 compiled Apr 19 2011 13:41:05
+M5 started Apr 19 2011 13:41:07
+M5 executing on maize
+command line: build/ARM_FS/m5.fast -d build/ARM_FS/tests/fast/quick/10.linux-boot/arm/linux/realview-simple-timing -re tests/run.py build/ARM_FS/tests/fast/quick/10.linux-boot/arm/linux/realview-simple-timing
 Global frequency set at 1000000000000 ticks per second
-info: kernel located at: /chips/pd/randd/dist/binaries/vmlinux.arm
+info: kernel located at: /dist/m5/system/binaries/vmlinux.arm
 info: Entering event queue @ 0.  Starting simulation...
 Exiting @ tick 114405702000 because m5_exit instruction encountered
diff --git a/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/stats.txt b/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/stats.txt
index 6471ce023..1213d5a93 100644
--- a/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/stats.txt
+++ b/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                 936835                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 382000                       # Number of bytes of host memory used
-host_seconds                                    54.69                       # Real time elapsed on the host
-host_tick_rate                             2092010024                       # Simulator tick rate (ticks/s)
+host_inst_rate                                1969505                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 333648                       # Number of bytes of host memory used
+host_seconds                                    26.01                       # Real time elapsed on the host
+host_tick_rate                             4398008175                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                    51232482                       # Number of instructions simulated
 sim_seconds                                  0.114406                       # Number of seconds simulated
@@ -101,8 +101,8 @@ system.cpu.dcache.demand_mshr_misses           410569                       # nu
 system.cpu.dcache.fast_writes                       0                       # number of fast writes performed
 system.cpu.dcache.mshr_cap_events                   0                       # number of times MSHR cap was activated
 system.cpu.dcache.no_allocate_misses                0                       # Number of misses that were no-allocate
-system.cpu.dcache.occ_%::0                   0.994514                       # Average percentage of cache occupancy
 system.cpu.dcache.occ_blocks::0            509.191392                       # Average occupied blocks per context
+system.cpu.dcache.occ_percent::0             0.994514                       # Average percentage of cache occupancy
 system.cpu.dcache.overall_accesses::0        14503977                       # number of overall (read+write) accesses
 system.cpu.dcache.overall_accesses::1               0                       # number of overall (read+write) accesses
 system.cpu.dcache.overall_accesses::total     14503977                       # number of overall (read+write) accesses
@@ -210,8 +210,8 @@ system.cpu.icache.demand_mshr_misses           434434                       # nu
 system.cpu.icache.fast_writes                       0                       # number of fast writes performed
 system.cpu.icache.mshr_cap_events                   0                       # number of times MSHR cap was activated
 system.cpu.icache.no_allocate_misses                0                       # Number of misses that were no-allocate
-system.cpu.icache.occ_%::0                   0.945963                       # Average percentage of cache occupancy
 system.cpu.icache.occ_blocks::0            484.333151                       # Average occupied blocks per context
+system.cpu.icache.occ_percent::0             0.945963                       # Average percentage of cache occupancy
 system.cpu.icache.overall_accesses::0        41556337                       # number of overall (read+write) accesses
 system.cpu.icache.overall_accesses::1               0                       # number of overall (read+write) accesses
 system.cpu.icache.overall_accesses::total     41556337                       # number of overall (read+write) accesses
@@ -454,10 +454,10 @@ system.l2c.demand_mshr_misses                  125930                       # nu
 system.l2c.fast_writes                              0                       # number of fast writes performed
 system.l2c.mshr_cap_events                          0                       # number of times MSHR cap was activated
 system.l2c.no_allocate_misses                       0                       # Number of misses that were no-allocate
-system.l2c.occ_%::0                          0.081395                       # Average percentage of cache occupancy
-system.l2c.occ_%::1                          0.478089                       # Average percentage of cache occupancy
 system.l2c.occ_blocks::0                  5334.310202                       # Average occupied blocks per context
 system.l2c.occ_blocks::1                 31332.032709                       # Average occupied blocks per context
+system.l2c.occ_percent::0                    0.081395                       # Average percentage of cache occupancy
+system.l2c.occ_percent::1                    0.478089                       # Average percentage of cache occupancy
 system.l2c.overall_accesses::0                 846263                       # number of overall (read+write) accesses
 system.l2c.overall_accesses::1                   5729                       # number of overall (read+write) accesses
 system.l2c.overall_accesses::total             851992                       # number of overall (read+write) accesses
diff --git a/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/status b/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/status
index 8953751c2..624e9a5f7 100644
--- a/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/status
+++ b/tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/status
@@ -1 +1 @@
-build/ARM_FS/tests/opt/quick/10.linux-boot/arm/linux/realview-simple-timing FAILED!
+build/ARM_FS/tests/fast/quick/10.linux-boot/arm/linux/realview-simple-timing FAILED!