Reference updates. Since split cache is gone, a lot of config.ini changes, and minor changes to stats that are likely due to the decoupling of insertions/evictions in the cache.

16 files changed, 74 insertions, 106 deletions

diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini
index a3b119b60..9d8e5c8ed 100644
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini
@@ -35,7 +35,7 @@ side_b=system.membus.port[0]
 
 [system.cpu0]
 type=AtomicSimpleCPU
-children=dcache dtb icache itb tracer
+children=dcache dtb icache interrupts itb tracer
 clock=500
 cpu_id=0
 defer_registration=false
@@ -45,6 +45,7 @@ do_statistics_insts=true
 dtb=system.cpu0.dtb
 function_trace=false
 function_trace_start=0
+interrupts=system.cpu0.interrupts
 itb=system.cpu0.itb
 max_insts_all_threads=0
 max_insts_any_thread=0
@@ -70,7 +71,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=1000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=4
@@ -88,8 +88,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=32768
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=8
 trace_addr=0
@@ -110,7 +108,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=1000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=4
@@ -128,8 +125,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=32768
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=8
 trace_addr=0
@@ -138,6 +133,9 @@ write_buffers=8
 cpu_side=system.cpu0.icache_port
 mem_side=system.toL2Bus.port[1]
 
+[system.cpu0.interrupts]
+type=AlphaInterrupts
+
 [system.cpu0.itb]
 type=AlphaITB
 size=48
@@ -147,7 +145,7 @@ type=ExeTracer
 
 [system.cpu1]
 type=AtomicSimpleCPU
-children=dcache dtb icache itb tracer
+children=dcache dtb icache interrupts itb tracer
 clock=500
 cpu_id=1
 defer_registration=false
@@ -157,6 +155,7 @@ do_statistics_insts=true
 dtb=system.cpu1.dtb
 function_trace=false
 function_trace_start=0
+interrupts=system.cpu1.interrupts
 itb=system.cpu1.itb
 max_insts_all_threads=0
 max_insts_any_thread=0
@@ -182,7 +181,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=1000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=4
@@ -200,8 +198,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=32768
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=8
 trace_addr=0
@@ -222,7 +218,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=1000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=4
@@ -240,8 +235,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=32768
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=8
 trace_addr=0
@@ -250,6 +243,9 @@ write_buffers=8
 cpu_side=system.cpu1.icache_port
 mem_side=system.toL2Bus.port[3]
 
+[system.cpu1.interrupts]
+type=AlphaInterrupts
+
 [system.cpu1.itb]
 type=AlphaITB
 size=48
@@ -318,7 +314,6 @@ block_size=64
 cpu_side_filter_ranges=549755813888:18446744073709551615
 hash_delay=1
 latency=50000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=0:18446744073709551615
 mshrs=20
@@ -336,8 +331,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=1024
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=12
 trace_addr=0
@@ -354,7 +347,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=10000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=92
@@ -372,8 +364,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=4194304
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=16
 trace_addr=0
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt
index af3c5730d..adb5935db 100644
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                4441196                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 289900                       # Number of bytes of host memory used
-host_seconds                                    14.21                       # Real time elapsed on the host
-host_tick_rate                           131610473505                       # Simulator tick rate (ticks/s)
+host_inst_rate                                4457341                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 291000                       # Number of bytes of host memory used
+host_seconds                                    14.16                       # Real time elapsed on the host
+host_tick_rate                           132088621816                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                    63113507                       # Number of instructions simulated
 sim_seconds                                  1.870336                       # Number of seconds simulated
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stderr b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stderr
index 9825eea69..d445cb942 100755
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stderr
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stderr
@@ -1,5 +1,5 @@
 warn: kernel located at: /dist/m5/system/binaries/vmlinux
 warn: Sockets disabled, not accepting terminal connections
 warn: Sockets disabled, not accepting gdb connections
-warn: Entering event queue @ 0.  Starting simulation...
 warn: 97861500: Trying to launch CPU number 1!
+warn: be nice to actually delete the event here
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stdout b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stdout
index 69f528e17..4c93eabec 100755
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stdout
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stdout
@@ -5,11 +5,12 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Sep 27 2008 21:08:15
-M5 revision 5571:7f81bb1690686883c5b93e8343068a001faf5083
-M5 commit date Sat Sep 27 21:03:50 2008 -0700
-M5 started Sep 27 2008 21:08:17
-M5 executing on piton
+M5 compiled Nov  5 2008 22:27:11
+M5 revision 5719:c9056088f1516d097f7e73673f990175ad238d69
+M5 commit date Wed Nov 05 16:19:17 2008 -0500
+M5 started Nov  5 2008 22:32:52
+M5 executing on zizzer
 command line: build/ALPHA_FS/m5.fast -d build/ALPHA_FS/tests/fast/quick/10.linux-boot/alpha/linux/tsunami-simple-atomic-dual -re --stdout-file stdout --stderr-file stderr tests/run.py quick/10.linux-boot/alpha/linux/tsunami-simple-atomic-dual
 Global frequency set at 1000000000000 ticks per second
+info: Entering event queue @ 0.  Starting simulation...
 Exiting @ tick 1870335522500 because m5_exit instruction encountered
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini
index f63d2144d..a6db3884d 100644
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini
@@ -35,7 +35,7 @@ side_b=system.membus.port[0]
 
 [system.cpu]
 type=AtomicSimpleCPU
-children=dcache dtb icache itb tracer
+children=dcache dtb icache interrupts itb tracer
 clock=500
 cpu_id=0
 defer_registration=false
@@ -45,6 +45,7 @@ do_statistics_insts=true
 dtb=system.cpu.dtb
 function_trace=false
 function_trace_start=0
+interrupts=system.cpu.interrupts
 itb=system.cpu.itb
 max_insts_all_threads=0
 max_insts_any_thread=0
@@ -70,7 +71,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=1000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=4
@@ -88,8 +88,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=32768
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=8
 trace_addr=0
@@ -110,7 +108,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=1000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=4
@@ -128,8 +125,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=32768
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=8
 trace_addr=0
@@ -138,6 +133,9 @@ write_buffers=8
 cpu_side=system.cpu.icache_port
 mem_side=system.toL2Bus.port[1]
 
+[system.cpu.interrupts]
+type=AlphaInterrupts
+
 [system.cpu.itb]
 type=AlphaITB
 size=48
@@ -206,7 +204,6 @@ block_size=64
 cpu_side_filter_ranges=549755813888:18446744073709551615
 hash_delay=1
 latency=50000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=0:18446744073709551615
 mshrs=20
@@ -224,8 +221,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=1024
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=12
 trace_addr=0
@@ -242,7 +237,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=10000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=92
@@ -260,8 +254,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=4194304
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=16
 trace_addr=0
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/m5stats.txt b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/m5stats.txt
index 5018c7d30..bd2b86aca 100644
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/m5stats.txt
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/m5stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                3096300                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 288712                       # Number of bytes of host memory used
-host_seconds                                    19.38                       # Real time elapsed on the host
-host_tick_rate                            94358252114                       # Simulator tick rate (ticks/s)
+host_inst_rate                                2960159                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 289760                       # Number of bytes of host memory used
+host_seconds                                    20.27                       # Real time elapsed on the host
+host_tick_rate                            90209540739                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                    59995351                       # Number of instructions simulated
 sim_seconds                                  1.828356                       # Number of seconds simulated
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stderr b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stderr
index 45392f539..1a557daf8 100755
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stderr
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stderr
@@ -1,4 +1,4 @@
 warn: kernel located at: /dist/m5/system/binaries/vmlinux
 warn: Sockets disabled, not accepting terminal connections
 warn: Sockets disabled, not accepting gdb connections
-warn: Entering event queue @ 0.  Starting simulation...
+warn: be nice to actually delete the event here
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stdout b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stdout
index 4d9c075f2..e7d4d476c 100755
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stdout
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stdout
@@ -5,11 +5,12 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Sep 27 2008 21:08:15
-M5 revision 5571:7f81bb1690686883c5b93e8343068a001faf5083
-M5 commit date Sat Sep 27 21:03:50 2008 -0700
-M5 started Sep 27 2008 21:08:17
-M5 executing on piton
+M5 compiled Nov  5 2008 22:27:11
+M5 revision 5719:c9056088f1516d097f7e73673f990175ad238d69
+M5 commit date Wed Nov 05 16:19:17 2008 -0500
+M5 started Nov  5 2008 22:28:06
+M5 executing on zizzer
 command line: build/ALPHA_FS/m5.fast -d build/ALPHA_FS/tests/fast/quick/10.linux-boot/alpha/linux/tsunami-simple-atomic -re --stdout-file stdout --stderr-file stderr tests/run.py quick/10.linux-boot/alpha/linux/tsunami-simple-atomic
 Global frequency set at 1000000000000 ticks per second
+info: Entering event queue @ 0.  Starting simulation...
 Exiting @ tick 1828355695500 because m5_exit instruction encountered
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini
index 29f87c7e0..de9bfc9e4 100644
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini
@@ -35,7 +35,7 @@ side_b=system.membus.port[0]
 
 [system.cpu0]
 type=TimingSimpleCPU
-children=dcache dtb icache itb tracer
+children=dcache dtb icache interrupts itb tracer
 clock=500
 cpu_id=0
 defer_registration=false
@@ -45,6 +45,7 @@ do_statistics_insts=true
 dtb=system.cpu0.dtb
 function_trace=false
 function_trace_start=0
+interrupts=system.cpu0.interrupts
 itb=system.cpu0.itb
 max_insts_all_threads=0
 max_insts_any_thread=0
@@ -67,7 +68,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=1000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=4
@@ -85,8 +85,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=32768
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=8
 trace_addr=0
@@ -107,7 +105,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=1000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=4
@@ -125,8 +122,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=32768
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=8
 trace_addr=0
@@ -135,6 +130,9 @@ write_buffers=8
 cpu_side=system.cpu0.icache_port
 mem_side=system.toL2Bus.port[1]
 
+[system.cpu0.interrupts]
+type=AlphaInterrupts
+
 [system.cpu0.itb]
 type=AlphaITB
 size=48
@@ -144,7 +142,7 @@ type=ExeTracer
 
 [system.cpu1]
 type=TimingSimpleCPU
-children=dcache dtb icache itb tracer
+children=dcache dtb icache interrupts itb tracer
 clock=500
 cpu_id=1
 defer_registration=false
@@ -154,6 +152,7 @@ do_statistics_insts=true
 dtb=system.cpu1.dtb
 function_trace=false
 function_trace_start=0
+interrupts=system.cpu1.interrupts
 itb=system.cpu1.itb
 max_insts_all_threads=0
 max_insts_any_thread=0
@@ -176,7 +175,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=1000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=4
@@ -194,8 +192,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=32768
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=8
 trace_addr=0
@@ -216,7 +212,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=1000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=4
@@ -234,8 +229,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=32768
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=8
 trace_addr=0
@@ -244,6 +237,9 @@ write_buffers=8
 cpu_side=system.cpu1.icache_port
 mem_side=system.toL2Bus.port[3]
 
+[system.cpu1.interrupts]
+type=AlphaInterrupts
+
 [system.cpu1.itb]
 type=AlphaITB
 size=48
@@ -312,7 +308,6 @@ block_size=64
 cpu_side_filter_ranges=549755813888:18446744073709551615
 hash_delay=1
 latency=50000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=0:18446744073709551615
 mshrs=20
@@ -330,8 +325,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=1024
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=12
 trace_addr=0
@@ -348,7 +341,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=10000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=92
@@ -366,8 +358,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=4194304
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=16
 trace_addr=0
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt
index 3478349a5..67988d1e0 100644
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                1987058                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 287224                       # Number of bytes of host memory used
-host_seconds                                    29.88                       # Real time elapsed on the host
-host_tick_rate                            65994111033                       # Simulator tick rate (ticks/s)
+host_inst_rate                                1529547                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 287776                       # Number of bytes of host memory used
+host_seconds                                    38.82                       # Real time elapsed on the host
+host_tick_rate                            50799321587                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                    59379829                       # Number of instructions simulated
 sim_seconds                                  1.972135                       # Number of seconds simulated
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stderr b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stderr
index c03c0154e..dad1cad88 100755
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stderr
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stderr
@@ -1,5 +1,5 @@
 warn: kernel located at: /dist/m5/system/binaries/vmlinux
 warn: Sockets disabled, not accepting terminal connections
 warn: Sockets disabled, not accepting gdb connections
-warn: Entering event queue @ 0.  Starting simulation...
 warn: 591544000: Trying to launch CPU number 1!
+warn: be nice to actually delete the event here
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout
index 02b572ec9..447da7e4d 100755
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout
@@ -5,11 +5,12 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Sep 27 2008 21:08:15
-M5 revision 5571:7f81bb1690686883c5b93e8343068a001faf5083
-M5 commit date Sat Sep 27 21:03:50 2008 -0700
-M5 started Sep 27 2008 21:08:17
-M5 executing on piton
+M5 compiled Nov  5 2008 22:27:11
+M5 revision 5719:c9056088f1516d097f7e73673f990175ad238d69
+M5 commit date Wed Nov 05 16:19:17 2008 -0500
+M5 started Nov  5 2008 22:29:36
+M5 executing on zizzer
 command line: build/ALPHA_FS/m5.fast -d build/ALPHA_FS/tests/fast/quick/10.linux-boot/alpha/linux/tsunami-simple-timing-dual -re --stdout-file stdout --stderr-file stderr tests/run.py quick/10.linux-boot/alpha/linux/tsunami-simple-timing-dual
 Global frequency set at 1000000000000 ticks per second
+info: Entering event queue @ 0.  Starting simulation...
 Exiting @ tick 1972135479000 because m5_exit instruction encountered
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini
index c6c4209f5..3e8e04375 100644
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini
@@ -35,7 +35,7 @@ side_b=system.membus.port[0]
 
 [system.cpu]
 type=TimingSimpleCPU
-children=dcache dtb icache itb tracer
+children=dcache dtb icache interrupts itb tracer
 clock=500
 cpu_id=0
 defer_registration=false
@@ -45,6 +45,7 @@ do_statistics_insts=true
 dtb=system.cpu.dtb
 function_trace=false
 function_trace_start=0
+interrupts=system.cpu.interrupts
 itb=system.cpu.itb
 max_insts_all_threads=0
 max_insts_any_thread=0
@@ -67,7 +68,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=1000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=4
@@ -85,8 +85,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=32768
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=8
 trace_addr=0
@@ -107,7 +105,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=1000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=4
@@ -125,8 +122,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=32768
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=8
 trace_addr=0
@@ -135,6 +130,9 @@ write_buffers=8
 cpu_side=system.cpu.icache_port
 mem_side=system.toL2Bus.port[1]
 
+[system.cpu.interrupts]
+type=AlphaInterrupts
+
 [system.cpu.itb]
 type=AlphaITB
 size=48
@@ -203,7 +201,6 @@ block_size=64
 cpu_side_filter_ranges=549755813888:18446744073709551615
 hash_delay=1
 latency=50000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=0:18446744073709551615
 mshrs=20
@@ -221,8 +218,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=1024
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=12
 trace_addr=0
@@ -239,7 +234,6 @@ block_size=64
 cpu_side_filter_ranges=
 hash_delay=1
 latency=10000
-lifo=false
 max_miss_count=0
 mem_side_filter_ranges=
 mshrs=92
@@ -257,8 +251,6 @@ prefetcher_size=100
 prioritizeRequests=false
 repl=Null
 size=4194304
-split=false
-split_size=0
 subblock_size=0
 tgts_per_mshr=16
 trace_addr=0
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt
index 7b835d1b3..5185f8b73 100644
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                1555255                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 285892                       # Number of bytes of host memory used
-host_seconds                                    36.11                       # Real time elapsed on the host
-host_tick_rate                            53447376481                       # Simulator tick rate (ticks/s)
+host_inst_rate                                1640475                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 286536                       # Number of bytes of host memory used
+host_seconds                                    34.24                       # Real time elapsed on the host
+host_tick_rate                            56375976626                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                    56165112                       # Number of instructions simulated
 sim_seconds                                  1.930166                       # Number of seconds simulated
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stderr b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stderr
index 45392f539..1a557daf8 100755
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stderr
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stderr
@@ -1,4 +1,4 @@
 warn: kernel located at: /dist/m5/system/binaries/vmlinux
 warn: Sockets disabled, not accepting terminal connections
 warn: Sockets disabled, not accepting gdb connections
-warn: Entering event queue @ 0.  Starting simulation...
+warn: be nice to actually delete the event here
diff --git a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stdout b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stdout
index 6ec325f9b..5cef637b5 100755
--- a/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stdout
+++ b/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stdout
@@ -5,11 +5,12 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Sep 27 2008 21:08:15
-M5 revision 5571:7f81bb1690686883c5b93e8343068a001faf5083
-M5 commit date Sat Sep 27 21:03:50 2008 -0700
-M5 started Sep 27 2008 21:08:17
-M5 executing on piton
+M5 compiled Nov  5 2008 22:27:11
+M5 revision 5719:c9056088f1516d097f7e73673f990175ad238d69
+M5 commit date Wed Nov 05 16:19:17 2008 -0500
+M5 started Nov  5 2008 22:27:38
+M5 executing on zizzer
 command line: build/ALPHA_FS/m5.fast -d build/ALPHA_FS/tests/fast/quick/10.linux-boot/alpha/linux/tsunami-simple-timing -re --stdout-file stdout --stderr-file stderr tests/run.py quick/10.linux-boot/alpha/linux/tsunami-simple-timing
 Global frequency set at 1000000000000 ticks per second
+info: Entering event queue @ 0.  Starting simulation...
 Exiting @ tick 1930165791000 because m5_exit instruction encountered