diff options
| author | Kevin Lim <ktlim@umich.edu> | 2006-11-10 12:44:15 -0500 |
|---|---|---|
| committer | Kevin Lim <ktlim@umich.edu> | 2006-11-10 12:44:15 -0500 |
| commit | b5e68fb54677f601bb00c23af52db8fd6571301f (patch) | |
| tree | dc3c17198ba4010d907ecd8cb7189aa7959948d4 /tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini | |
| parent | 264f9ce374ff4689fec3c32d8289fe76b0b65078 (diff) | |
| parent | 9ef51f2dbaba88c10366d708f0ca872bb39064e4 (diff) | |
| download | gem5-b5e68fb54677f601bb00c23af52db8fd6571301f.tar.xz | |
Merge ktlim@zizzer:/bk/newmem
into zamp.eecs.umich.edu:/z/ktlim2/clean/o3-merge/newmem
--HG--
extra : convert_revision : 0c2db1e1b5fdb91c1ac5705ab872a6bfb575a67a
Diffstat (limited to 'tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini')
| -rw-r--r-- | tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini index a3e69e540..ed47bcbe5 100644 --- a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini +++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini @@ -64,7 +64,6 @@ max_insts_all_threads=0 max_insts_any_thread=500000 max_loads_all_threads=0 max_loads_any_thread=0 -mem=system.cpu.dcache progress_interval=0 system=system workload=system.cpu.workload @@ -78,7 +77,6 @@ assoc=2 block_size=64 compressed_bus=false compression_latency=0 -do_copy=false hash_delay=1 hit_latency=1 latency=1 @@ -118,7 +116,6 @@ assoc=2 block_size=64 compressed_bus=false compression_latency=0 -do_copy=false hash_delay=1 hit_latency=1 latency=1 @@ -158,7 +155,6 @@ assoc=2 block_size=64 compressed_bus=false compression_latency=0 -do_copy=false hash_delay=1 hit_latency=1 latency=1 @@ -195,6 +191,7 @@ mem_side=system.membus.port[1] type=Bus bus_id=0 clock=1000 +responder_set=false width=64 port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side @@ -209,6 +206,7 @@ system=system type=Bus bus_id=0 clock=1000 +responder_set=false width=64 port=system.physmem.port system.cpu.l2cache.mem_side |