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authorGabe Black <gblack@eecs.umich.edu>2006-10-13 18:59:29 -0400
committerGabe Black <gblack@eecs.umich.edu>2006-10-13 18:59:29 -0400
commitd83ccdfe5d2f22669fd65a90e2f8005cf1ffc5cc (patch)
tree6b1bf3497e68f5e3eebc217a01b506b4e62811c5 /tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini
parentca4063ac00202b80e11312be62abbe4283cfae7b (diff)
downloadgem5-d83ccdfe5d2f22669fd65a90e2f8005cf1ffc5cc.tar.xz
Fix stats for new bus model
--HG-- extra : convert_revision : c081754c8eb8fa5b8e7336deb3fefb545789b8ac
Diffstat (limited to 'tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini')
-rw-r--r--tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini4
1 files changed, 4 insertions, 0 deletions
diff --git a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini
index 72ea32994..a3e69e540 100644
--- a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini
+++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini
@@ -194,6 +194,8 @@ mem_side=system.membus.port[1]
[system.cpu.toL2Bus]
type=Bus
bus_id=0
+clock=1000
+width=64
port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
[system.cpu.workload]
@@ -206,6 +208,8 @@ system=system
[system.membus]
type=Bus
bus_id=0
+clock=1000
+width=64
port=system.physmem.port system.cpu.l2cache.mem_side
[system.physmem]