Update reference config.ini files to include port mappings.

--HG--
extra : convert_revision : f9e91a60fa09b707d2a26be57f265b7ab1c07263

6 files changed, 27 insertions, 12 deletions

diff --git a/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini
index 4f9d886f0..a4b103732 100644
--- a/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini
+++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini
@@ -68,6 +68,8 @@ simulate_stalls=false
 system=system
 width=1
 workload=system.cpu.workload
+dcache_port=system.membus.port[2]
+icache_port=system.membus.port[1]
 
 [system.cpu.workload]
 type=EioProcess
@@ -79,12 +81,14 @@ system=system
 [system.membus]
 type=Bus
 bus_id=0
+port=system.physmem.port system.cpu.icache_port system.cpu.dcache_port
 
 [system.physmem]
 type=PhysicalMemory
 file=
 latency=1
 range=0:134217727
+port=system.membus.port[0]
 
 [trace]
 bufsize=0
diff --git a/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/m5stats.txt b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/m5stats.txt
index 508b7b1e3..0132ecf1b 100644
--- a/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/m5stats.txt
+++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/m5stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                1431500                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 146556                       # Number of bytes of host memory used
-host_seconds                                     0.35                       # Real time elapsed on the host
-host_tick_rate                                1429839                       # Simulator tick rate (ticks/s)
+host_inst_rate                                1397534                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 147632                       # Number of bytes of host memory used
+host_seconds                                     0.36                       # Real time elapsed on the host
+host_tick_rate                                1395943                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                      500000                       # Number of instructions simulated
 sim_seconds                                  0.000000                       # Number of seconds simulated
diff --git a/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stdout b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stdout
index 20413a23c..d3edcdc0a 100644
--- a/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stdout
+++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stdout
@@ -7,8 +7,8 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Aug 18 2006 00:06:43
-M5 started Fri Aug 18 00:12:49 2006
+M5 compiled Sep  5 2006 15:28:48
+M5 started Tue Sep  5 15:42:20 2006
 M5 executing on zizzer.eecs.umich.edu
 command line: build/ALPHA_SE/m5.opt -d build/ALPHA_SE/tests/opt/quick/20.eio-short/alpha/eio/simple-atomic tests/run.py quick/20.eio-short/alpha/eio/simple-atomic
 Exiting @ tick 499999 because a thread reached the max instruction count
diff --git a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini
index 0352c1b88..27568ad50 100644
--- a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini
+++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini
@@ -66,6 +66,8 @@ max_loads_any_thread=0
 mem=system.cpu.dcache
 system=system
 workload=system.cpu.workload
+dcache_port=system.cpu.dcache.cpu_side
+icache_port=system.cpu.icache.cpu_side
 
 [system.cpu.dcache]
 type=BaseCache
@@ -104,6 +106,8 @@ tgts_per_mshr=5
 trace_addr=0
 two_queue=false
 write_buffers=8
+cpu_side=system.cpu.dcache_port
+mem_side=system.cpu.toL2Bus.port[1]
 
 [system.cpu.icache]
 type=BaseCache
@@ -142,6 +146,8 @@ tgts_per_mshr=5
 trace_addr=0
 two_queue=false
 write_buffers=8
+cpu_side=system.cpu.icache_port
+mem_side=system.cpu.toL2Bus.port[0]
 
 [system.cpu.l2cache]
 type=BaseCache
@@ -180,10 +186,13 @@ tgts_per_mshr=5
 trace_addr=0
 two_queue=false
 write_buffers=8
+cpu_side=system.cpu.toL2Bus.port[2]
+mem_side=system.membus.port[1]
 
 [system.cpu.toL2Bus]
 type=Bus
 bus_id=0
+port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
 
 [system.cpu.workload]
 type=EioProcess
@@ -195,12 +204,14 @@ system=system
 [system.membus]
 type=Bus
 bus_id=0
+port=system.physmem.port system.cpu.l2cache.mem_side
 
 [system.physmem]
 type=PhysicalMemory
 file=
 latency=1
 range=0:134217727
+port=system.membus.port[0]
 
 [trace]
 bufsize=0
diff --git a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/m5stats.txt b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/m5stats.txt
index 17e8cb668..6339e48b7 100644
--- a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/m5stats.txt
+++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/m5stats.txt
@@ -1,9 +1,9 @@
 
 ---------- Begin Simulation Statistics ----------
-host_inst_rate                                 310464                       # Simulator instruction rate (inst/s)
-host_mem_usage                                 159200                       # Number of bytes of host memory used
-host_seconds                                     1.61                       # Real time elapsed on the host
-host_tick_rate                                 423570                       # Simulator tick rate (ticks/s)
+host_inst_rate                                 620120                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 159196                       # Number of bytes of host memory used
+host_seconds                                     0.81                       # Real time elapsed on the host
+host_tick_rate                                 845850                       # Simulator tick rate (ticks/s)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
 sim_insts                                      500000                       # Number of instructions simulated
 sim_seconds                                  0.000001                       # Number of seconds simulated
diff --git a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stdout b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stdout
index bb4db9d7d..158dcfe2b 100644
--- a/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stdout
+++ b/tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stdout
@@ -7,8 +7,8 @@ The Regents of The University of Michigan
 All Rights Reserved
 
 
-M5 compiled Aug 21 2006 14:18:48
-M5 started Mon Aug 21 14:19:29 2006
+M5 compiled Sep  5 2006 15:28:48
+M5 started Tue Sep  5 15:42:20 2006
 M5 executing on zizzer.eecs.umich.edu
 command line: build/ALPHA_SE/m5.opt -d build/ALPHA_SE/tests/opt/quick/20.eio-short/alpha/eio/simple-timing tests/run.py quick/20.eio-short/alpha/eio/simple-timing
 Exiting @ tick 682354 because a thread reached the max instruction count