diff options
| author | Ali Saidi <Ali.Saidi@ARM.com> | 2011-12-01 00:15:23 -0800 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2011-12-01 00:15:23 -0800 |
| commit | d1dd7a24dbeec44a5de232549fa863ff597be349 (patch) | |
| tree | 83755e42e7507fd86f6f573d13570118dec9549e /tests/quick/40.m5threads-test-atomic/ref/sparc/linux | |
| parent | 61c14da751ae80e8c19e0b63ddd629c4152f1c72 (diff) | |
| download | gem5-d1dd7a24dbeec44a5de232549fa863ff597be349.tar.xz | |
imported patch ext/stats_updates.patch
--HG--
extra : rebase_source : 4697ba9eb1ca8c67fe0915fb8340d7d4ae94caba
Diffstat (limited to 'tests/quick/40.m5threads-test-atomic/ref/sparc/linux')
3 files changed, 11 insertions, 10 deletions
diff --git a/tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/config.ini b/tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/config.ini index dc4523b69..9d8c34c47 100644 --- a/tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/config.ini +++ b/tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/config.ini @@ -458,7 +458,7 @@ egid=100 env= errout=cerr euid=100 -executable=/dist/m5/regression/test-progs/m5threads/bin/sparc/linux/test_atomic +executable=/projects/pd/randd/dist/test-progs/m5threads/bin/sparc/linux/test_atomic gid=100 input=cin max_stack_size=67108864 diff --git a/tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simout b/tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simout index 9264a5759..709d070a3 100755 --- a/tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simout +++ b/tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simout @@ -1,11 +1,9 @@ -Redirecting stdout to build/SPARC_SE/tests/opt/quick/40.m5threads-test-atomic/sparc/linux/o3-timing-mp/simout -Redirecting stderr to build/SPARC_SE/tests/opt/quick/40.m5threads-test-atomic/sparc/linux/o3-timing-mp/simerr gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Aug 20 2011 13:07:22 -gem5 started Aug 20 2011 13:07:32 -gem5 executing on zizzer +gem5 compiled Nov 21 2011 16:13:49 +gem5 started Nov 21 2011 20:51:35 +gem5 executing on u200540-lin command line: build/SPARC_SE/gem5.opt -d build/SPARC_SE/tests/opt/quick/40.m5threads-test-atomic/sparc/linux/o3-timing-mp -re tests/run.py build/SPARC_SE/tests/opt/quick/40.m5threads-test-atomic/sparc/linux/o3-timing-mp Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/stats.txt b/tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/stats.txt index 101c2c9bd..faa6a7461 100644 --- a/tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/stats.txt +++ b/tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/stats.txt @@ -3,10 +3,10 @@ sim_seconds 0.000104 # Number of seconds simulated sim_ticks 104317500 # Number of ticks simulated sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 86437 # Simulator instruction rate (inst/s) -host_tick_rate 8848828 # Simulator tick rate (ticks/s) -host_mem_usage 223064 # Number of bytes of host memory used -host_seconds 11.79 # Real time elapsed on the host +host_inst_rate 97517 # Simulator instruction rate (inst/s) +host_tick_rate 9983124 # Simulator tick rate (ticks/s) +host_mem_usage 222460 # Number of bytes of host memory used +host_seconds 10.45 # Real time elapsed on the host sim_insts 1018993 # Number of instructions simulated system.cpu0.workload.num_syscalls 89 # Number of system calls system.cpu0.numCycles 208636 # number of cpu cycles simulated @@ -656,6 +656,7 @@ system.cpu1.rob.rob_reads 446977 # Th system.cpu1.rob.rob_writes 572400 # The number of ROB writes system.cpu1.timesIdled 225 # Number of times that the entire CPU went into an idle state and unscheduled itself system.cpu1.idleCycles 2707 # Total number of cycles that the CPU has spent unscheduled due to idling +system.cpu1.quiesceCycles 34329 # Total number of cycles that CPU has spent quiesced or waiting for an interrupt system.cpu1.committedInsts 231385 # Number of Instructions Simulated system.cpu1.committedInsts_total 231385 # Number of Instructions Simulated system.cpu1.cpi 0.753312 # CPI: Cycles Per Instruction @@ -1053,6 +1054,7 @@ system.cpu2.rob.rob_reads 425878 # Th system.cpu2.rob.rob_writes 535627 # The number of ROB writes system.cpu2.timesIdled 232 # Number of times that the entire CPU went into an idle state and unscheduled itself system.cpu2.idleCycles 5048 # Total number of cycles that the CPU has spent unscheduled due to idling +system.cpu2.quiesceCycles 34616 # Total number of cycles that CPU has spent quiesced or waiting for an interrupt system.cpu2.committedInsts 215254 # Number of Instructions Simulated system.cpu2.committedInsts_total 215254 # Number of Instructions Simulated system.cpu2.cpi 0.808431 # CPI: Cycles Per Instruction @@ -1450,6 +1452,7 @@ system.cpu3.rob.rob_reads 392929 # Th system.cpu3.rob.rob_writes 465356 # The number of ROB writes system.cpu3.timesIdled 234 # Number of times that the entire CPU went into an idle state and unscheduled itself system.cpu3.idleCycles 2770 # Total number of cycles that the CPU has spent unscheduled due to idling +system.cpu3.quiesceCycles 34882 # Total number of cycles that CPU has spent quiesced or waiting for an interrupt system.cpu3.committedInsts 183965 # Number of Instructions Simulated system.cpu3.committedInsts_total 183965 # Number of Instructions Simulated system.cpu3.cpi 0.944484 # CPI: Cycles Per Instruction |