diff options
author | Gabe Black <gblack@eecs.umich.edu> | 2012-01-28 07:24:45 -0800 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2012-01-28 07:24:45 -0800 |
commit | 57e07ac2d2daaa7469241372510395e43ebe14c0 (patch) | |
tree | dc338f4fbe8b26f7d7d3532ea0abe324846ca33d /tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory | |
parent | ec20ee2f7cdaff22e63a5ae492f925d0d4839849 (diff) | |
download | gem5-57e07ac2d2daaa7469241372510395e43ebe14c0.tar.xz |
SE/FS: Make both SE and FS tests available all the time.
--HG--
rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini
rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simerr => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simerr
rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout
rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt
rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/system.terminal => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/system.terminal
rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini
rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simerr => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/simerr
rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simout => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/simout
rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt
rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/system.terminal => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/system.terminal
rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3-dual/config.ini => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/config.ini
rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3-dual/simerr => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/simerr
rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3-dual/simout => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/simout
rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3-dual/stats.txt => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/stats.txt
rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3-dual/status => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/status
rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3-dual/system.terminal => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/system.terminal
rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3/config.ini => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini
rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3/simerr => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simerr
rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3/simout => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simout
rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3/stats.txt => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/stats.txt
rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3/system.terminal => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/system.terminal
rename : tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini => tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini
rename : tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/simerr => tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/simerr
rename : tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/simout => tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/simout
rename : tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/stats.txt => tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/stats.txt
rename : tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/system.pc.com_1.terminal => tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/system.pc.com_1.terminal
rename : tests/long/10.linux-boot/test.py => tests/long/fs/10.linux-boot/test.py
rename : tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini => tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini
rename : tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simerr => tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simerr
rename : tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout => tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout
rename : tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt => tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt
rename : tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/system.t1000.hterm => tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/system.t1000.hterm
rename : tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/system.t1000.pterm => tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/system.t1000.pterm
rename : tests/long/80.solaris-boot/test.py => tests/long/fs/80.solaris-boot/test.py
rename : tests/long/00.gzip/ref/alpha/tru64/inorder-timing/config.ini => tests/long/se/00.gzip/ref/alpha/tru64/inorder-timing/config.ini
rename : tests/long/00.gzip/ref/alpha/tru64/inorder-timing/simerr => tests/long/se/00.gzip/ref/alpha/tru64/inorder-timing/simerr
rename : tests/long/00.gzip/ref/alpha/tru64/inorder-timing/simout => tests/long/se/00.gzip/ref/alpha/tru64/inorder-timing/simout
rename : tests/long/00.gzip/ref/alpha/tru64/inorder-timing/stats.txt => tests/long/se/00.gzip/ref/alpha/tru64/inorder-timing/stats.txt
rename : tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini => tests/long/se/00.gzip/ref/alpha/tru64/o3-timing/config.ini
rename : tests/long/00.gzip/ref/alpha/tru64/o3-timing/simerr => tests/long/se/00.gzip/ref/alpha/tru64/o3-timing/simerr
rename : tests/long/00.gzip/ref/alpha/tru64/o3-timing/simout => tests/long/se/00.gzip/ref/alpha/tru64/o3-timing/simout
rename : tests/long/00.gzip/ref/alpha/tru64/o3-timing/stats.txt => tests/long/se/00.gzip/ref/alpha/tru64/o3-timing/stats.txt
rename : tests/long/00.gzip/ref/alpha/tru64/simple-atomic/config.ini => tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/config.ini
rename : tests/long/00.gzip/ref/alpha/tru64/simple-atomic/simerr => tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/simerr
rename : tests/long/00.gzip/ref/alpha/tru64/simple-atomic/simout => tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/simout
rename : tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stats.txt => tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/stats.txt
rename : tests/long/00.gzip/ref/alpha/tru64/simple-timing/config.ini => tests/long/se/00.gzip/ref/alpha/tru64/simple-timing/config.ini
rename : tests/long/00.gzip/ref/alpha/tru64/simple-timing/simerr => tests/long/se/00.gzip/ref/alpha/tru64/simple-timing/simerr
rename : tests/long/00.gzip/ref/alpha/tru64/simple-timing/simout => tests/long/se/00.gzip/ref/alpha/tru64/simple-timing/simout
rename : tests/long/00.gzip/ref/alpha/tru64/simple-timing/stats.txt => tests/long/se/00.gzip/ref/alpha/tru64/simple-timing/stats.txt
rename : tests/long/00.gzip/ref/arm/linux/o3-timing/config.ini => tests/long/se/00.gzip/ref/arm/linux/o3-timing/config.ini
rename : tests/long/00.gzip/ref/arm/linux/o3-timing/simerr => tests/long/se/00.gzip/ref/arm/linux/o3-timing/simerr
rename : tests/long/00.gzip/ref/arm/linux/o3-timing/simout => tests/long/se/00.gzip/ref/arm/linux/o3-timing/simout
rename : tests/long/00.gzip/ref/arm/linux/o3-timing/stats.txt => tests/long/se/00.gzip/ref/arm/linux/o3-timing/stats.txt
rename : tests/long/00.gzip/ref/arm/linux/simple-atomic/config.ini => tests/long/se/00.gzip/ref/arm/linux/simple-atomic/config.ini
rename : tests/long/00.gzip/ref/arm/linux/simple-atomic/simerr => tests/long/se/00.gzip/ref/arm/linux/simple-atomic/simerr
rename : tests/long/00.gzip/ref/arm/linux/simple-atomic/simout => tests/long/se/00.gzip/ref/arm/linux/simple-atomic/simout
rename : tests/long/00.gzip/ref/arm/linux/simple-atomic/stats.txt => tests/long/se/00.gzip/ref/arm/linux/simple-atomic/stats.txt
rename : tests/long/00.gzip/ref/arm/linux/simple-timing/config.ini => tests/long/se/00.gzip/ref/arm/linux/simple-timing/config.ini
rename : tests/long/00.gzip/ref/arm/linux/simple-timing/simerr => tests/long/se/00.gzip/ref/arm/linux/simple-timing/simerr
rename : tests/long/00.gzip/ref/arm/linux/simple-timing/simout => tests/long/se/00.gzip/ref/arm/linux/simple-timing/simout
rename : tests/long/00.gzip/ref/arm/linux/simple-timing/stats.txt => tests/long/se/00.gzip/ref/arm/linux/simple-timing/stats.txt
rename : tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini => tests/long/se/00.gzip/ref/sparc/linux/o3-timing/config.ini
rename : tests/long/00.gzip/ref/sparc/linux/o3-timing/simerr => tests/long/se/00.gzip/ref/sparc/linux/o3-timing/simerr
rename : tests/long/00.gzip/ref/sparc/linux/o3-timing/simout => tests/long/se/00.gzip/ref/sparc/linux/o3-timing/simout
rename : tests/long/00.gzip/ref/sparc/linux/o3-timing/stats.txt => tests/long/se/00.gzip/ref/sparc/linux/o3-timing/stats.txt
rename : tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini => tests/long/se/00.gzip/ref/sparc/linux/simple-atomic/config.ini
rename : tests/long/00.gzip/ref/sparc/linux/simple-atomic/simerr => tests/long/se/00.gzip/ref/sparc/linux/simple-atomic/simerr
rename : tests/long/00.gzip/ref/sparc/linux/simple-atomic/simout => tests/long/se/00.gzip/ref/sparc/linux/simple-atomic/simout
rename : tests/long/00.gzip/ref/sparc/linux/simple-atomic/stats.txt => tests/long/se/00.gzip/ref/sparc/linux/simple-atomic/stats.txt
rename : tests/long/00.gzip/ref/sparc/linux/simple-timing/config.ini => tests/long/se/00.gzip/ref/sparc/linux/simple-timing/config.ini
rename : tests/long/00.gzip/ref/sparc/linux/simple-timing/simerr => tests/long/se/00.gzip/ref/sparc/linux/simple-timing/simerr
rename : tests/long/00.gzip/ref/sparc/linux/simple-timing/simout => tests/long/se/00.gzip/ref/sparc/linux/simple-timing/simout
rename : tests/long/00.gzip/ref/sparc/linux/simple-timing/stats.txt => tests/long/se/00.gzip/ref/sparc/linux/simple-timing/stats.txt
rename : tests/long/00.gzip/ref/x86/linux/o3-timing/config.ini => tests/long/se/00.gzip/ref/x86/linux/o3-timing/config.ini
rename : tests/long/00.gzip/ref/x86/linux/o3-timing/simerr => tests/long/se/00.gzip/ref/x86/linux/o3-timing/simerr
rename : tests/long/00.gzip/ref/x86/linux/o3-timing/simout => tests/long/se/00.gzip/ref/x86/linux/o3-timing/simout
rename : tests/long/00.gzip/ref/x86/linux/o3-timing/stats.txt => tests/long/se/00.gzip/ref/x86/linux/o3-timing/stats.txt
rename : tests/long/00.gzip/ref/x86/linux/simple-atomic/config.ini => tests/long/se/00.gzip/ref/x86/linux/simple-atomic/config.ini
rename : tests/long/00.gzip/ref/x86/linux/simple-atomic/simerr => tests/long/se/00.gzip/ref/x86/linux/simple-atomic/simerr
rename : tests/long/00.gzip/ref/x86/linux/simple-atomic/simout => tests/long/se/00.gzip/ref/x86/linux/simple-atomic/simout
rename : tests/long/00.gzip/ref/x86/linux/simple-atomic/stats.txt => tests/long/se/00.gzip/ref/x86/linux/simple-atomic/stats.txt
rename : tests/long/00.gzip/ref/x86/linux/simple-timing/config.ini => tests/long/se/00.gzip/ref/x86/linux/simple-timing/config.ini
rename : tests/long/00.gzip/ref/x86/linux/simple-timing/simerr => tests/long/se/00.gzip/ref/x86/linux/simple-timing/simerr
rename : tests/long/00.gzip/ref/x86/linux/simple-timing/simout => tests/long/se/00.gzip/ref/x86/linux/simple-timing/simout
rename : tests/long/00.gzip/ref/x86/linux/simple-timing/stats.txt => tests/long/se/00.gzip/ref/x86/linux/simple-timing/stats.txt
rename : tests/long/00.gzip/test.py => tests/long/se/00.gzip/test.py
rename : tests/long/10.mcf/ref/arm/linux/o3-timing/chair.cook.ppm => tests/long/se/10.mcf/ref/arm/linux/o3-timing/chair.cook.ppm
rename : tests/long/10.mcf/ref/arm/linux/o3-timing/config.ini => tests/long/se/10.mcf/ref/arm/linux/o3-timing/config.ini
rename : tests/long/10.mcf/ref/arm/linux/o3-timing/mcf.out => tests/long/se/10.mcf/ref/arm/linux/o3-timing/mcf.out
rename : tests/long/10.mcf/ref/arm/linux/o3-timing/simerr => tests/long/se/10.mcf/ref/arm/linux/o3-timing/simerr
rename : tests/long/10.mcf/ref/arm/linux/o3-timing/simout => tests/long/se/10.mcf/ref/arm/linux/o3-timing/simout
rename : tests/long/10.mcf/ref/arm/linux/o3-timing/stats.txt => tests/long/se/10.mcf/ref/arm/linux/o3-timing/stats.txt
rename : tests/long/10.mcf/ref/arm/linux/simple-atomic/chair.cook.ppm => tests/long/se/10.mcf/ref/arm/linux/simple-atomic/chair.cook.ppm
rename : tests/long/10.mcf/ref/arm/linux/simple-atomic/config.ini => tests/long/se/10.mcf/ref/arm/linux/simple-atomic/config.ini
rename : tests/long/10.mcf/ref/arm/linux/simple-atomic/mcf.out => tests/long/se/10.mcf/ref/arm/linux/simple-atomic/mcf.out
rename : tests/long/10.mcf/ref/arm/linux/simple-atomic/simerr => tests/long/se/10.mcf/ref/arm/linux/simple-atomic/simerr
rename : tests/long/10.mcf/ref/arm/linux/simple-atomic/simout => tests/long/se/10.mcf/ref/arm/linux/simple-atomic/simout
rename : tests/long/10.mcf/ref/arm/linux/simple-atomic/stats.txt => tests/long/se/10.mcf/ref/arm/linux/simple-atomic/stats.txt
rename : tests/long/10.mcf/ref/arm/linux/simple-timing/chair.cook.ppm => tests/long/se/10.mcf/ref/arm/linux/simple-timing/chair.cook.ppm
rename : tests/long/10.mcf/ref/arm/linux/simple-timing/config.ini => tests/long/se/10.mcf/ref/arm/linux/simple-timing/config.ini
rename : tests/long/10.mcf/ref/arm/linux/simple-timing/mcf.out => tests/long/se/10.mcf/ref/arm/linux/simple-timing/mcf.out
rename : tests/long/10.mcf/ref/arm/linux/simple-timing/simerr => tests/long/se/10.mcf/ref/arm/linux/simple-timing/simerr
rename : tests/long/10.mcf/ref/arm/linux/simple-timing/simout => tests/long/se/10.mcf/ref/arm/linux/simple-timing/simout
rename : tests/long/10.mcf/ref/arm/linux/simple-timing/stats.txt => tests/long/se/10.mcf/ref/arm/linux/simple-timing/stats.txt
rename : tests/long/10.mcf/ref/sparc/linux/simple-atomic/config.ini => tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/config.ini
rename : tests/long/10.mcf/ref/sparc/linux/simple-atomic/mcf.out => tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/mcf.out
rename : tests/long/10.mcf/ref/sparc/linux/simple-atomic/simerr => tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/simerr
rename : tests/long/10.mcf/ref/sparc/linux/simple-atomic/simout => tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/simout
rename : tests/long/10.mcf/ref/sparc/linux/simple-atomic/stats.txt => tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/stats.txt
rename : tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini => tests/long/se/10.mcf/ref/sparc/linux/simple-timing/config.ini
rename : tests/long/10.mcf/ref/sparc/linux/simple-timing/mcf.out => tests/long/se/10.mcf/ref/sparc/linux/simple-timing/mcf.out
rename : tests/long/10.mcf/ref/sparc/linux/simple-timing/simerr => tests/long/se/10.mcf/ref/sparc/linux/simple-timing/simerr
rename : tests/long/10.mcf/ref/sparc/linux/simple-timing/simout => tests/long/se/10.mcf/ref/sparc/linux/simple-timing/simout
rename : tests/long/10.mcf/ref/sparc/linux/simple-timing/stats.txt => tests/long/se/10.mcf/ref/sparc/linux/simple-timing/stats.txt
rename : tests/long/10.mcf/ref/x86/linux/o3-timing/config.ini => tests/long/se/10.mcf/ref/x86/linux/o3-timing/config.ini
rename : tests/long/10.mcf/ref/x86/linux/o3-timing/mcf.out => tests/long/se/10.mcf/ref/x86/linux/o3-timing/mcf.out
rename : tests/long/10.mcf/ref/x86/linux/o3-timing/simerr => tests/long/se/10.mcf/ref/x86/linux/o3-timing/simerr
rename : tests/long/10.mcf/ref/x86/linux/o3-timing/simout => tests/long/se/10.mcf/ref/x86/linux/o3-timing/simout
rename : tests/long/10.mcf/ref/x86/linux/o3-timing/stats.txt => tests/long/se/10.mcf/ref/x86/linux/o3-timing/stats.txt
rename : tests/long/10.mcf/ref/x86/linux/simple-atomic/config.ini => tests/long/se/10.mcf/ref/x86/linux/simple-atomic/config.ini
rename : tests/long/10.mcf/ref/x86/linux/simple-atomic/mcf.out => tests/long/se/10.mcf/ref/x86/linux/simple-atomic/mcf.out
rename : tests/long/10.mcf/ref/x86/linux/simple-atomic/simerr => tests/long/se/10.mcf/ref/x86/linux/simple-atomic/simerr
rename : tests/long/10.mcf/ref/x86/linux/simple-atomic/simout => tests/long/se/10.mcf/ref/x86/linux/simple-atomic/simout
rename : tests/long/10.mcf/ref/x86/linux/simple-atomic/stats.txt => tests/long/se/10.mcf/ref/x86/linux/simple-atomic/stats.txt
rename : tests/long/10.mcf/ref/x86/linux/simple-timing/config.ini => tests/long/se/10.mcf/ref/x86/linux/simple-timing/config.ini
rename : tests/long/10.mcf/ref/x86/linux/simple-timing/mcf.out => tests/long/se/10.mcf/ref/x86/linux/simple-timing/mcf.out
rename : tests/long/10.mcf/ref/x86/linux/simple-timing/simerr => tests/long/se/10.mcf/ref/x86/linux/simple-timing/simerr
rename : tests/long/10.mcf/ref/x86/linux/simple-timing/simout => tests/long/se/10.mcf/ref/x86/linux/simple-timing/simout
rename : tests/long/10.mcf/ref/x86/linux/simple-timing/stats.txt => tests/long/se/10.mcf/ref/x86/linux/simple-timing/stats.txt
rename : tests/long/10.mcf/test.py => tests/long/se/10.mcf/test.py
rename : tests/long/20.parser/ref/alpha/tru64/NOTE => tests/long/se/20.parser/ref/alpha/tru64/NOTE
rename : tests/long/20.parser/ref/arm/linux/o3-timing/config.ini => tests/long/se/20.parser/ref/arm/linux/o3-timing/config.ini
rename : tests/long/20.parser/ref/arm/linux/o3-timing/simerr => tests/long/se/20.parser/ref/arm/linux/o3-timing/simerr
rename : tests/long/20.parser/ref/arm/linux/o3-timing/simout => tests/long/se/20.parser/ref/arm/linux/o3-timing/simout
rename : tests/long/20.parser/ref/arm/linux/o3-timing/stats.txt => tests/long/se/20.parser/ref/arm/linux/o3-timing/stats.txt
rename : tests/long/20.parser/ref/arm/linux/simple-atomic/config.ini => tests/long/se/20.parser/ref/arm/linux/simple-atomic/config.ini
rename : tests/long/20.parser/ref/arm/linux/simple-atomic/simerr => tests/long/se/20.parser/ref/arm/linux/simple-atomic/simerr
rename : tests/long/20.parser/ref/arm/linux/simple-atomic/simout => tests/long/se/20.parser/ref/arm/linux/simple-atomic/simout
rename : tests/long/20.parser/ref/arm/linux/simple-atomic/stats.txt => tests/long/se/20.parser/ref/arm/linux/simple-atomic/stats.txt
rename : tests/long/20.parser/ref/arm/linux/simple-timing/config.ini => tests/long/se/20.parser/ref/arm/linux/simple-timing/config.ini
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rename : tests/long/30.eon/ref/arm/linux/simple-atomic/simerr => tests/long/se/30.eon/ref/arm/linux/simple-atomic/simerr
rename : tests/long/30.eon/ref/arm/linux/simple-atomic/simout => tests/long/se/30.eon/ref/arm/linux/simple-atomic/simout
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rename : tests/long/30.eon/ref/arm/linux/simple-timing/simerr => tests/long/se/30.eon/ref/arm/linux/simple-timing/simerr
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rename : tests/long/60.bzip2/ref/arm/linux/simple-atomic/simout => tests/long/se/60.bzip2/ref/arm/linux/simple-atomic/simout
rename : tests/long/60.bzip2/ref/arm/linux/simple-atomic/stats.txt => tests/long/se/60.bzip2/ref/arm/linux/simple-atomic/stats.txt
rename : tests/long/60.bzip2/ref/arm/linux/simple-timing/config.ini => tests/long/se/60.bzip2/ref/arm/linux/simple-timing/config.ini
rename : tests/long/60.bzip2/ref/arm/linux/simple-timing/simerr => tests/long/se/60.bzip2/ref/arm/linux/simple-timing/simerr
rename : tests/long/60.bzip2/ref/arm/linux/simple-timing/simout => tests/long/se/60.bzip2/ref/arm/linux/simple-timing/simout
rename : tests/long/60.bzip2/ref/arm/linux/simple-timing/stats.txt => tests/long/se/60.bzip2/ref/arm/linux/simple-timing/stats.txt
rename : tests/long/60.bzip2/ref/x86/linux/simple-atomic/config.ini => tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/config.ini
rename : tests/long/60.bzip2/ref/x86/linux/simple-atomic/simerr => tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/simerr
rename : tests/long/60.bzip2/ref/x86/linux/simple-atomic/simout => tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/simout
rename : tests/long/60.bzip2/ref/x86/linux/simple-atomic/stats.txt => tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/stats.txt
rename : tests/long/60.bzip2/ref/x86/linux/simple-timing/config.ini => tests/long/se/60.bzip2/ref/x86/linux/simple-timing/config.ini
rename : tests/long/60.bzip2/ref/x86/linux/simple-timing/simerr => tests/long/se/60.bzip2/ref/x86/linux/simple-timing/simerr
rename : tests/long/60.bzip2/ref/x86/linux/simple-timing/simout => tests/long/se/60.bzip2/ref/x86/linux/simple-timing/simout
rename : tests/long/60.bzip2/ref/x86/linux/simple-timing/stats.txt => tests/long/se/60.bzip2/ref/x86/linux/simple-timing/stats.txt
rename : tests/long/60.bzip2/test.py => tests/long/se/60.bzip2/test.py
rename : tests/long/70.twolf/ref/alpha/tru64/inorder-timing/config.ini => tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/config.ini
rename : tests/long/70.twolf/ref/alpha/tru64/inorder-timing/simerr => tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/simerr
rename : tests/long/70.twolf/ref/alpha/tru64/inorder-timing/simout => tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/simout
rename : tests/long/70.twolf/ref/alpha/tru64/inorder-timing/smred.out => tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/smred.out
rename : tests/long/70.twolf/ref/alpha/tru64/inorder-timing/smred.pin => tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/smred.pin
rename : tests/long/70.twolf/ref/alpha/tru64/inorder-timing/smred.pl1 => tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/smred.pl1
rename : tests/long/70.twolf/ref/alpha/tru64/inorder-timing/smred.pl2 => tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/smred.pl2
rename : tests/long/70.twolf/ref/alpha/tru64/inorder-timing/smred.sav => tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/smred.sav
rename : tests/long/70.twolf/ref/alpha/tru64/inorder-timing/smred.sv2 => tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/smred.sv2
rename : tests/long/70.twolf/ref/alpha/tru64/inorder-timing/smred.twf => tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/smred.twf
rename : tests/long/70.twolf/ref/alpha/tru64/inorder-timing/stats.txt => tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/stats.txt
rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/config.ini => tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/config.ini
rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/simerr => tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/simerr
rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/simout => tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/simout
rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/smred.out => tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/smred.out
rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/smred.pin => tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/smred.pin
rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/smred.pl1 => tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/smred.pl1
rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/smred.pl2 => tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/smred.pl2
rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/smred.sav => tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/smred.sav
rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/smred.sv2 => tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/smred.sv2
rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/smred.twf => tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/smred.twf
rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/stats.txt => tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/stats.txt
rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/config.ini => tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/config.ini
rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/simerr => tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/simerr
rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/simout => tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/simout
rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/smred.out => tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.out
rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/smred.pin => tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.pin
rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/smred.pl1 => tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.pl1
rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/smred.pl2 => tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.pl2
rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/smred.sav => tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.sav
rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/smred.sv2 => tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.sv2
rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/smred.twf => tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.twf
rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/stats.txt => tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/stats.txt
rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/config.ini => tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/config.ini
rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/simerr => tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/simerr
rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/simout => tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/simout
rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/smred.out => tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/smred.out
rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/smred.pin => tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/smred.pin
rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/smred.pl1 => tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/smred.pl1
rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/smred.pl2 => tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/smred.pl2
rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/smred.sav => tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/smred.sav
rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/smred.sv2 => tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/smred.sv2
rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/smred.twf => tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/smred.twf
rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/stats.txt => tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/stats.txt
rename : tests/long/70.twolf/ref/arm/linux/o3-timing/config.ini => tests/long/se/70.twolf/ref/arm/linux/o3-timing/config.ini
rename : tests/long/70.twolf/ref/arm/linux/o3-timing/simerr => tests/long/se/70.twolf/ref/arm/linux/o3-timing/simerr
rename : tests/long/70.twolf/ref/arm/linux/o3-timing/simout => tests/long/se/70.twolf/ref/arm/linux/o3-timing/simout
rename : tests/long/70.twolf/ref/arm/linux/o3-timing/smred.out => tests/long/se/70.twolf/ref/arm/linux/o3-timing/smred.out
rename : tests/long/70.twolf/ref/arm/linux/o3-timing/stats.txt => tests/long/se/70.twolf/ref/arm/linux/o3-timing/stats.txt
rename : tests/long/70.twolf/ref/arm/linux/simple-atomic/config.ini => tests/long/se/70.twolf/ref/arm/linux/simple-atomic/config.ini
rename : tests/long/70.twolf/ref/arm/linux/simple-atomic/simerr => tests/long/se/70.twolf/ref/arm/linux/simple-atomic/simerr
rename : tests/long/70.twolf/ref/arm/linux/simple-atomic/simout => tests/long/se/70.twolf/ref/arm/linux/simple-atomic/simout
rename : tests/long/70.twolf/ref/arm/linux/simple-atomic/smred.out => tests/long/se/70.twolf/ref/arm/linux/simple-atomic/smred.out
rename : tests/long/70.twolf/ref/arm/linux/simple-atomic/stats.txt => tests/long/se/70.twolf/ref/arm/linux/simple-atomic/stats.txt
rename : tests/long/70.twolf/ref/arm/linux/simple-timing/config.ini => tests/long/se/70.twolf/ref/arm/linux/simple-timing/config.ini
rename : tests/long/70.twolf/ref/arm/linux/simple-timing/simerr => tests/long/se/70.twolf/ref/arm/linux/simple-timing/simerr
rename : tests/long/70.twolf/ref/arm/linux/simple-timing/simout => tests/long/se/70.twolf/ref/arm/linux/simple-timing/simout
rename : tests/long/70.twolf/ref/arm/linux/simple-timing/smred.out => tests/long/se/70.twolf/ref/arm/linux/simple-timing/smred.out
rename : tests/long/70.twolf/ref/arm/linux/simple-timing/stats.txt => tests/long/se/70.twolf/ref/arm/linux/simple-timing/stats.txt
rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/config.ini => tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/config.ini
rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/simerr => tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/simerr
rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/simout => tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/simout
rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/smred.out => tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.out
rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/smred.pin => tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pin
rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/smred.pl1 => tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pl1
rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/smred.pl2 => tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pl2
rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/smred.sav => tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.sav
rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/smred.sv2 => tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.sv2
rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/smred.twf => tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.twf
rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/stats.txt => tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/stats.txt
rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/config.ini => tests/long/se/70.twolf/ref/sparc/linux/simple-timing/config.ini
rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/simerr => tests/long/se/70.twolf/ref/sparc/linux/simple-timing/simerr
rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/simout => tests/long/se/70.twolf/ref/sparc/linux/simple-timing/simout
rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/smred.out => tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.out
rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/smred.pin => tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.pin
rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/smred.pl1 => tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.pl1
rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/smred.pl2 => tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.pl2
rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/smred.sav => tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.sav
rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/smred.sv2 => tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.sv2
rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/smred.twf => tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.twf
rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/stats.txt => tests/long/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt
rename : tests/long/70.twolf/ref/x86/linux/o3-timing/config.ini => tests/long/se/70.twolf/ref/x86/linux/o3-timing/config.ini
rename : tests/long/70.twolf/ref/x86/linux/o3-timing/simerr => tests/long/se/70.twolf/ref/x86/linux/o3-timing/simerr
rename : tests/long/70.twolf/ref/x86/linux/o3-timing/simout => tests/long/se/70.twolf/ref/x86/linux/o3-timing/simout
rename : tests/long/70.twolf/ref/x86/linux/o3-timing/smred.out => tests/long/se/70.twolf/ref/x86/linux/o3-timing/smred.out
rename : tests/long/70.twolf/ref/x86/linux/o3-timing/smred.pin => tests/long/se/70.twolf/ref/x86/linux/o3-timing/smred.pin
rename : tests/long/70.twolf/ref/x86/linux/o3-timing/smred.pl1 => tests/long/se/70.twolf/ref/x86/linux/o3-timing/smred.pl1
rename : tests/long/70.twolf/ref/x86/linux/o3-timing/smred.pl2 => tests/long/se/70.twolf/ref/x86/linux/o3-timing/smred.pl2
rename : tests/long/70.twolf/ref/x86/linux/o3-timing/smred.sav => tests/long/se/70.twolf/ref/x86/linux/o3-timing/smred.sav
rename : tests/long/70.twolf/ref/x86/linux/o3-timing/smred.sv2 => tests/long/se/70.twolf/ref/x86/linux/o3-timing/smred.sv2
rename : tests/long/70.twolf/ref/x86/linux/o3-timing/smred.twf => tests/long/se/70.twolf/ref/x86/linux/o3-timing/smred.twf
rename : tests/long/70.twolf/ref/x86/linux/o3-timing/stats.txt => tests/long/se/70.twolf/ref/x86/linux/o3-timing/stats.txt
rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/config.ini => tests/long/se/70.twolf/ref/x86/linux/simple-atomic/config.ini
rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/simerr => tests/long/se/70.twolf/ref/x86/linux/simple-atomic/simerr
rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/simout => tests/long/se/70.twolf/ref/x86/linux/simple-atomic/simout
rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/smred.out => tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.out
rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/smred.pin => tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.pin
rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/smred.pl1 => tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.pl1
rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/smred.pl2 => tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.pl2
rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/smred.sav => tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.sav
rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/smred.sv2 => tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.sv2
rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/smred.twf => tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.twf
rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/stats.txt => tests/long/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt
rename : tests/long/70.twolf/ref/x86/linux/simple-timing/config.ini => tests/long/se/70.twolf/ref/x86/linux/simple-timing/config.ini
rename : tests/long/70.twolf/ref/x86/linux/simple-timing/simerr => tests/long/se/70.twolf/ref/x86/linux/simple-timing/simerr
rename : tests/long/70.twolf/ref/x86/linux/simple-timing/simout => tests/long/se/70.twolf/ref/x86/linux/simple-timing/simout
rename : tests/long/70.twolf/ref/x86/linux/simple-timing/smred.out => tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.out
rename : tests/long/70.twolf/ref/x86/linux/simple-timing/smred.pin => tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.pin
rename : tests/long/70.twolf/ref/x86/linux/simple-timing/smred.pl1 => tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.pl1
rename : tests/long/70.twolf/ref/x86/linux/simple-timing/smred.pl2 => tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.pl2
rename : tests/long/70.twolf/ref/x86/linux/simple-timing/smred.sav => tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.sav
rename : tests/long/70.twolf/ref/x86/linux/simple-timing/smred.sv2 => tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.sv2
rename : tests/long/70.twolf/ref/x86/linux/simple-timing/smred.twf => tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.twf
rename : tests/long/70.twolf/ref/x86/linux/simple-timing/stats.txt => tests/long/se/70.twolf/ref/x86/linux/simple-timing/stats.txt
rename : tests/long/70.twolf/test.py => tests/long/se/70.twolf/test.py
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/simerr => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/simerr
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/simout => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/simout
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stats.txt => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stats.txt
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/system.terminal => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/system.terminal
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simerr => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simerr
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simout => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simout
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/system.terminal => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/system.terminal
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/simerr => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/simerr
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/simout => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/simout
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stats.txt => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stats.txt
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/system.terminal => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/system.terminal
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simerr => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simerr
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simout => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simout
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stats.txt => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stats.txt
rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/system.terminal => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/system.terminal
rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/config.ini => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/config.ini
rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/simerr => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/simerr
rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/simout => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/simout
rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/stats.txt => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/stats.txt
rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/status => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/status
rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/system.terminal => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/system.terminal
rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/config.ini => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/config.ini
rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/simerr => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/simerr
rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/simout => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/simout
rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/stats.txt => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/stats.txt
rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/status => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/status
rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/system.terminal => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/system.terminal
rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/config.ini => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/config.ini
rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/simerr => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/simerr
rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/simout => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/simout
rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/stats.txt => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/stats.txt
rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/status => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/status
rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/system.terminal => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/system.terminal
rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/config.ini => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/config.ini
rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/simerr => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/simerr
rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/simout => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/simout
rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/stats.txt => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/stats.txt
rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/status => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/status
rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/system.terminal => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/system.terminal
rename : tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/config.ini => tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/config.ini
rename : tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/simerr => tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/simerr
rename : tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/simout => tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/simout
rename : tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt => tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt
rename : tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/system.pc.terminal => tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/system.pc.terminal
rename : tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/config.ini => tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/config.ini
rename : tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/simerr => tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/simerr
rename : tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/simout => tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/simout
rename : tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt => tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt
rename : tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/system.pc.terminal => tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/system.pc.terminal
rename : tests/quick/10.linux-boot/test.py => tests/quick/fs/10.linux-boot/test.py
rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini => tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini
rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/drivesys.terminal => tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/drivesys.terminal
rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/simerr => tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/simerr
rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/simout => tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/simout
rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt => tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt
rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/testsys.terminal => tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/testsys.terminal
rename : tests/quick/80.netperf-stream/test.py => tests/quick/fs/80.netperf-stream/test.py
rename : tests/quick/00.hello.mp/test.py => tests/quick/se/00.hello.mp/test.py
rename : tests/quick/00.hello/ref/alpha/linux/inorder-timing/config.ini => tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/config.ini
rename : tests/quick/00.hello/ref/alpha/linux/inorder-timing/simerr => tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/simerr
rename : tests/quick/00.hello/ref/alpha/linux/inorder-timing/simout => tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/simout
rename : tests/quick/00.hello/ref/alpha/linux/inorder-timing/stats.txt => tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/stats.txt
rename : tests/quick/00.hello/ref/alpha/linux/o3-timing/config.ini => tests/quick/se/00.hello/ref/alpha/linux/o3-timing/config.ini
rename : tests/quick/00.hello/ref/alpha/linux/o3-timing/simerr => tests/quick/se/00.hello/ref/alpha/linux/o3-timing/simerr
rename : tests/quick/00.hello/ref/alpha/linux/o3-timing/simout => tests/quick/se/00.hello/ref/alpha/linux/o3-timing/simout
rename : tests/quick/00.hello/ref/alpha/linux/o3-timing/stats.txt => tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt
rename : tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.ini => tests/quick/se/00.hello/ref/alpha/linux/simple-atomic/config.ini
rename : tests/quick/00.hello/ref/alpha/linux/simple-atomic/simerr => tests/quick/se/00.hello/ref/alpha/linux/simple-atomic/simerr
rename : tests/quick/00.hello/ref/alpha/linux/simple-atomic/simout => tests/quick/se/00.hello/ref/alpha/linux/simple-atomic/simout
rename : tests/quick/00.hello/ref/alpha/linux/simple-atomic/stats.txt => tests/quick/se/00.hello/ref/alpha/linux/simple-atomic/stats.txt
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/config.ini => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/config.ini
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/ruby.stats => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/ruby.stats
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simerr => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simerr
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simout => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simout
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/stats.txt => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/stats.txt
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/config.ini => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/config.ini
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/ruby.stats => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/ruby.stats
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/simerr => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/simerr
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/simout => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/simout
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/stats.txt => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/stats.txt
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/config.ini => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/config.ini
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/ruby.stats => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/ruby.stats
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/simerr => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/simerr
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/simout => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/simout
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/stats.txt => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/stats.txt
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/config.ini => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/config.ini
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/ruby.stats => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/ruby.stats
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/simerr => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/simerr
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/simout => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/simout
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/stats.txt => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/stats.txt
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby/config.ini => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/config.ini
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby/simerr => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/simerr
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby/simout => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/simout
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini => tests/quick/se/00.hello/ref/alpha/linux/simple-timing/config.ini
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing/simerr => tests/quick/se/00.hello/ref/alpha/linux/simple-timing/simerr
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing/simout => tests/quick/se/00.hello/ref/alpha/linux/simple-timing/simout
rename : tests/quick/00.hello/ref/alpha/linux/simple-timing/stats.txt => tests/quick/se/00.hello/ref/alpha/linux/simple-timing/stats.txt
rename : tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini => tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/config.ini
rename : tests/quick/00.hello/ref/alpha/tru64/o3-timing/simerr => tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/simerr
rename : tests/quick/00.hello/ref/alpha/tru64/o3-timing/simout => tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/simout
rename : tests/quick/00.hello/ref/alpha/tru64/o3-timing/stats.txt => tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt
rename : tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini => tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/config.ini
rename : tests/quick/00.hello/ref/alpha/tru64/simple-atomic/simerr => tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/simerr
rename : tests/quick/00.hello/ref/alpha/tru64/simple-atomic/simout => tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/simout
rename : tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stats.txt => tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/stats.txt
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simerr => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simerr
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simout => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simout
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/config.ini => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/config.ini
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/ruby.stats => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/ruby.stats
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simerr => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simerr
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simout => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simout
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/stats.txt => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/stats.txt
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/config.ini => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/config.ini
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/ruby.stats => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/ruby.stats
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simerr => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simerr
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simout => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simout
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/config.ini => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/config.ini
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/ruby.stats => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/ruby.stats
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simerr => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simerr
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simout => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simout
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby/config.ini => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/config.ini
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby/ruby.stats => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/ruby.stats
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby/simerr => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/simerr
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby/simout => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/simout
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby/stats.txt => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/stats.txt
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/config.ini
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing/simerr => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/simerr
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing/simout => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/simout
rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing/stats.txt => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/stats.txt
rename : tests/quick/00.hello/ref/arm/linux/o3-timing/config.ini => tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini
rename : tests/quick/00.hello/ref/arm/linux/o3-timing/simerr => tests/quick/se/00.hello/ref/arm/linux/o3-timing/simerr
rename : tests/quick/00.hello/ref/arm/linux/o3-timing/simout => tests/quick/se/00.hello/ref/arm/linux/o3-timing/simout
rename : tests/quick/00.hello/ref/arm/linux/o3-timing/stats.txt => tests/quick/se/00.hello/ref/arm/linux/o3-timing/stats.txt
rename : tests/quick/00.hello/ref/arm/linux/simple-atomic/config.ini => tests/quick/se/00.hello/ref/arm/linux/simple-atomic/config.ini
rename : tests/quick/00.hello/ref/arm/linux/simple-atomic/simerr => tests/quick/se/00.hello/ref/arm/linux/simple-atomic/simerr
rename : tests/quick/00.hello/ref/arm/linux/simple-atomic/simout => tests/quick/se/00.hello/ref/arm/linux/simple-atomic/simout
rename : tests/quick/00.hello/ref/arm/linux/simple-atomic/stats.txt => tests/quick/se/00.hello/ref/arm/linux/simple-atomic/stats.txt
rename : tests/quick/00.hello/ref/arm/linux/simple-timing/config.ini => tests/quick/se/00.hello/ref/arm/linux/simple-timing/config.ini
rename : tests/quick/00.hello/ref/arm/linux/simple-timing/simerr => tests/quick/se/00.hello/ref/arm/linux/simple-timing/simerr
rename : tests/quick/00.hello/ref/arm/linux/simple-timing/simout => tests/quick/se/00.hello/ref/arm/linux/simple-timing/simout
rename : tests/quick/00.hello/ref/arm/linux/simple-timing/stats.txt => tests/quick/se/00.hello/ref/arm/linux/simple-timing/stats.txt
rename : tests/quick/00.hello/ref/mips/linux/inorder-timing/config.ini => tests/quick/se/00.hello/ref/mips/linux/inorder-timing/config.ini
rename : tests/quick/00.hello/ref/mips/linux/inorder-timing/simerr => tests/quick/se/00.hello/ref/mips/linux/inorder-timing/simerr
rename : tests/quick/00.hello/ref/mips/linux/inorder-timing/simout => tests/quick/se/00.hello/ref/mips/linux/inorder-timing/simout
rename : tests/quick/00.hello/ref/mips/linux/inorder-timing/stats.txt => tests/quick/se/00.hello/ref/mips/linux/inorder-timing/stats.txt
rename : tests/quick/00.hello/ref/mips/linux/o3-timing/config.ini => tests/quick/se/00.hello/ref/mips/linux/o3-timing/config.ini
rename : tests/quick/00.hello/ref/mips/linux/o3-timing/simerr => tests/quick/se/00.hello/ref/mips/linux/o3-timing/simerr
rename : tests/quick/00.hello/ref/mips/linux/o3-timing/simout => tests/quick/se/00.hello/ref/mips/linux/o3-timing/simout
rename : tests/quick/00.hello/ref/mips/linux/o3-timing/stats.txt => tests/quick/se/00.hello/ref/mips/linux/o3-timing/stats.txt
rename : tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini => tests/quick/se/00.hello/ref/mips/linux/simple-atomic/config.ini
rename : tests/quick/00.hello/ref/mips/linux/simple-atomic/simerr => tests/quick/se/00.hello/ref/mips/linux/simple-atomic/simerr
rename : tests/quick/00.hello/ref/mips/linux/simple-atomic/simout => tests/quick/se/00.hello/ref/mips/linux/simple-atomic/simout
rename : tests/quick/00.hello/ref/mips/linux/simple-atomic/stats.txt => tests/quick/se/00.hello/ref/mips/linux/simple-atomic/stats.txt
rename : tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/config.ini => tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/config.ini
rename : tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/simerr => tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/simerr
rename : tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/simout => tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/simout
rename : tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/stats.txt => tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/stats.txt
rename : tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini => tests/quick/se/00.hello/ref/mips/linux/simple-timing/config.ini
rename : tests/quick/00.hello/ref/mips/linux/simple-timing/simerr => tests/quick/se/00.hello/ref/mips/linux/simple-timing/simerr
rename : tests/quick/00.hello/ref/mips/linux/simple-timing/simout => tests/quick/se/00.hello/ref/mips/linux/simple-timing/simout
rename : tests/quick/00.hello/ref/mips/linux/simple-timing/stats.txt => tests/quick/se/00.hello/ref/mips/linux/simple-timing/stats.txt
rename : tests/quick/00.hello/ref/power/linux/o3-timing/config.ini => tests/quick/se/00.hello/ref/power/linux/o3-timing/config.ini
rename : tests/quick/00.hello/ref/power/linux/o3-timing/simerr => tests/quick/se/00.hello/ref/power/linux/o3-timing/simerr
rename : tests/quick/00.hello/ref/power/linux/o3-timing/simout => tests/quick/se/00.hello/ref/power/linux/o3-timing/simout
rename : tests/quick/00.hello/ref/power/linux/o3-timing/stats.txt => tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt
rename : tests/quick/00.hello/ref/power/linux/simple-atomic/config.ini => tests/quick/se/00.hello/ref/power/linux/simple-atomic/config.ini
rename : tests/quick/00.hello/ref/power/linux/simple-atomic/simerr => tests/quick/se/00.hello/ref/power/linux/simple-atomic/simerr
rename : tests/quick/00.hello/ref/power/linux/simple-atomic/simout => tests/quick/se/00.hello/ref/power/linux/simple-atomic/simout
rename : tests/quick/00.hello/ref/power/linux/simple-atomic/stats.txt => tests/quick/se/00.hello/ref/power/linux/simple-atomic/stats.txt
rename : tests/quick/00.hello/ref/sparc/linux/inorder-timing/config.ini => tests/quick/se/00.hello/ref/sparc/linux/inorder-timing/config.ini
rename : tests/quick/00.hello/ref/sparc/linux/inorder-timing/simerr => tests/quick/se/00.hello/ref/sparc/linux/inorder-timing/simerr
rename : tests/quick/00.hello/ref/sparc/linux/inorder-timing/simout => tests/quick/se/00.hello/ref/sparc/linux/inorder-timing/simout
rename : tests/quick/00.hello/ref/sparc/linux/inorder-timing/stats.txt => tests/quick/se/00.hello/ref/sparc/linux/inorder-timing/stats.txt
rename : tests/quick/00.hello/ref/sparc/linux/simple-atomic/config.ini => tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/config.ini
rename : tests/quick/00.hello/ref/sparc/linux/simple-atomic/simerr => tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/simerr
rename : tests/quick/00.hello/ref/sparc/linux/simple-atomic/simout => tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/simout
rename : tests/quick/00.hello/ref/sparc/linux/simple-atomic/stats.txt => tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/stats.txt
rename : tests/quick/00.hello/ref/sparc/linux/simple-timing-ruby/config.ini => tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/config.ini
rename : tests/quick/00.hello/ref/sparc/linux/simple-timing-ruby/ruby.stats => tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/ruby.stats
rename : tests/quick/00.hello/ref/sparc/linux/simple-timing-ruby/simerr => tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/simerr
rename : tests/quick/00.hello/ref/sparc/linux/simple-timing-ruby/simout => tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/simout
rename : tests/quick/00.hello/ref/sparc/linux/simple-timing-ruby/stats.txt => tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/stats.txt
rename : tests/quick/00.hello/ref/sparc/linux/simple-timing/config.ini => tests/quick/se/00.hello/ref/sparc/linux/simple-timing/config.ini
rename : tests/quick/00.hello/ref/sparc/linux/simple-timing/simerr => tests/quick/se/00.hello/ref/sparc/linux/simple-timing/simerr
rename : tests/quick/00.hello/ref/sparc/linux/simple-timing/simout => tests/quick/se/00.hello/ref/sparc/linux/simple-timing/simout
rename : tests/quick/00.hello/ref/sparc/linux/simple-timing/stats.txt => tests/quick/se/00.hello/ref/sparc/linux/simple-timing/stats.txt
rename : tests/quick/00.hello/ref/x86/linux/o3-timing/config.ini => tests/quick/se/00.hello/ref/x86/linux/o3-timing/config.ini
rename : tests/quick/00.hello/ref/x86/linux/o3-timing/simerr => tests/quick/se/00.hello/ref/x86/linux/o3-timing/simerr
rename : tests/quick/00.hello/ref/x86/linux/o3-timing/simout => tests/quick/se/00.hello/ref/x86/linux/o3-timing/simout
rename : tests/quick/00.hello/ref/x86/linux/o3-timing/stats.txt => tests/quick/se/00.hello/ref/x86/linux/o3-timing/stats.txt
rename : tests/quick/00.hello/ref/x86/linux/simple-atomic/config.ini => tests/quick/se/00.hello/ref/x86/linux/simple-atomic/config.ini
rename : tests/quick/00.hello/ref/x86/linux/simple-atomic/simerr => tests/quick/se/00.hello/ref/x86/linux/simple-atomic/simerr
rename : tests/quick/00.hello/ref/x86/linux/simple-atomic/simout => tests/quick/se/00.hello/ref/x86/linux/simple-atomic/simout
rename : tests/quick/00.hello/ref/x86/linux/simple-atomic/stats.txt => tests/quick/se/00.hello/ref/x86/linux/simple-atomic/stats.txt
rename : tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/config.ini => tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/config.ini
rename : tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats => tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats
rename : tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/simerr => tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simerr
rename : tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/simout => tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout
rename : tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt => tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt
rename : tests/quick/00.hello/ref/x86/linux/simple-timing/config.ini => tests/quick/se/00.hello/ref/x86/linux/simple-timing/config.ini
rename : tests/quick/00.hello/ref/x86/linux/simple-timing/simerr => tests/quick/se/00.hello/ref/x86/linux/simple-timing/simerr
rename : tests/quick/00.hello/ref/x86/linux/simple-timing/simout => tests/quick/se/00.hello/ref/x86/linux/simple-timing/simout
rename : tests/quick/00.hello/ref/x86/linux/simple-timing/stats.txt => tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt
rename : tests/quick/00.hello/test.py => tests/quick/se/00.hello/test.py
rename : tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini => tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini
rename : tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/simerr => tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/simerr
rename : tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/simout => tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/simout
rename : tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stats.txt => tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/stats.txt
rename : tests/quick/01.hello-2T-smt/test.py => tests/quick/se/01.hello-2T-smt/test.py
rename : tests/quick/02.insttest/ref/sparc/linux/inorder-timing/config.ini => tests/quick/se/02.insttest/ref/sparc/linux/inorder-timing/config.ini
rename : tests/quick/02.insttest/ref/sparc/linux/inorder-timing/simerr => tests/quick/se/02.insttest/ref/sparc/linux/inorder-timing/simerr
rename : tests/quick/02.insttest/ref/sparc/linux/inorder-timing/simout => tests/quick/se/02.insttest/ref/sparc/linux/inorder-timing/simout
rename : tests/quick/02.insttest/ref/sparc/linux/inorder-timing/stats.txt => tests/quick/se/02.insttest/ref/sparc/linux/inorder-timing/stats.txt
rename : tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini => tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/config.ini
rename : tests/quick/02.insttest/ref/sparc/linux/o3-timing/simerr => tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simerr
rename : tests/quick/02.insttest/ref/sparc/linux/o3-timing/simout => tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simout
rename : tests/quick/02.insttest/ref/sparc/linux/o3-timing/stats.txt => tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt
rename : tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini => tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/config.ini
rename : tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simerr => tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/simerr
rename : tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simout => tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/simout
rename : tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stats.txt => tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/stats.txt
rename : tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.ini => tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/config.ini
rename : tests/quick/02.insttest/ref/sparc/linux/simple-timing/simerr => tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/simerr
rename : tests/quick/02.insttest/ref/sparc/linux/simple-timing/simout => tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/simout
rename : tests/quick/02.insttest/ref/sparc/linux/simple-timing/stats.txt => tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/stats.txt
rename : tests/quick/02.insttest/test.py => tests/quick/se/02.insttest/test.py
rename : tests/quick/20.eio-short/ref/alpha/eio/detailed/config.ini => tests/quick/se/20.eio-short/ref/alpha/eio/detailed/config.ini
rename : tests/quick/20.eio-short/ref/alpha/eio/detailed/simerr => tests/quick/se/20.eio-short/ref/alpha/eio/detailed/simerr
rename : tests/quick/20.eio-short/ref/alpha/eio/detailed/simout => tests/quick/se/20.eio-short/ref/alpha/eio/detailed/simout
rename : tests/quick/20.eio-short/ref/alpha/eio/detailed/stats.txt => tests/quick/se/20.eio-short/ref/alpha/eio/detailed/stats.txt
rename : tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini => tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/config.ini
rename : tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/simerr => tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/simerr
rename : tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/simout => tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/simout
rename : tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stats.txt => tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/stats.txt
rename : tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini => tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/config.ini
rename : tests/quick/20.eio-short/ref/alpha/eio/simple-timing/simerr => tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/simerr
rename : tests/quick/20.eio-short/ref/alpha/eio/simple-timing/simout => tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/simout
rename : tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stats.txt => tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/stats.txt
rename : tests/quick/20.eio-short/test.py => tests/quick/se/20.eio-short/test.py
rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/config.ini => tests/quick/se/30.eio-mp/ref/alpha/eio/simple-atomic-mp/config.ini
rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simerr => tests/quick/se/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simerr
rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simout => tests/quick/se/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simout
rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stats.txt => tests/quick/se/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stats.txt
rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.ini => tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.ini
rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simerr => tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/simerr
rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simout => tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/simout
rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/stats.txt => tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/stats.txt
rename : tests/quick/30.eio-mp/test.py => tests/quick/se/30.eio-mp/test.py
rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/config.ini => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/config.ini
rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simerr => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simerr
rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simout => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simout
rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/stats.txt => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/stats.txt
rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/config.ini => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/config.ini
rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simerr => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simerr
rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simout => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simout
rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/stats.txt => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/stats.txt
rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/config.ini => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/config.ini
rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/ruby.stats => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/ruby.stats
rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/simerr => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/simerr
rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/simout => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/simout
rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/skip => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/skip
rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/stats.txt => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/stats.txt
rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini
rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simerr => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simerr
rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simout => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simout
rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/stats.txt => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/stats.txt
rename : tests/quick/40.m5threads-test-atomic/test.py => tests/quick/se/40.m5threads-test-atomic/test.py
rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/config.ini => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/config.ini
rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/ruby.stats => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/ruby.stats
rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simerr => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simerr
rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simout => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simout
rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/stats.txt => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/stats.txt
rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/config.ini => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/config.ini
rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/ruby.stats => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/ruby.stats
rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/simerr => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/simerr
rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/simout => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/simout
rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/stats.txt => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/stats.txt
rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/config.ini => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/config.ini
rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/ruby.stats => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/ruby.stats
rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/simerr => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/simerr
rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/simout => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/simout
rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/stats.txt => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/stats.txt
rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/config.ini => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/config.ini
rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/ruby.stats => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/ruby.stats
rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/simerr => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/simerr
rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/simout => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/simout
rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/stats.txt => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/stats.txt
rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/config.ini => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/config.ini
rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/ruby.stats => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/ruby.stats
rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/simerr => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/simerr
rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/simout => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/simout
rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt
rename : tests/quick/50.memtest/ref/alpha/linux/memtest/config.ini => tests/quick/se/50.memtest/ref/alpha/linux/memtest/config.ini
rename : tests/quick/50.memtest/ref/alpha/linux/memtest/simerr => tests/quick/se/50.memtest/ref/alpha/linux/memtest/simerr
rename : tests/quick/50.memtest/ref/alpha/linux/memtest/simout => tests/quick/se/50.memtest/ref/alpha/linux/memtest/simout
rename : tests/quick/50.memtest/ref/alpha/linux/memtest/stats.txt => tests/quick/se/50.memtest/ref/alpha/linux/memtest/stats.txt
rename : tests/quick/50.memtest/test.py => tests/quick/se/50.memtest/test.py
rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/config.ini => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/config.ini
rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/ruby.stats => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/ruby.stats
rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simerr => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simerr
rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simout => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simout
rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt
rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/config.ini => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/config.ini
rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/ruby.stats => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/ruby.stats
rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simerr => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simerr
rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simout => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simout
rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/stats.txt => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/stats.txt
rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/config.ini => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/config.ini
rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/ruby.stats => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/ruby.stats
rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/simerr => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/simerr
rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/simout => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/simout
rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/stats.txt => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/stats.txt
rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/config.ini => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/config.ini
rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/ruby.stats => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/ruby.stats
rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simerr => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simerr
rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simout => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simout
rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/stats.txt => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/stats.txt
rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/config.ini => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/config.ini
rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/ruby.stats => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/ruby.stats
rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/simerr => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/simerr
rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/simout => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/simout
rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/stats.txt => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/stats.txt
rename : tests/quick/60.rubytest/test.py => tests/quick/se/60.rubytest/test.py
Diffstat (limited to 'tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory')
5 files changed, 0 insertions, 1969 deletions
diff --git a/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/config.ini b/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/config.ini deleted file mode 100644 index b96bfd745..000000000 --- a/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/config.ini +++ /dev/null @@ -1,928 +0,0 @@ -[root] -type=Root -children=system -time_sync_enable=false -time_sync_period=100000000 -time_sync_spin_threshold=100000 - -[system] -type=System -children=cpu0 cpu1 cpu2 cpu3 cpu4 cpu5 cpu6 cpu7 dir_cntrl0 funcmem l1_cntrl0 l1_cntrl1 l1_cntrl2 l1_cntrl3 l1_cntrl4 l1_cntrl5 l1_cntrl6 l1_cntrl7 l2_cntrl0 physmem ruby sys_port_proxy -mem_mode=timing -memories=system.physmem system.funcmem -num_work_ids=16 -physmem=system.physmem -work_begin_ckpt_count=0 -work_begin_cpu_id_exit=-1 -work_begin_exit_count=0 -work_cpus_ckpt_count=0 -work_end_ckpt_count=0 -work_end_exit_count=0 -work_item_id=-1 -system_port=system.sys_port_proxy.port[0] - -[system.cpu0] -type=MemTest -atomic=false -issue_dmas=false -max_loads=100000 -memory_size=65536 -percent_dest_unaligned=50 -percent_functional=50 -percent_reads=65 -percent_source_unaligned=50 -percent_uncacheable=0 -progress_interval=10000 -suppress_func_warnings=true -trace_addr=0 -functional=system.funcmem.port[0] -test=system.l1_cntrl0.sequencer.port[0] - -[system.cpu1] -type=MemTest -atomic=false -issue_dmas=false -max_loads=100000 -memory_size=65536 -percent_dest_unaligned=50 -percent_functional=50 -percent_reads=65 -percent_source_unaligned=50 -percent_uncacheable=0 -progress_interval=10000 -suppress_func_warnings=true -trace_addr=0 -functional=system.funcmem.port[1] -test=system.l1_cntrl1.sequencer.port[0] - -[system.cpu2] -type=MemTest -atomic=false -issue_dmas=false -max_loads=100000 -memory_size=65536 -percent_dest_unaligned=50 -percent_functional=50 -percent_reads=65 -percent_source_unaligned=50 -percent_uncacheable=0 -progress_interval=10000 -suppress_func_warnings=true -trace_addr=0 -functional=system.funcmem.port[2] -test=system.l1_cntrl2.sequencer.port[0] - -[system.cpu3] -type=MemTest -atomic=false -issue_dmas=false -max_loads=100000 -memory_size=65536 -percent_dest_unaligned=50 -percent_functional=50 -percent_reads=65 -percent_source_unaligned=50 -percent_uncacheable=0 -progress_interval=10000 -suppress_func_warnings=true -trace_addr=0 -functional=system.funcmem.port[3] -test=system.l1_cntrl3.sequencer.port[0] - -[system.cpu4] -type=MemTest -atomic=false -issue_dmas=false -max_loads=100000 -memory_size=65536 -percent_dest_unaligned=50 -percent_functional=50 -percent_reads=65 -percent_source_unaligned=50 -percent_uncacheable=0 -progress_interval=10000 -suppress_func_warnings=true -trace_addr=0 -functional=system.funcmem.port[4] -test=system.l1_cntrl4.sequencer.port[0] - -[system.cpu5] -type=MemTest -atomic=false -issue_dmas=false -max_loads=100000 -memory_size=65536 -percent_dest_unaligned=50 -percent_functional=50 -percent_reads=65 -percent_source_unaligned=50 -percent_uncacheable=0 -progress_interval=10000 -suppress_func_warnings=true -trace_addr=0 -functional=system.funcmem.port[5] -test=system.l1_cntrl5.sequencer.port[0] - -[system.cpu6] -type=MemTest -atomic=false -issue_dmas=false -max_loads=100000 -memory_size=65536 -percent_dest_unaligned=50 -percent_functional=50 -percent_reads=65 -percent_source_unaligned=50 -percent_uncacheable=0 -progress_interval=10000 -suppress_func_warnings=true -trace_addr=0 -functional=system.funcmem.port[6] -test=system.l1_cntrl6.sequencer.port[0] - -[system.cpu7] -type=MemTest -atomic=false -issue_dmas=false -max_loads=100000 -memory_size=65536 -percent_dest_unaligned=50 -percent_functional=50 -percent_reads=65 -percent_source_unaligned=50 -percent_uncacheable=0 -progress_interval=10000 -suppress_func_warnings=true -trace_addr=0 -functional=system.funcmem.port[7] -test=system.l1_cntrl7.sequencer.port[0] - -[system.dir_cntrl0] -type=Directory_Controller -children=directory memBuffer -buffer_size=0 -cntrl_id=9 -directory=system.dir_cntrl0.directory -directory_latency=6 -memBuffer=system.dir_cntrl0.memBuffer -number_of_TBEs=256 -recycle_latency=10 -ruby_system=system.ruby -to_mem_ctrl_latency=1 -transitions_per_cycle=32 -version=0 - -[system.dir_cntrl0.directory] -type=RubyDirectoryMemory -map_levels=4 -numa_high_bit=6 -size=134217728 -use_map=false -version=0 - -[system.dir_cntrl0.memBuffer] -type=RubyMemoryControl -bank_bit_0=8 -bank_busy_time=11 -bank_queue_size=12 -banks_per_rank=8 -basic_bus_busy_time=2 -dimm_bit_0=12 -dimms_per_channel=2 -mem_bus_cycle_multiplier=10 -mem_ctl_latency=12 -mem_fixed_delay=0 -mem_random_arbitrate=0 -rank_bit_0=11 -rank_rank_delay=1 -ranks_per_dimm=2 -read_write_delay=2 -refresh_period=1560 -tFaw=0 -version=0 - -[system.funcmem] -type=PhysicalMemory -file= -latency=30 -latency_var=0 -null=false -range=0:134217727 -zero=false -port=system.cpu0.functional system.cpu1.functional system.cpu2.functional system.cpu3.functional system.cpu4.functional system.cpu5.functional system.cpu6.functional system.cpu7.functional - -[system.l1_cntrl0] -type=L1Cache_Controller -children=L1DcacheMemory L1IcacheMemory sequencer -L1DcacheMemory=system.l1_cntrl0.L1DcacheMemory -L1IcacheMemory=system.l1_cntrl0.L1IcacheMemory -buffer_size=0 -cntrl_id=0 -l1_request_latency=2 -l1_response_latency=2 -l2_select_num_bits=0 -number_of_TBEs=256 -recycle_latency=10 -ruby_system=system.ruby -sequencer=system.l1_cntrl0.sequencer -to_l2_latency=1 -transitions_per_cycle=32 -version=0 - -[system.l1_cntrl0.L1DcacheMemory] -type=RubyCache -assoc=2 -is_icache=false -latency=3 -replacement_policy=PSEUDO_LRU -size=256 -start_index_bit=6 - -[system.l1_cntrl0.L1IcacheMemory] -type=RubyCache -assoc=2 -is_icache=false -latency=3 -replacement_policy=PSEUDO_LRU -size=256 -start_index_bit=6 - -[system.l1_cntrl0.sequencer] -type=RubySequencer -access_phys_mem=false -dcache=system.l1_cntrl0.L1DcacheMemory -deadlock_threshold=1000000 -icache=system.l1_cntrl0.L1IcacheMemory -max_outstanding_requests=16 -physmem=system.physmem -ruby_system=system.ruby -using_network_tester=false -using_ruby_tester=false -version=0 -physMemPort=system.physmem.port[0] -port=system.cpu0.test - -[system.l1_cntrl1] -type=L1Cache_Controller -children=L1DcacheMemory L1IcacheMemory sequencer -L1DcacheMemory=system.l1_cntrl1.L1DcacheMemory -L1IcacheMemory=system.l1_cntrl1.L1IcacheMemory -buffer_size=0 -cntrl_id=1 -l1_request_latency=2 -l1_response_latency=2 -l2_select_num_bits=0 -number_of_TBEs=256 -recycle_latency=10 -ruby_system=system.ruby -sequencer=system.l1_cntrl1.sequencer -to_l2_latency=1 -transitions_per_cycle=32 -version=1 - -[system.l1_cntrl1.L1DcacheMemory] -type=RubyCache -assoc=2 -is_icache=false -latency=3 -replacement_policy=PSEUDO_LRU -size=256 -start_index_bit=6 - -[system.l1_cntrl1.L1IcacheMemory] -type=RubyCache -assoc=2 -is_icache=false -latency=3 -replacement_policy=PSEUDO_LRU -size=256 -start_index_bit=6 - -[system.l1_cntrl1.sequencer] -type=RubySequencer -access_phys_mem=false -dcache=system.l1_cntrl1.L1DcacheMemory -deadlock_threshold=1000000 -icache=system.l1_cntrl1.L1IcacheMemory -max_outstanding_requests=16 -physmem=system.physmem -ruby_system=system.ruby -using_network_tester=false -using_ruby_tester=false -version=1 -physMemPort=system.physmem.port[1] -port=system.cpu1.test - -[system.l1_cntrl2] -type=L1Cache_Controller -children=L1DcacheMemory L1IcacheMemory sequencer -L1DcacheMemory=system.l1_cntrl2.L1DcacheMemory -L1IcacheMemory=system.l1_cntrl2.L1IcacheMemory -buffer_size=0 -cntrl_id=2 -l1_request_latency=2 -l1_response_latency=2 -l2_select_num_bits=0 -number_of_TBEs=256 -recycle_latency=10 -ruby_system=system.ruby -sequencer=system.l1_cntrl2.sequencer -to_l2_latency=1 -transitions_per_cycle=32 -version=2 - -[system.l1_cntrl2.L1DcacheMemory] -type=RubyCache -assoc=2 -is_icache=false -latency=3 -replacement_policy=PSEUDO_LRU -size=256 -start_index_bit=6 - -[system.l1_cntrl2.L1IcacheMemory] -type=RubyCache -assoc=2 -is_icache=false -latency=3 -replacement_policy=PSEUDO_LRU -size=256 -start_index_bit=6 - -[system.l1_cntrl2.sequencer] -type=RubySequencer -access_phys_mem=false -dcache=system.l1_cntrl2.L1DcacheMemory -deadlock_threshold=1000000 -icache=system.l1_cntrl2.L1IcacheMemory -max_outstanding_requests=16 -physmem=system.physmem -ruby_system=system.ruby -using_network_tester=false -using_ruby_tester=false -version=2 -physMemPort=system.physmem.port[2] -port=system.cpu2.test - -[system.l1_cntrl3] -type=L1Cache_Controller -children=L1DcacheMemory L1IcacheMemory sequencer -L1DcacheMemory=system.l1_cntrl3.L1DcacheMemory -L1IcacheMemory=system.l1_cntrl3.L1IcacheMemory -buffer_size=0 -cntrl_id=3 -l1_request_latency=2 -l1_response_latency=2 -l2_select_num_bits=0 -number_of_TBEs=256 -recycle_latency=10 -ruby_system=system.ruby -sequencer=system.l1_cntrl3.sequencer -to_l2_latency=1 -transitions_per_cycle=32 -version=3 - -[system.l1_cntrl3.L1DcacheMemory] -type=RubyCache -assoc=2 -is_icache=false -latency=3 -replacement_policy=PSEUDO_LRU -size=256 -start_index_bit=6 - -[system.l1_cntrl3.L1IcacheMemory] -type=RubyCache -assoc=2 -is_icache=false -latency=3 -replacement_policy=PSEUDO_LRU -size=256 -start_index_bit=6 - -[system.l1_cntrl3.sequencer] -type=RubySequencer -access_phys_mem=false -dcache=system.l1_cntrl3.L1DcacheMemory -deadlock_threshold=1000000 -icache=system.l1_cntrl3.L1IcacheMemory -max_outstanding_requests=16 -physmem=system.physmem -ruby_system=system.ruby -using_network_tester=false -using_ruby_tester=false -version=3 -physMemPort=system.physmem.port[3] -port=system.cpu3.test - -[system.l1_cntrl4] -type=L1Cache_Controller -children=L1DcacheMemory L1IcacheMemory sequencer -L1DcacheMemory=system.l1_cntrl4.L1DcacheMemory -L1IcacheMemory=system.l1_cntrl4.L1IcacheMemory -buffer_size=0 -cntrl_id=4 -l1_request_latency=2 -l1_response_latency=2 -l2_select_num_bits=0 -number_of_TBEs=256 -recycle_latency=10 -ruby_system=system.ruby -sequencer=system.l1_cntrl4.sequencer -to_l2_latency=1 -transitions_per_cycle=32 -version=4 - -[system.l1_cntrl4.L1DcacheMemory] -type=RubyCache -assoc=2 -is_icache=false -latency=3 -replacement_policy=PSEUDO_LRU -size=256 -start_index_bit=6 - -[system.l1_cntrl4.L1IcacheMemory] -type=RubyCache -assoc=2 -is_icache=false -latency=3 -replacement_policy=PSEUDO_LRU -size=256 -start_index_bit=6 - -[system.l1_cntrl4.sequencer] -type=RubySequencer -access_phys_mem=false -dcache=system.l1_cntrl4.L1DcacheMemory -deadlock_threshold=1000000 -icache=system.l1_cntrl4.L1IcacheMemory -max_outstanding_requests=16 -physmem=system.physmem -ruby_system=system.ruby -using_network_tester=false -using_ruby_tester=false -version=4 -physMemPort=system.physmem.port[4] -port=system.cpu4.test - -[system.l1_cntrl5] -type=L1Cache_Controller -children=L1DcacheMemory L1IcacheMemory sequencer -L1DcacheMemory=system.l1_cntrl5.L1DcacheMemory -L1IcacheMemory=system.l1_cntrl5.L1IcacheMemory -buffer_size=0 -cntrl_id=5 -l1_request_latency=2 -l1_response_latency=2 -l2_select_num_bits=0 -number_of_TBEs=256 -recycle_latency=10 -ruby_system=system.ruby -sequencer=system.l1_cntrl5.sequencer -to_l2_latency=1 -transitions_per_cycle=32 -version=5 - -[system.l1_cntrl5.L1DcacheMemory] -type=RubyCache -assoc=2 -is_icache=false -latency=3 -replacement_policy=PSEUDO_LRU -size=256 -start_index_bit=6 - -[system.l1_cntrl5.L1IcacheMemory] -type=RubyCache -assoc=2 -is_icache=false -latency=3 -replacement_policy=PSEUDO_LRU -size=256 -start_index_bit=6 - -[system.l1_cntrl5.sequencer] -type=RubySequencer -access_phys_mem=false -dcache=system.l1_cntrl5.L1DcacheMemory -deadlock_threshold=1000000 -icache=system.l1_cntrl5.L1IcacheMemory -max_outstanding_requests=16 -physmem=system.physmem -ruby_system=system.ruby -using_network_tester=false -using_ruby_tester=false -version=5 -physMemPort=system.physmem.port[5] -port=system.cpu5.test - -[system.l1_cntrl6] -type=L1Cache_Controller -children=L1DcacheMemory L1IcacheMemory sequencer -L1DcacheMemory=system.l1_cntrl6.L1DcacheMemory -L1IcacheMemory=system.l1_cntrl6.L1IcacheMemory -buffer_size=0 -cntrl_id=6 -l1_request_latency=2 -l1_response_latency=2 -l2_select_num_bits=0 -number_of_TBEs=256 -recycle_latency=10 -ruby_system=system.ruby -sequencer=system.l1_cntrl6.sequencer -to_l2_latency=1 -transitions_per_cycle=32 -version=6 - -[system.l1_cntrl6.L1DcacheMemory] -type=RubyCache -assoc=2 -is_icache=false -latency=3 -replacement_policy=PSEUDO_LRU -size=256 -start_index_bit=6 - -[system.l1_cntrl6.L1IcacheMemory] -type=RubyCache -assoc=2 -is_icache=false -latency=3 -replacement_policy=PSEUDO_LRU -size=256 -start_index_bit=6 - -[system.l1_cntrl6.sequencer] -type=RubySequencer -access_phys_mem=false -dcache=system.l1_cntrl6.L1DcacheMemory -deadlock_threshold=1000000 -icache=system.l1_cntrl6.L1IcacheMemory -max_outstanding_requests=16 -physmem=system.physmem -ruby_system=system.ruby -using_network_tester=false -using_ruby_tester=false -version=6 -physMemPort=system.physmem.port[6] -port=system.cpu6.test - -[system.l1_cntrl7] -type=L1Cache_Controller -children=L1DcacheMemory L1IcacheMemory sequencer -L1DcacheMemory=system.l1_cntrl7.L1DcacheMemory -L1IcacheMemory=system.l1_cntrl7.L1IcacheMemory -buffer_size=0 -cntrl_id=7 -l1_request_latency=2 -l1_response_latency=2 -l2_select_num_bits=0 -number_of_TBEs=256 -recycle_latency=10 -ruby_system=system.ruby -sequencer=system.l1_cntrl7.sequencer -to_l2_latency=1 -transitions_per_cycle=32 -version=7 - -[system.l1_cntrl7.L1DcacheMemory] -type=RubyCache -assoc=2 -is_icache=false -latency=3 -replacement_policy=PSEUDO_LRU -size=256 -start_index_bit=6 - -[system.l1_cntrl7.L1IcacheMemory] -type=RubyCache -assoc=2 -is_icache=false -latency=3 -replacement_policy=PSEUDO_LRU -size=256 -start_index_bit=6 - -[system.l1_cntrl7.sequencer] -type=RubySequencer -access_phys_mem=false -dcache=system.l1_cntrl7.L1DcacheMemory -deadlock_threshold=1000000 -icache=system.l1_cntrl7.L1IcacheMemory -max_outstanding_requests=16 -physmem=system.physmem -ruby_system=system.ruby -using_network_tester=false -using_ruby_tester=false -version=7 -physMemPort=system.physmem.port[7] -port=system.cpu7.test - -[system.l2_cntrl0] -type=L2Cache_Controller -children=L2cacheMemory -L2cacheMemory=system.l2_cntrl0.L2cacheMemory -buffer_size=0 -cntrl_id=8 -l2_request_latency=2 -l2_response_latency=2 -number_of_TBEs=256 -recycle_latency=10 -ruby_system=system.ruby -to_l1_latency=1 -transitions_per_cycle=32 -version=0 - -[system.l2_cntrl0.L2cacheMemory] -type=RubyCache -assoc=2 -is_icache=false -latency=15 -replacement_policy=PSEUDO_LRU -size=512 -start_index_bit=6 - -[system.physmem] -type=PhysicalMemory -file= -latency=30 -latency_var=0 -null=false -range=0:134217727 -zero=false -port=system.l1_cntrl0.sequencer.physMemPort system.l1_cntrl1.sequencer.physMemPort system.l1_cntrl2.sequencer.physMemPort system.l1_cntrl3.sequencer.physMemPort system.l1_cntrl4.sequencer.physMemPort system.l1_cntrl5.sequencer.physMemPort system.l1_cntrl6.sequencer.physMemPort system.l1_cntrl7.sequencer.physMemPort system.sys_port_proxy.physMemPort - -[system.ruby] -type=RubySystem -children=network profiler -block_size_bytes=64 -clock=1 -mem_size=134217728 -no_mem_vec=false -random_seed=1234 -randomization=false -stats_filename=ruby.stats - -[system.ruby.network] -type=SimpleNetwork -children=topology -adaptive_routing=false -buffer_size=0 -control_msg_size=8 -endpoint_bandwidth=1000 -number_of_virtual_networks=10 -ruby_system=system.ruby -topology=system.ruby.network.topology - -[system.ruby.network.topology] -type=Topology -children=ext_links0 ext_links1 ext_links2 ext_links3 ext_links4 ext_links5 ext_links6 ext_links7 ext_links8 ext_links9 int_links0 int_links1 int_links2 int_links3 int_links4 int_links5 int_links6 int_links7 int_links8 int_links9 routers00 routers01 routers02 routers03 routers04 routers05 routers06 routers07 routers08 routers09 routers10 -description=Crossbar -ext_links=system.ruby.network.topology.ext_links0 system.ruby.network.topology.ext_links1 system.ruby.network.topology.ext_links2 system.ruby.network.topology.ext_links3 system.ruby.network.topology.ext_links4 system.ruby.network.topology.ext_links5 system.ruby.network.topology.ext_links6 system.ruby.network.topology.ext_links7 system.ruby.network.topology.ext_links8 system.ruby.network.topology.ext_links9 -int_links=system.ruby.network.topology.int_links0 system.ruby.network.topology.int_links1 system.ruby.network.topology.int_links2 system.ruby.network.topology.int_links3 system.ruby.network.topology.int_links4 system.ruby.network.topology.int_links5 system.ruby.network.topology.int_links6 system.ruby.network.topology.int_links7 system.ruby.network.topology.int_links8 system.ruby.network.topology.int_links9 -print_config=false -routers=system.ruby.network.topology.routers00 system.ruby.network.topology.routers01 system.ruby.network.topology.routers02 system.ruby.network.topology.routers03 system.ruby.network.topology.routers04 system.ruby.network.topology.routers05 system.ruby.network.topology.routers06 system.ruby.network.topology.routers07 system.ruby.network.topology.routers08 system.ruby.network.topology.routers09 system.ruby.network.topology.routers10 - -[system.ruby.network.topology.ext_links0] -type=SimpleExtLink -bandwidth_factor=16 -ext_node=system.l1_cntrl0 -int_node=system.ruby.network.topology.routers00 -latency=1 -link_id=0 -weight=1 - -[system.ruby.network.topology.ext_links1] -type=SimpleExtLink -bandwidth_factor=16 -ext_node=system.l1_cntrl1 -int_node=system.ruby.network.topology.routers01 -latency=1 -link_id=1 -weight=1 - -[system.ruby.network.topology.ext_links2] -type=SimpleExtLink -bandwidth_factor=16 -ext_node=system.l1_cntrl2 -int_node=system.ruby.network.topology.routers02 -latency=1 -link_id=2 -weight=1 - -[system.ruby.network.topology.ext_links3] -type=SimpleExtLink -bandwidth_factor=16 -ext_node=system.l1_cntrl3 -int_node=system.ruby.network.topology.routers03 -latency=1 -link_id=3 -weight=1 - -[system.ruby.network.topology.ext_links4] -type=SimpleExtLink -bandwidth_factor=16 -ext_node=system.l1_cntrl4 -int_node=system.ruby.network.topology.routers04 -latency=1 -link_id=4 -weight=1 - -[system.ruby.network.topology.ext_links5] -type=SimpleExtLink -bandwidth_factor=16 -ext_node=system.l1_cntrl5 -int_node=system.ruby.network.topology.routers05 -latency=1 -link_id=5 -weight=1 - -[system.ruby.network.topology.ext_links6] -type=SimpleExtLink -bandwidth_factor=16 -ext_node=system.l1_cntrl6 -int_node=system.ruby.network.topology.routers06 -latency=1 -link_id=6 -weight=1 - -[system.ruby.network.topology.ext_links7] -type=SimpleExtLink -bandwidth_factor=16 -ext_node=system.l1_cntrl7 -int_node=system.ruby.network.topology.routers07 -latency=1 -link_id=7 -weight=1 - -[system.ruby.network.topology.ext_links8] -type=SimpleExtLink -bandwidth_factor=16 -ext_node=system.l2_cntrl0 -int_node=system.ruby.network.topology.routers08 -latency=1 -link_id=8 -weight=1 - -[system.ruby.network.topology.ext_links9] -type=SimpleExtLink -bandwidth_factor=16 -ext_node=system.dir_cntrl0 -int_node=system.ruby.network.topology.routers09 -latency=1 -link_id=9 -weight=1 - -[system.ruby.network.topology.int_links0] -type=SimpleIntLink -bandwidth_factor=16 -latency=1 -link_id=10 -node_a=system.ruby.network.topology.routers00 -node_b=system.ruby.network.topology.routers10 -weight=1 - -[system.ruby.network.topology.int_links1] -type=SimpleIntLink -bandwidth_factor=16 -latency=1 -link_id=11 -node_a=system.ruby.network.topology.routers01 -node_b=system.ruby.network.topology.routers10 -weight=1 - -[system.ruby.network.topology.int_links2] -type=SimpleIntLink -bandwidth_factor=16 -latency=1 -link_id=12 -node_a=system.ruby.network.topology.routers02 -node_b=system.ruby.network.topology.routers10 -weight=1 - -[system.ruby.network.topology.int_links3] -type=SimpleIntLink -bandwidth_factor=16 -latency=1 -link_id=13 -node_a=system.ruby.network.topology.routers03 -node_b=system.ruby.network.topology.routers10 -weight=1 - -[system.ruby.network.topology.int_links4] -type=SimpleIntLink -bandwidth_factor=16 -latency=1 -link_id=14 -node_a=system.ruby.network.topology.routers04 -node_b=system.ruby.network.topology.routers10 -weight=1 - -[system.ruby.network.topology.int_links5] -type=SimpleIntLink -bandwidth_factor=16 -latency=1 -link_id=15 -node_a=system.ruby.network.topology.routers05 -node_b=system.ruby.network.topology.routers10 -weight=1 - -[system.ruby.network.topology.int_links6] -type=SimpleIntLink -bandwidth_factor=16 -latency=1 -link_id=16 -node_a=system.ruby.network.topology.routers06 -node_b=system.ruby.network.topology.routers10 -weight=1 - -[system.ruby.network.topology.int_links7] -type=SimpleIntLink -bandwidth_factor=16 -latency=1 -link_id=17 -node_a=system.ruby.network.topology.routers07 -node_b=system.ruby.network.topology.routers10 -weight=1 - -[system.ruby.network.topology.int_links8] -type=SimpleIntLink -bandwidth_factor=16 -latency=1 -link_id=18 -node_a=system.ruby.network.topology.routers08 -node_b=system.ruby.network.topology.routers10 -weight=1 - -[system.ruby.network.topology.int_links9] -type=SimpleIntLink -bandwidth_factor=16 -latency=1 -link_id=19 -node_a=system.ruby.network.topology.routers09 -node_b=system.ruby.network.topology.routers10 -weight=1 - -[system.ruby.network.topology.routers00] -type=BasicRouter -router_id=0 - -[system.ruby.network.topology.routers01] -type=BasicRouter -router_id=1 - -[system.ruby.network.topology.routers02] -type=BasicRouter -router_id=2 - -[system.ruby.network.topology.routers03] -type=BasicRouter -router_id=3 - -[system.ruby.network.topology.routers04] -type=BasicRouter -router_id=4 - -[system.ruby.network.topology.routers05] -type=BasicRouter -router_id=5 - -[system.ruby.network.topology.routers06] -type=BasicRouter -router_id=6 - -[system.ruby.network.topology.routers07] -type=BasicRouter -router_id=7 - -[system.ruby.network.topology.routers08] -type=BasicRouter -router_id=8 - -[system.ruby.network.topology.routers09] -type=BasicRouter -router_id=9 - -[system.ruby.network.topology.routers10] -type=BasicRouter -router_id=10 - -[system.ruby.profiler] -type=RubyProfiler -all_instructions=false -hot_lines=false -num_of_sequencers=8 -ruby_system=system.ruby - -[system.sys_port_proxy] -type=RubyPortProxy -access_phys_mem=true -physmem=system.physmem -ruby_system=system.ruby -using_network_tester=false -using_ruby_tester=false -version=0 -physMemPort=system.physmem.port[8] -port=system.system_port - diff --git a/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/ruby.stats b/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/ruby.stats deleted file mode 100644 index 83d47d194..000000000 --- a/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/ruby.stats +++ /dev/null @@ -1,910 +0,0 @@ - -================ Begin RubySystem Configuration Print ================ - -RubySystem config: - random_seed: 1234 - randomization: 0 - cycle_period: 1 - block_size_bytes: 64 - block_size_bits: 6 - memory_size_bytes: 134217728 - memory_size_bits: 27 - -Network Configuration ---------------------- -network: SIMPLE_NETWORK -topology: - -virtual_net_0: active, unordered -virtual_net_1: active, unordered -virtual_net_2: active, unordered -virtual_net_3: inactive -virtual_net_4: inactive -virtual_net_5: inactive -virtual_net_6: inactive -virtual_net_7: inactive -virtual_net_8: inactive -virtual_net_9: inactive - - -Profiler Configuration ----------------------- -periodic_stats_period: 1000000 - -================ End RubySystem Configuration Print ================ - - -Real time: Jan/23/2012 04:26:12 - -Profiler Stats --------------- -Elapsed_time_in_seconds: 251 -Elapsed_time_in_minutes: 4.18333 -Elapsed_time_in_hours: 0.0697222 -Elapsed_time_in_days: 0.00290509 - -Virtual_time_in_seconds: 250.81 -Virtual_time_in_minutes: 4.18017 -Virtual_time_in_hours: 0.0696694 -Virtual_time_in_days: 0.00290289 - -Ruby_current_time: 22570074 -Ruby_start_time: 0 -Ruby_cycles: 22570074 - -mbytes_resident: 41.8906 -mbytes_total: 339.688 -resident_ratio: 0.123321 - -ruby_cycles_executed: [ 22570075 22570075 22570075 22570075 22570075 22570075 22570075 22570075 ] - -Busy Controller Counts: -L1Cache-0:0 L1Cache-1:0 L1Cache-2:0 L1Cache-3:0 L1Cache-4:0 L1Cache-5:0 L1Cache-6:0 L1Cache-7:0 - -L2Cache-0:0 -Directory-0:0 - - -Busy Bank Count:0 - -sequencer_requests_outstanding: [binsize: 1 max: 16 count: 607977 average: 15.9984 | standard deviation: 0.127729 | 0 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 607857 ] - -All Non-Zero Cycle Demand Cache Accesses ----------------------------------------- -miss_latency: [binsize: 4096 max: 496494 count: 607849 average: 4750.99 | standard deviation: 9556.54 | 355105 169191 59645 14289 3099 901 533 416 339 360 301 307 272 222 195 214 182 182 146 147 133 117 100 98 103 77 85 58 69 51 57 65 48 59 50 44 45 36 43 28 31 29 24 23 23 19 19 22 17 13 14 15 12 8 6 15 10 7 8 9 7 9 6 5 9 4 6 4 3 3 3 1 1 6 2 4 5 2 1 3 0 1 3 0 1 1 2 1 0 1 0 0 1 3 0 2 0 2 0 1 0 0 0 0 0 1 0 1 0 2 0 0 0 1 2 0 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_LD: [binsize: 4096 max: 490436 count: 394834 average: 4762.86 | standard deviation: 9711.77 | 230455 110075 38816 9210 2008 585 365 253 208 244 197 195 174 145 133 148 107 123 104 108 87 77 61 55 64 55 53 44 49 35 37 39 30 46 33 26 25 24 35 18 23 18 20 11 13 15 9 15 11 8 8 9 6 4 4 7 7 5 5 7 5 5 4 4 7 4 4 4 2 3 2 0 1 2 1 2 4 2 0 3 0 1 3 0 0 1 2 1 0 1 0 0 1 2 0 1 0 1 0 1 0 0 0 0 0 1 0 1 0 2 0 0 0 1 2 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_ST: [binsize: 4096 max: 496494 count: 213015 average: 4728.98 | standard deviation: 9261.9 | 124650 59116 20829 5079 1091 316 168 163 131 116 104 112 98 77 62 66 75 59 42 39 46 40 39 43 39 22 32 14 20 16 20 26 18 13 17 18 20 12 8 10 8 11 4 12 10 4 10 7 6 5 6 6 6 4 2 8 3 2 3 2 2 4 2 1 2 0 2 0 1 0 1 1 0 4 1 2 1 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_NULL: [binsize: 4096 max: 496494 count: 607849 average: 4750.99 | standard deviation: 9556.54 | 355105 169191 59645 14289 3099 901 533 416 339 360 301 307 272 222 195 214 182 182 146 147 133 117 100 98 103 77 85 58 69 51 57 65 48 59 50 44 45 36 43 28 31 29 24 23 23 19 19 22 17 13 14 15 12 8 6 15 10 7 8 9 7 9 6 5 9 4 6 4 3 3 3 1 1 6 2 4 5 2 1 3 0 1 3 0 1 1 2 1 0 1 0 0 1 3 0 2 0 2 0 1 0 0 0 0 0 1 0 1 0 2 0 0 0 1 2 0 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] -miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] -miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] -miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] -imcomplete_wCC_Times: 0 -miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] -miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] -miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] -miss_latency_dir_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] -imcomplete_dir_Times: 0 -miss_latency_LD_NULL: [binsize: 4096 max: 490436 count: 394834 average: 4762.86 | standard deviation: 9711.77 | 230455 110075 38816 9210 2008 585 365 253 208 244 197 195 174 145 133 148 107 123 104 108 87 77 61 55 64 55 53 44 49 35 37 39 30 46 33 26 25 24 35 18 23 18 20 11 13 15 9 15 11 8 8 9 6 4 4 7 7 5 5 7 5 5 4 4 7 4 4 4 2 3 2 0 1 2 1 2 4 2 0 3 0 1 3 0 0 1 2 1 0 1 0 0 1 2 0 1 0 1 0 1 0 0 0 0 0 1 0 1 0 2 0 0 0 1 2 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -miss_latency_ST_NULL: [binsize: 4096 max: 496494 count: 213015 average: 4728.98 | standard deviation: 9261.9 | 124650 59116 20829 5079 1091 316 168 163 131 116 104 112 98 77 62 66 75 59 42 39 46 40 39 43 39 22 32 14 20 16 20 26 18 13 17 18 20 12 8 10 8 11 4 12 10 4 10 7 6 5 6 6 6 4 2 8 3 2 3 2 2 4 2 1 2 0 2 0 1 0 1 1 0 4 1 2 1 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 0 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] - -All Non-Zero Cycle SW Prefetch Requests ------------------------------------- -prefetch_latency: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] -prefetch_latency_L2Miss:[binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] -Request vs. RubySystem State Profile --------------------------------- - - -filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - -Message Delayed Cycles ----------------------- -Total_delay_cycles: [binsize: 512 max: 14615 count: 4591131 average: 71.483 | standard deviation: 382.552 | 4445303 71429 25716 13355 8643 6710 5118 4179 3087 2370 1645 1185 778 570 386 232 170 104 53 31 26 11 12 5 2 5 3 0 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] -Total_nonPF_delay_cycles: [binsize: 1 max: 20 count: 3083256 average: 0.208137 | standard deviation: 0.796792 | 2751370 221517 30254 20578 22740 19744 14634 794 583 437 475 70 19 8 21 6 2 0 2 1 1 ] - virtual_network_0_delay_cycles: [binsize: 512 max: 14615 count: 1507875 average: 217.224 | standard deviation: 643.398 | 1362047 71429 25716 13355 8643 6710 5118 4179 3087 2370 1645 1185 778 570 386 232 170 104 53 31 26 11 12 5 2 5 3 0 3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ] - virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - virtual_network_2_delay_cycles: [binsize: 1 max: 20 count: 485327 average: 0.227906 | standard deviation: 0.828193 | 420344 48971 6701 1578 1851 2838 1762 436 88 273 369 61 15 7 21 6 2 0 2 1 1 ] - virtual_network_3_delay_cycles: [binsize: 1 max: 13 count: 2597929 average: 0.204444 | standard deviation: 0.790733 | 2331026 172546 23553 19000 20889 16906 12872 358 495 164 106 9 4 1 ] - virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - virtual_network_6_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - virtual_network_7_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - virtual_network_8_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - virtual_network_9_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] - -Resource Usage --------------- -page_size: 4096 -user_time: 250 -system_time: 0 -page_reclaims: 11074 -page_faults: 0 -swaps: 0 -block_inputs: 0 -block_outputs: 208 - -Network Stats -------------- - -total_msg_count_Control: 3637485 29099880 -total_msg_count_Request_Control: 1453647 11629176 -total_msg_count_Response_Data: 4275051 307803672 -total_msg_count_Response_Control: 6300513 50404104 -total_msg_count_Writeback_Data: 1156890 83296080 -total_msg_count_Writeback_Control: 573396 4587168 -total_msgs: 17396982 total_bytes: 486820080 - -switch_0_inlinks: 2 -switch_0_outlinks: 2 -links_utilized_percent_switch_0: 1.58871 - links_utilized_percent_switch_0_link_0: 1.75155 bw: 16000 base_latency: 1 - links_utilized_percent_switch_0_link_1: 1.42586 bw: 16000 base_latency: 1 - - outgoing_messages_switch_0_link_0_Request_Control: 61316 490528 [ 61316 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_0_Response_Data: 76858 5533776 [ 0 76858 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_0_Response_Control: 37620 300960 [ 0 37620 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Control: 76861 614888 [ 76861 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Response_Data: 168 12096 [ 0 168 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Response_Control: 102017 816136 [ 0 25650 76367 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Writeback_Data: 48759 3510648 [ 13206 35553 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_0_link_1_Writeback_Control: 24414 195312 [ 24414 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - -switch_1_inlinks: 2 -switch_1_outlinks: 2 -links_utilized_percent_switch_1: 1.57407 - links_utilized_percent_switch_1_link_0: 1.73518 bw: 16000 base_latency: 1 - links_utilized_percent_switch_1_link_1: 1.41296 bw: 16000 base_latency: 1 - - outgoing_messages_switch_1_link_0_Request_Control: 60819 486552 [ 60819 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Response_Data: 76153 5483016 [ 0 76153 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_0_Response_Control: 37066 296528 [ 0 37066 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Control: 76155 609240 [ 76155 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Response_Data: 171 12312 [ 0 171 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Response_Control: 101164 809312 [ 0 25505 75659 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Writeback_Data: 48336 3480192 [ 13138 35198 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_1_link_1_Writeback_Control: 23928 191424 [ 23928 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - -switch_2_inlinks: 2 -switch_2_outlinks: 2 -links_utilized_percent_switch_2: 1.55874 - links_utilized_percent_switch_2_link_0: 1.71975 bw: 16000 base_latency: 1 - links_utilized_percent_switch_2_link_1: 1.39772 bw: 16000 base_latency: 1 - - outgoing_messages_switch_2_link_0_Request_Control: 60425 483400 [ 60425 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_0_Response_Data: 75466 5433552 [ 0 75466 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_0_Response_Control: 36678 293424 [ 0 36678 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_1_Control: 75468 603744 [ 75468 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_1_Response_Data: 185 13320 [ 0 185 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_1_Response_Control: 100414 803312 [ 0 25436 74978 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_1_Writeback_Data: 47731 3436632 [ 12870 34861 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_2_link_1_Writeback_Control: 23809 190472 [ 23809 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - -switch_3_inlinks: 2 -switch_3_outlinks: 2 -links_utilized_percent_switch_3: 1.57195 - links_utilized_percent_switch_3_link_0: 1.73065 bw: 16000 base_latency: 1 - links_utilized_percent_switch_3_link_1: 1.41325 bw: 16000 base_latency: 1 - - outgoing_messages_switch_3_link_0_Request_Control: 60661 485288 [ 60661 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_0_Response_Data: 75942 5467824 [ 0 75942 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_0_Response_Control: 37080 296640 [ 0 37080 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Control: 75945 607560 [ 75945 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Response_Data: 156 11232 [ 0 156 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Response_Control: 100823 806584 [ 0 25377 75446 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Writeback_Data: 48440 3487680 [ 13266 35174 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_3_link_1_Writeback_Control: 23813 190504 [ 23813 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - -switch_4_inlinks: 2 -switch_4_outlinks: 2 -links_utilized_percent_switch_4: 1.56082 - links_utilized_percent_switch_4_link_0: 1.72098 bw: 16000 base_latency: 1 - links_utilized_percent_switch_4_link_1: 1.40066 bw: 16000 base_latency: 1 - - outgoing_messages_switch_4_link_0_Request_Control: 60424 483392 [ 60424 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_4_link_0_Response_Data: 75520 5437440 [ 0 75520 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_4_link_0_Response_Control: 36748 293984 [ 0 36748 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_4_link_1_Control: 75521 604168 [ 75521 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_4_link_1_Response_Data: 150 10800 [ 0 150 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_4_link_1_Response_Control: 100453 803624 [ 0 25381 75072 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_4_link_1_Writeback_Data: 47907 3449304 [ 12973 34934 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_4_link_1_Writeback_Control: 23775 190200 [ 23775 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - -switch_5_inlinks: 2 -switch_5_outlinks: 2 -links_utilized_percent_switch_5: 1.56684 - links_utilized_percent_switch_5_link_0: 1.73026 bw: 16000 base_latency: 1 - links_utilized_percent_switch_5_link_1: 1.40342 bw: 16000 base_latency: 1 - - outgoing_messages_switch_5_link_0_Request_Control: 60530 484240 [ 60530 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_5_link_0_Response_Data: 75951 5468472 [ 0 75951 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_5_link_0_Response_Control: 36954 295632 [ 0 36954 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_5_link_1_Control: 75953 607624 [ 75953 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_5_link_1_Response_Data: 151 10872 [ 0 151 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_5_link_1_Response_Control: 101090 808720 [ 0 25567 75523 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_5_link_1_Writeback_Data: 47912 3449664 [ 13060 34852 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_5_link_1_Writeback_Control: 23894 191152 [ 23894 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - -switch_6_inlinks: 2 -switch_6_outlinks: 2 -links_utilized_percent_switch_6: 1.56294 - links_utilized_percent_switch_6_link_0: 1.72248 bw: 16000 base_latency: 1 - links_utilized_percent_switch_6_link_1: 1.40339 bw: 16000 base_latency: 1 - - outgoing_messages_switch_6_link_0_Request_Control: 60256 482048 [ 60256 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_6_link_0_Response_Data: 75607 5443704 [ 0 75607 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_6_link_0_Response_Control: 36813 294504 [ 0 36813 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_6_link_1_Control: 75611 604888 [ 75611 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_6_link_1_Response_Data: 190 13680 [ 0 190 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_6_link_1_Response_Control: 100454 803632 [ 0 25339 75115 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_6_link_1_Writeback_Data: 48015 3457080 [ 13233 34782 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_6_link_1_Writeback_Control: 23582 188656 [ 23582 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - -switch_7_inlinks: 2 -switch_7_outlinks: 2 -links_utilized_percent_switch_7: 1.57836 - links_utilized_percent_switch_7_link_0: 1.73917 bw: 16000 base_latency: 1 - links_utilized_percent_switch_7_link_1: 1.41756 bw: 16000 base_latency: 1 - - outgoing_messages_switch_7_link_0_Request_Control: 60896 487168 [ 60896 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_7_link_0_Response_Data: 76341 5496552 [ 0 76341 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_7_link_0_Response_Control: 37097 296776 [ 0 37097 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_7_link_1_Control: 76345 610760 [ 76345 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_7_link_1_Response_Data: 180 12960 [ 0 180 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_7_link_1_Response_Control: 101238 809904 [ 0 25420 75818 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_7_link_1_Writeback_Data: 48530 3494160 [ 13181 35349 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_7_link_1_Writeback_Control: 23917 191336 [ 23917 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - -switch_8_inlinks: 2 -switch_8_outlinks: 2 -links_utilized_percent_switch_8: 22.444 - links_utilized_percent_switch_8_link_0: 24.6504 bw: 16000 base_latency: 1 - links_utilized_percent_switch_8_link_1: 20.2375 bw: 16000 base_latency: 1 - - outgoing_messages_switch_8_link_0_Control: 607859 4862872 [ 607859 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_8_link_0_Response_Data: 605033 43562376 [ 0 605033 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_8_link_0_Response_Control: 1412277 11298216 [ 0 808299 603978 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_8_link_0_Writeback_Data: 385630 27765360 [ 104927 280703 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_8_link_0_Writeback_Control: 191132 1529056 [ 191132 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_8_link_1_Control: 604636 4837088 [ 604636 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_8_link_1_Request_Control: 482993 3863944 [ 482993 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_8_link_1_Response_Data: 817747 58877784 [ 0 817747 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_8_link_1_Response_Control: 687892 5503136 [ 0 687892 0 0 0 0 0 0 0 0 ] base_latency: 1 - -switch_9_inlinks: 2 -switch_9_outlinks: 2 -links_utilized_percent_switch_9: 9.92231 - links_utilized_percent_switch_9_link_0: 6.4501 bw: 16000 base_latency: 1 - links_utilized_percent_switch_9_link_1: 13.3945 bw: 16000 base_latency: 1 - - outgoing_messages_switch_9_link_0_Control: 604636 4837088 [ 604636 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_9_link_0_Response_Data: 212790 15320880 [ 0 212790 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_9_link_0_Response_Control: 391838 3134704 [ 0 391838 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_9_link_1_Response_Data: 604631 43533432 [ 0 604631 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_9_link_1_Response_Control: 604626 4837008 [ 0 604626 0 0 0 0 0 0 0 0 ] base_latency: 1 - -switch_10_inlinks: 10 -switch_10_outlinks: 10 -links_utilized_percent_switch_10: 4.49505 - links_utilized_percent_switch_10_link_0: 1.75156 bw: 16000 base_latency: 1 - links_utilized_percent_switch_10_link_1: 1.73518 bw: 16000 base_latency: 1 - links_utilized_percent_switch_10_link_2: 1.71975 bw: 16000 base_latency: 1 - links_utilized_percent_switch_10_link_3: 1.73065 bw: 16000 base_latency: 1 - links_utilized_percent_switch_10_link_4: 1.72098 bw: 16000 base_latency: 1 - links_utilized_percent_switch_10_link_5: 1.73026 bw: 16000 base_latency: 1 - links_utilized_percent_switch_10_link_6: 1.72248 bw: 16000 base_latency: 1 - links_utilized_percent_switch_10_link_7: 1.73917 bw: 16000 base_latency: 1 - links_utilized_percent_switch_10_link_8: 24.6504 bw: 16000 base_latency: 1 - links_utilized_percent_switch_10_link_9: 6.4501 bw: 16000 base_latency: 1 - - outgoing_messages_switch_10_link_0_Request_Control: 61316 490528 [ 61316 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_0_Response_Data: 76858 5533776 [ 0 76858 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_0_Response_Control: 37620 300960 [ 0 37620 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_1_Request_Control: 60819 486552 [ 60819 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_1_Response_Data: 76153 5483016 [ 0 76153 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_1_Response_Control: 37066 296528 [ 0 37066 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_2_Request_Control: 60425 483400 [ 60425 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_2_Response_Data: 75466 5433552 [ 0 75466 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_2_Response_Control: 36678 293424 [ 0 36678 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_3_Request_Control: 60661 485288 [ 60661 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_3_Response_Data: 75942 5467824 [ 0 75942 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_3_Response_Control: 37080 296640 [ 0 37080 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_4_Request_Control: 60424 483392 [ 60424 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_4_Response_Data: 75520 5437440 [ 0 75520 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_4_Response_Control: 36748 293984 [ 0 36748 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_5_Request_Control: 60530 484240 [ 60530 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_5_Response_Data: 75951 5468472 [ 0 75951 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_5_Response_Control: 36954 295632 [ 0 36954 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_6_Request_Control: 60256 482048 [ 60256 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_6_Response_Data: 75607 5443704 [ 0 75607 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_6_Response_Control: 36813 294504 [ 0 36813 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_7_Request_Control: 60896 487168 [ 60896 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_7_Response_Data: 76341 5496552 [ 0 76341 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_7_Response_Control: 37097 296776 [ 0 37097 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_8_Control: 607859 4862872 [ 607859 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_8_Response_Data: 605033 43562376 [ 0 605033 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_8_Response_Control: 1412277 11298216 [ 0 808299 603978 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_8_Writeback_Data: 385630 27765360 [ 104927 280703 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_8_Writeback_Control: 191132 1529056 [ 191132 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_9_Control: 604636 4837088 [ 604636 0 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_9_Response_Data: 212790 15320880 [ 0 212790 0 0 0 0 0 0 0 0 ] base_latency: 1 - outgoing_messages_switch_10_link_9_Response_Control: 391838 3134704 [ 0 391838 0 0 0 0 0 0 0 0 ] base_latency: 1 - -Cache Stats: system.l1_cntrl0.L1IcacheMemory - system.l1_cntrl0.L1IcacheMemory_total_misses: 0 - system.l1_cntrl0.L1IcacheMemory_total_demand_misses: 0 - system.l1_cntrl0.L1IcacheMemory_total_prefetches: 0 - system.l1_cntrl0.L1IcacheMemory_total_sw_prefetches: 0 - system.l1_cntrl0.L1IcacheMemory_total_hw_prefetches: 0 - - -Cache Stats: system.l1_cntrl0.L1DcacheMemory - system.l1_cntrl0.L1DcacheMemory_total_misses: 76861 - system.l1_cntrl0.L1DcacheMemory_total_demand_misses: 76861 - system.l1_cntrl0.L1DcacheMemory_total_prefetches: 0 - system.l1_cntrl0.L1DcacheMemory_total_sw_prefetches: 0 - system.l1_cntrl0.L1DcacheMemory_total_hw_prefetches: 0 - - system.l1_cntrl0.L1DcacheMemory_request_type_LD: 65.1254% - system.l1_cntrl0.L1DcacheMemory_request_type_ST: 34.8746% - - system.l1_cntrl0.L1DcacheMemory_access_mode_type_Supervisor: 76861 100% - - --- L1Cache --- - - Event Counts - -Load [49165 49521 48931 49371 50057 49427 49260 49197 ] 394929 -Ifetch [0 0 0 0 0 0 0 0 ] 0 -Store [26362 26470 26682 27010 26838 26732 26219 26752 ] 213065 -Inv [60315 60419 60121 60769 61203 60703 60297 60551 ] 484378 -L1_Replacement [31022878 30992943 30998511 31011137 30978735 31015750 31000258 30989218 ] 248009430 -Fwd_GETX [68 71 80 74 58 61 71 64 ] 547 -Fwd_GETS [41 40 55 53 55 55 57 46 ] 402 -Fwd_GET_INSTR [0 0 0 0 0 0 0 0 ] 0 -Data [0 0 0 0 0 0 0 1 ] 1 -Data_Exclusive [48660 48995 48393 48761 49518 48885 48703 48651 ] 390566 -DataS_fromL1 [51 61 42 54 47 45 58 44 ] 402 -Data_all_Acks [26809 26895 27172 27526 27293 27223 26705 27246 ] 216869 -Ack [0 0 0 0 0 0 0 1 ] 1 -Ack_all [0 0 0 0 0 0 0 1 ] 1 -WB_Ack [36748 36954 36813 37097 37620 37066 36678 37078 ] 296054 - - - Transitions - -NP Load [49142 49463 48921 49325 50043 49409 49240 49171 ] 394714 -NP Ifetch [0 0 0 0 0 0 0 0 ] 0 -NP Store [26354 26461 26670 26992 26798 26723 26210 26739 ] 212947 -NP Inv [259 267 325 321 292 299 308 289 ] 2360 -NP L1_Replacement [0 0 0 0 0 0 0 0 ] 0 - -I Load [18 22 9 14 13 16 9 22 ] 123 -I Ifetch [0 0 0 0 0 0 0 0 ] 0 -I Store [7 7 11 14 7 7 9 13 ] 75 -I Inv [0 0 0 0 0 0 0 0 ] 0 -I L1_Replacement [38492 38706 38461 38904 38940 38776 38480 38549 ] 309308 - -S Load [0 0 0 0 0 0 0 0 ] 0 -S Ifetch [0 0 0 0 0 0 0 0 ] 0 -S Store [0 0 0 0 0 0 0 0 ] 0 -S Inv [279 262 261 309 300 295 294 297 ] 2297 -S L1_Replacement [252 260 311 311 277 286 287 278 ] 2262 - -E Load [2 1 1 0 0 0 1 0 ] 5 -E Ifetch [0 0 0 0 0 0 0 0 ] 0 -E Store [0 0 1 0 0 1 0 0 ] 2 -E Inv [24841 25038 24750 24790 25058 24911 24833 24791 ] 199012 -E L1_Replacement [23788 23910 23588 23928 24424 23937 23820 23820 ] 191215 -E Fwd_GETX [26 36 46 35 28 30 46 34 ] 281 -E Fwd_GETS [5 11 8 8 7 6 4 6 ] 55 -E Fwd_GET_INSTR [0 0 0 0 0 0 0 0 ] 0 - -M Load [0 1 0 0 1 0 0 0 ] 2 -M Ifetch [0 0 0 0 0 0 0 0 ] 0 -M Store [0 1 0 0 0 1 0 0 ] 2 -M Inv [13349 13381 13403 13783 13564 13551 13314 13451 ] 107796 -M L1_Replacement [12960 13044 13227 13170 13196 13129 12859 13259 ] 104844 -M Fwd_GETX [24 20 20 15 10 14 13 12 ] 128 -M Fwd_GETS [28 22 31 35 33 36 31 29 ] 245 -M Fwd_GET_INSTR [0 0 0 0 0 0 0 0 ] 0 - -IS Load [0 0 0 0 0 0 0 0 ] 0 -IS Ifetch [0 0 0 0 0 0 0 0 ] 0 -IS Store [0 0 0 0 0 0 0 0 ] 0 -IS Inv [1 0 1 0 0 0 0 0 ] 2 -IS L1_Replacement [20157546 20081658 19830753 19901991 20110300 19902485 20045187 19917415 ] 159947335 -IS Data_Exclusive [48660 48995 48393 48761 49518 48885 48703 48651 ] 390566 -IS DataS_fromL1 [51 61 42 54 47 45 58 44 ] 402 -IS Data_all_Acks [447 428 491 523 490 494 488 496 ] 3857 - -IM Load [0 0 0 0 0 0 0 0 ] 0 -IM Ifetch [0 0 0 0 0 0 0 0 ] 0 -IM Store [0 0 0 0 0 0 0 0 ] 0 -IM Inv [0 0 0 0 0 0 0 0 ] 0 -IM L1_Replacement [10789830 10835365 11092162 11032833 10791598 11037137 10879625 10995881 ] 87454431 -IM Data [0 0 0 0 0 0 0 1 ] 1 -IM Data_all_Acks [26361 26467 26680 27003 26803 26729 26217 26750 ] 213010 -IM Ack [0 0 0 0 0 0 0 0 ] 0 - -SM Load [0 0 0 0 0 0 0 0 ] 0 -SM Ifetch [0 0 0 0 0 0 0 0 ] 0 -SM Store [0 0 0 0 0 0 0 0 ] 0 -SM Inv [0 0 0 0 0 0 0 0 ] 0 -SM L1_Replacement [0 0 0 0 0 0 0 16 ] 16 -SM Ack [0 0 0 0 0 0 0 1 ] 1 -SM Ack_all [0 0 0 0 0 0 0 1 ] 1 - -IS_I Load [0 0 0 0 0 0 0 0 ] 0 -IS_I Ifetch [0 0 0 0 0 0 0 0 ] 0 -IS_I Store [0 0 0 0 0 0 0 0 ] 0 -IS_I Inv [0 0 0 0 0 0 0 0 ] 0 -IS_I L1_Replacement [10 0 9 0 0 0 0 0 ] 19 -IS_I Data_Exclusive [0 0 0 0 0 0 0 0 ] 0 -IS_I DataS_fromL1 [0 0 0 0 0 0 0 0 ] 0 -IS_I Data_all_Acks [1 0 1 0 0 0 0 0 ] 2 - -M_I Load [0 0 0 0 0 0 0 0 ] 0 -M_I Ifetch [0 0 0 0 0 0 0 0 ] 0 -M_I Store [0 0 0 0 0 0 0 0 ] 0 -M_I Inv [21585 21471 21379 21566 21989 21647 21547 21723 ] 172907 -M_I L1_Replacement [0 0 0 0 0 0 0 0 ] 0 -M_I Fwd_GETX [18 15 14 24 20 17 12 18 ] 138 -M_I Fwd_GETS [8 7 16 10 15 13 22 11 ] 102 -M_I Fwd_GET_INSTR [0 0 0 0 0 0 0 0 ] 0 -M_I WB_Ack [15137 15461 15406 15498 15596 15389 15098 15327 ] 122912 - -E_I Load [0 0 0 0 0 0 0 0 ] 0 -E_I Ifetch [0 0 0 0 0 0 0 0 ] 0 -E_I Store [0 0 0 0 0 0 0 0 ] 0 -E_I L1_Replacement [0 0 0 0 0 0 0 0 ] 0 - -SINK_WB_ACK Load [3 34 0 32 0 2 10 4 ] 85 -SINK_WB_ACK Ifetch [0 0 0 0 0 0 0 0 ] 0 -SINK_WB_ACK Store [1 1 0 4 33 0 0 0 ] 39 -SINK_WB_ACK Inv [1 0 2 0 0 0 1 0 ] 4 -SINK_WB_ACK L1_Replacement [0 0 0 0 0 0 0 0 ] 0 -SINK_WB_ACK WB_Ack [21611 21493 21407 21599 22024 21677 21580 21751 ] 173142 - -Cache Stats: system.l1_cntrl1.L1IcacheMemory - system.l1_cntrl1.L1IcacheMemory_total_misses: 0 - system.l1_cntrl1.L1IcacheMemory_total_demand_misses: 0 - system.l1_cntrl1.L1IcacheMemory_total_prefetches: 0 - system.l1_cntrl1.L1IcacheMemory_total_sw_prefetches: 0 - system.l1_cntrl1.L1IcacheMemory_total_hw_prefetches: 0 - - -Cache Stats: system.l1_cntrl1.L1DcacheMemory - system.l1_cntrl1.L1DcacheMemory_total_misses: 76155 - system.l1_cntrl1.L1DcacheMemory_total_demand_misses: 76155 - system.l1_cntrl1.L1DcacheMemory_total_prefetches: 0 - system.l1_cntrl1.L1DcacheMemory_total_sw_prefetches: 0 - system.l1_cntrl1.L1DcacheMemory_total_hw_prefetches: 0 - - system.l1_cntrl1.L1DcacheMemory_request_type_LD: 64.9005% - system.l1_cntrl1.L1DcacheMemory_request_type_ST: 35.0995% - - system.l1_cntrl1.L1DcacheMemory_access_mode_type_Supervisor: 76155 100% - -Cache Stats: system.l1_cntrl2.L1IcacheMemory - system.l1_cntrl2.L1IcacheMemory_total_misses: 0 - system.l1_cntrl2.L1IcacheMemory_total_demand_misses: 0 - system.l1_cntrl2.L1IcacheMemory_total_prefetches: 0 - system.l1_cntrl2.L1IcacheMemory_total_sw_prefetches: 0 - system.l1_cntrl2.L1IcacheMemory_total_hw_prefetches: 0 - - -Cache Stats: system.l1_cntrl2.L1DcacheMemory - system.l1_cntrl2.L1DcacheMemory_total_misses: 75468 - system.l1_cntrl2.L1DcacheMemory_total_demand_misses: 75468 - system.l1_cntrl2.L1DcacheMemory_total_prefetches: 0 - system.l1_cntrl2.L1DcacheMemory_total_sw_prefetches: 0 - system.l1_cntrl2.L1DcacheMemory_total_hw_prefetches: 0 - - system.l1_cntrl2.L1DcacheMemory_request_type_LD: 65.2581% - system.l1_cntrl2.L1DcacheMemory_request_type_ST: 34.7419% - - system.l1_cntrl2.L1DcacheMemory_access_mode_type_Supervisor: 75468 100% - -Cache Stats: system.l1_cntrl3.L1IcacheMemory - system.l1_cntrl3.L1IcacheMemory_total_misses: 0 - system.l1_cntrl3.L1IcacheMemory_total_demand_misses: 0 - system.l1_cntrl3.L1IcacheMemory_total_prefetches: 0 - system.l1_cntrl3.L1IcacheMemory_total_sw_prefetches: 0 - system.l1_cntrl3.L1IcacheMemory_total_hw_prefetches: 0 - - -Cache Stats: system.l1_cntrl3.L1DcacheMemory - system.l1_cntrl3.L1DcacheMemory_total_misses: 75945 - system.l1_cntrl3.L1DcacheMemory_total_demand_misses: 75945 - system.l1_cntrl3.L1DcacheMemory_total_prefetches: 0 - system.l1_cntrl3.L1DcacheMemory_total_sw_prefetches: 0 - system.l1_cntrl3.L1DcacheMemory_total_hw_prefetches: 0 - - system.l1_cntrl3.L1DcacheMemory_request_type_LD: 64.7745% - system.l1_cntrl3.L1DcacheMemory_request_type_ST: 35.2255% - - system.l1_cntrl3.L1DcacheMemory_access_mode_type_Supervisor: 75945 100% - -Cache Stats: system.l1_cntrl4.L1IcacheMemory - system.l1_cntrl4.L1IcacheMemory_total_misses: 0 - system.l1_cntrl4.L1IcacheMemory_total_demand_misses: 0 - system.l1_cntrl4.L1IcacheMemory_total_prefetches: 0 - system.l1_cntrl4.L1IcacheMemory_total_sw_prefetches: 0 - system.l1_cntrl4.L1IcacheMemory_total_hw_prefetches: 0 - - -Cache Stats: system.l1_cntrl4.L1DcacheMemory - system.l1_cntrl4.L1DcacheMemory_total_misses: 75521 - system.l1_cntrl4.L1DcacheMemory_total_demand_misses: 75521 - system.l1_cntrl4.L1DcacheMemory_total_prefetches: 0 - system.l1_cntrl4.L1DcacheMemory_total_sw_prefetches: 0 - system.l1_cntrl4.L1DcacheMemory_total_hw_prefetches: 0 - - system.l1_cntrl4.L1DcacheMemory_request_type_LD: 65.0945% - system.l1_cntrl4.L1DcacheMemory_request_type_ST: 34.9055% - - system.l1_cntrl4.L1DcacheMemory_access_mode_type_Supervisor: 75521 100% - -Cache Stats: system.l1_cntrl5.L1IcacheMemory - system.l1_cntrl5.L1IcacheMemory_total_misses: 0 - system.l1_cntrl5.L1IcacheMemory_total_demand_misses: 0 - system.l1_cntrl5.L1IcacheMemory_total_prefetches: 0 - system.l1_cntrl5.L1IcacheMemory_total_sw_prefetches: 0 - system.l1_cntrl5.L1IcacheMemory_total_hw_prefetches: 0 - - -Cache Stats: system.l1_cntrl5.L1DcacheMemory - system.l1_cntrl5.L1DcacheMemory_total_misses: 75953 - system.l1_cntrl5.L1DcacheMemory_total_demand_misses: 75953 - system.l1_cntrl5.L1DcacheMemory_total_prefetches: 0 - system.l1_cntrl5.L1DcacheMemory_total_sw_prefetches: 0 - system.l1_cntrl5.L1DcacheMemory_total_hw_prefetches: 0 - - system.l1_cntrl5.L1DcacheMemory_request_type_LD: 65.1521% - system.l1_cntrl5.L1DcacheMemory_request_type_ST: 34.8479% - - system.l1_cntrl5.L1DcacheMemory_access_mode_type_Supervisor: 75953 100% - -Cache Stats: system.l1_cntrl6.L1IcacheMemory - system.l1_cntrl6.L1IcacheMemory_total_misses: 0 - system.l1_cntrl6.L1IcacheMemory_total_demand_misses: 0 - system.l1_cntrl6.L1IcacheMemory_total_prefetches: 0 - system.l1_cntrl6.L1IcacheMemory_total_sw_prefetches: 0 - system.l1_cntrl6.L1IcacheMemory_total_hw_prefetches: 0 - - -Cache Stats: system.l1_cntrl6.L1DcacheMemory - system.l1_cntrl6.L1DcacheMemory_total_misses: 75611 - system.l1_cntrl6.L1DcacheMemory_total_demand_misses: 75611 - system.l1_cntrl6.L1DcacheMemory_total_prefetches: 0 - system.l1_cntrl6.L1DcacheMemory_total_sw_prefetches: 0 - system.l1_cntrl6.L1DcacheMemory_total_hw_prefetches: 0 - - system.l1_cntrl6.L1DcacheMemory_request_type_LD: 64.7128% - system.l1_cntrl6.L1DcacheMemory_request_type_ST: 35.2872% - - system.l1_cntrl6.L1DcacheMemory_access_mode_type_Supervisor: 75611 100% - -Cache Stats: system.l1_cntrl7.L1IcacheMemory - system.l1_cntrl7.L1IcacheMemory_total_misses: 0 - system.l1_cntrl7.L1IcacheMemory_total_demand_misses: 0 - system.l1_cntrl7.L1IcacheMemory_total_prefetches: 0 - system.l1_cntrl7.L1IcacheMemory_total_sw_prefetches: 0 - system.l1_cntrl7.L1IcacheMemory_total_hw_prefetches: 0 - - -Cache Stats: system.l1_cntrl7.L1DcacheMemory - system.l1_cntrl7.L1DcacheMemory_total_misses: 76345 - system.l1_cntrl7.L1DcacheMemory_total_demand_misses: 76345 - system.l1_cntrl7.L1DcacheMemory_total_prefetches: 0 - system.l1_cntrl7.L1DcacheMemory_total_sw_prefetches: 0 - system.l1_cntrl7.L1DcacheMemory_total_hw_prefetches: 0 - - system.l1_cntrl7.L1DcacheMemory_request_type_LD: 64.6264% - system.l1_cntrl7.L1DcacheMemory_request_type_ST: 35.3736% - - system.l1_cntrl7.L1DcacheMemory_access_mode_type_Supervisor: 76345 100% - -Cache Stats: system.l2_cntrl0.L2cacheMemory - system.l2_cntrl0.L2cacheMemory_total_misses: 607517 - system.l2_cntrl0.L2cacheMemory_total_demand_misses: 607517 - system.l2_cntrl0.L2cacheMemory_total_prefetches: 0 - system.l2_cntrl0.L2cacheMemory_total_sw_prefetches: 0 - system.l2_cntrl0.L2cacheMemory_total_hw_prefetches: 0 - - system.l2_cntrl0.L2cacheMemory_request_type_GETS: 64.962% - system.l2_cntrl0.L2cacheMemory_request_type_GETX: 35.038% - - system.l2_cntrl0.L2cacheMemory_access_mode_type_Supervisor: 607517 100% - - --- L2Cache --- - - Event Counts - -L1_GET_INSTR [0 ] 0 -L1_GETS [422091 ] 422091 -L1_GETX [248760 ] 248760 -L1_UPGRADE [0 ] 0 -L1_PUTX [123601 ] 123601 -L1_PUTX_old [208407 ] 208407 -Fwd_L1_GETX [0 ] 0 -Fwd_L1_GETS [0 ] 0 -Fwd_L1_GET_INSTR [0 ] 0 -L2_Replacement [43801 ] 43801 -L2_Replacement_clean [33104485 ] 33104485 -Mem_Data [604631 ] 604631 -Mem_Ack [604626 ] 604626 -WB_Data [169468 ] 169468 -WB_Data_clean [111637 ] 111637 -Ack [2333 ] 2333 -Ack_all [201340 ] 201340 -Unblock [402 ] 402 -Unblock_Cancel [0 ] 0 -Exclusive_Unblock [603576 ] 603576 -MEM_Inv [0 ] 0 - - - Transitions - -NP L1_GET_INSTR [0 ] 0 -NP L1_GETS [392321 ] 392321 -NP L1_GETX [212315 ] 212315 -NP L1_PUTX [0 ] 0 -NP L1_PUTX_old [117846 ] 117846 - -SS L1_GET_INSTR [0 ] 0 -SS L1_GETS [0 ] 0 -SS L1_GETX [1 ] 1 -SS L1_UPGRADE [0 ] 0 -SS L1_PUTX [18 ] 18 -SS L1_PUTX_old [0 ] 0 -SS L2_Replacement [344 ] 344 -SS L2_Replacement_clean [1984 ] 1984 -SS MEM_Inv [0 ] 0 - -M L1_GET_INSTR [0 ] 0 -M L1_GETS [174 ] 174 -M L1_GETX [151 ] 151 -M L1_PUTX [0 ] 0 -M L1_PUTX_old [4 ] 4 -M L2_Replacement [43275 ] 43275 -M L2_Replacement_clean [79310 ] 79310 -M MEM_Inv [0 ] 0 - -MT L1_GET_INSTR [0 ] 0 -MT L1_GETS [402 ] 402 -MT L1_GETX [547 ] 547 -MT L1_PUTX [122912 ] 122912 -MT L1_PUTX_old [89 ] 89 -MT L2_Replacement [72 ] 72 -MT L2_Replacement_clean [479643 ] 479643 -MT MEM_Inv [0 ] 0 - -M_I L1_GET_INSTR [0 ] 0 -M_I L1_GETS [3243 ] 3243 -M_I L1_GETX [1799 ] 1799 -M_I L1_UPGRADE [0 ] 0 -M_I L1_PUTX [0 ] 0 -M_I L1_PUTX_old [54713 ] 54713 -M_I Mem_Ack [604626 ] 604626 -M_I MEM_Inv [0 ] 0 - -MT_I L1_GET_INSTR [0 ] 0 -MT_I L1_GETS [0 ] 0 -MT_I L1_GETX [0 ] 0 -MT_I L1_UPGRADE [0 ] 0 -MT_I L1_PUTX [0 ] 0 -MT_I L1_PUTX_old [2 ] 2 -MT_I WB_Data [25 ] 25 -MT_I WB_Data_clean [0 ] 0 -MT_I Ack_all [47 ] 47 -MT_I MEM_Inv [0 ] 0 - -MCT_I L1_GET_INSTR [0 ] 0 -MCT_I L1_GETS [106 ] 106 -MCT_I L1_GETX [144 ] 144 -MCT_I L1_UPGRADE [0 ] 0 -MCT_I L1_PUTX [0 ] 0 -MCT_I L1_PUTX_old [35361 ] 35361 -MCT_I WB_Data [169099 ] 169099 -MCT_I WB_Data_clean [111579 ] 111579 -MCT_I Ack_all [198965 ] 198965 - -I_I L1_GET_INSTR [0 ] 0 -I_I L1_GETS [0 ] 0 -I_I L1_GETX [0 ] 0 -I_I L1_UPGRADE [0 ] 0 -I_I L1_PUTX [0 ] 0 -I_I L1_PUTX_old [0 ] 0 -I_I Ack [1989 ] 1989 -I_I Ack_all [1984 ] 1984 - -S_I L1_GET_INSTR [0 ] 0 -S_I L1_GETS [0 ] 0 -S_I L1_GETX [0 ] 0 -S_I L1_UPGRADE [0 ] 0 -S_I L1_PUTX [0 ] 0 -S_I L1_PUTX_old [0 ] 0 -S_I Ack [344 ] 344 -S_I Ack_all [344 ] 344 -S_I MEM_Inv [0 ] 0 - -ISS L1_GET_INSTR [0 ] 0 -ISS L1_GETS [1927 ] 1927 -ISS L1_GETX [20828 ] 20828 -ISS L1_PUTX [0 ] 0 -ISS L1_PUTX_old [212 ] 212 -ISS L2_Replacement [0 ] 0 -ISS L2_Replacement_clean [19036421 ] 19036421 -ISS Mem_Data [390392 ] 390392 -ISS MEM_Inv [0 ] 0 - -IS L1_GET_INSTR [0 ] 0 -IS L1_GETS [5 ] 5 -IS L1_GETX [143 ] 143 -IS L1_PUTX [0 ] 0 -IS L1_PUTX_old [0 ] 0 -IS L2_Replacement [0 ] 0 -IS L2_Replacement_clean [97464 ] 97464 -IS Mem_Data [1927 ] 1927 -IS MEM_Inv [0 ] 0 - -IM L1_GET_INSTR [0 ] 0 -IM L1_GETS [22267 ] 22267 -IM L1_GETX [10554 ] 10554 -IM L1_PUTX [0 ] 0 -IM L1_PUTX_old [180 ] 180 -IM L2_Replacement [0 ] 0 -IM L2_Replacement_clean [10368191 ] 10368191 -IM Mem_Data [212312 ] 212312 -IM MEM_Inv [0 ] 0 - -SS_MB L1_GET_INSTR [0 ] 0 -SS_MB L1_GETS [0 ] 0 -SS_MB L1_GETX [0 ] 0 -SS_MB L1_UPGRADE [0 ] 0 -SS_MB L1_PUTX [0 ] 0 -SS_MB L1_PUTX_old [0 ] 0 -SS_MB L2_Replacement [0 ] 0 -SS_MB L2_Replacement_clean [0 ] 0 -SS_MB Unblock_Cancel [0 ] 0 -SS_MB Exclusive_Unblock [1 ] 1 -SS_MB MEM_Inv [0 ] 0 - -MT_MB L1_GET_INSTR [0 ] 0 -MT_MB L1_GETS [1646 ] 1646 -MT_MB L1_GETX [2278 ] 2278 -MT_MB L1_UPGRADE [0 ] 0 -MT_MB L1_PUTX [388 ] 388 -MT_MB L1_PUTX_old [0 ] 0 -MT_MB L2_Replacement [19 ] 19 -MT_MB L2_Replacement_clean [3040991 ] 3040991 -MT_MB Unblock_Cancel [0 ] 0 -MT_MB Exclusive_Unblock [603575 ] 603575 -MT_MB MEM_Inv [0 ] 0 - -M_MB L1_GET_INSTR [0 ] 0 -M_MB L1_GETS [0 ] 0 -M_MB L1_GETX [0 ] 0 -M_MB L1_UPGRADE [0 ] 0 -M_MB L1_PUTX [0 ] 0 -M_MB L1_PUTX_old [0 ] 0 -M_MB L2_Replacement [0 ] 0 -M_MB L2_Replacement_clean [0 ] 0 -M_MB Exclusive_Unblock [0 ] 0 -M_MB MEM_Inv [0 ] 0 - -MT_IIB L1_GET_INSTR [0 ] 0 -MT_IIB L1_GETS [0 ] 0 -MT_IIB L1_GETX [0 ] 0 -MT_IIB L1_UPGRADE [0 ] 0 -MT_IIB L1_PUTX [203 ] 203 -MT_IIB L1_PUTX_old [0 ] 0 -MT_IIB L2_Replacement [0 ] 0 -MT_IIB L2_Replacement_clean [480 ] 480 -MT_IIB WB_Data [343 ] 343 -MT_IIB WB_Data_clean [58 ] 58 -MT_IIB Unblock [1 ] 1 -MT_IIB MEM_Inv [0 ] 0 - -MT_IB L1_GET_INSTR [0 ] 0 -MT_IB L1_GETS [0 ] 0 -MT_IB L1_GETX [0 ] 0 -MT_IB L1_UPGRADE [0 ] 0 -MT_IB L1_PUTX [0 ] 0 -MT_IB L1_PUTX_old [0 ] 0 -MT_IB L2_Replacement [0 ] 0 -MT_IB L2_Replacement_clean [0 ] 0 -MT_IB WB_Data [1 ] 1 -MT_IB WB_Data_clean [0 ] 0 -MT_IB Unblock_Cancel [0 ] 0 -MT_IB MEM_Inv [0 ] 0 - -MT_SB L1_GET_INSTR [0 ] 0 -MT_SB L1_GETS [0 ] 0 -MT_SB L1_GETX [0 ] 0 -MT_SB L1_UPGRADE [0 ] 0 -MT_SB L1_PUTX [80 ] 80 -MT_SB L1_PUTX_old [0 ] 0 -MT_SB L2_Replacement [91 ] 91 -MT_SB L2_Replacement_clean [1 ] 1 -MT_SB Unblock [401 ] 401 -MT_SB MEM_Inv [0 ] 0 - -Memory controller: system.dir_cntrl0.memBuffer: - memory_total_requests: 817426 - memory_reads: 604635 - memory_writes: 212789 - memory_refreshes: 47021 - memory_total_request_delays: 10414985 - memory_delays_per_request: 12.7412 - memory_delays_in_input_queue: 359587 - memory_delays_behind_head_of_bank_queue: 1350935 - memory_delays_stalled_at_head_of_bank_queue: 8704463 - memory_stalls_for_bank_busy: 1530499 - memory_stalls_for_random_busy: 0 - memory_stalls_for_anti_starvation: 674659 - memory_stalls_for_arbitration: 1774410 - memory_stalls_for_bus: 2738438 - memory_stalls_for_tfaw: 0 - memory_stalls_for_read_write_turnaround: 1415262 - memory_stalls_for_read_read_turnaround: 571195 - accesses_per_bank: 25739 25325 25438 25683 25679 25637 25766 25555 25740 25505 25578 25662 25344 25393 25488 25442 25462 25509 25568 25516 25705 25537 25668 25458 25453 25173 25551 25126 25479 25713 25863 25671 - - --- Directory --- - - Event Counts - -Fetch [604636 ] 604636 -Data [212790 ] 212790 -Memory_Data [604631 ] 604631 -Memory_Ack [212788 ] 212788 -DMA_READ [0 ] 0 -DMA_WRITE [0 ] 0 -CleanReplacement [391838 ] 391838 - - - Transitions - -I Fetch [604636 ] 604636 -I DMA_READ [0 ] 0 -I DMA_WRITE [0 ] 0 - -ID Fetch [0 ] 0 -ID Data [0 ] 0 -ID Memory_Data [0 ] 0 -ID DMA_READ [0 ] 0 -ID DMA_WRITE [0 ] 0 - -ID_W Fetch [0 ] 0 -ID_W Data [0 ] 0 -ID_W Memory_Ack [0 ] 0 -ID_W DMA_READ [0 ] 0 -ID_W DMA_WRITE [0 ] 0 - -M Data [212790 ] 212790 -M DMA_READ [0 ] 0 -M DMA_WRITE [0 ] 0 -M CleanReplacement [391838 ] 391838 - -IM Fetch [0 ] 0 -IM Data [0 ] 0 -IM Memory_Data [604631 ] 604631 -IM DMA_READ [0 ] 0 -IM DMA_WRITE [0 ] 0 - -MI Fetch [0 ] 0 -MI Data [0 ] 0 -MI Memory_Ack [212788 ] 212788 -MI DMA_READ [0 ] 0 -MI DMA_WRITE [0 ] 0 - -M_DRD Data [0 ] 0 -M_DRD DMA_READ [0 ] 0 -M_DRD DMA_WRITE [0 ] 0 - -M_DRDI Fetch [0 ] 0 -M_DRDI Data [0 ] 0 -M_DRDI Memory_Ack [0 ] 0 -M_DRDI DMA_READ [0 ] 0 -M_DRDI DMA_WRITE [0 ] 0 - -M_DWR Data [0 ] 0 -M_DWR DMA_READ [0 ] 0 -M_DWR DMA_WRITE [0 ] 0 - -M_DWRI Fetch [0 ] 0 -M_DWRI Data [0 ] 0 -M_DWRI Memory_Ack [0 ] 0 -M_DWRI DMA_READ [0 ] 0 -M_DWRI DMA_WRITE [0 ] 0 - diff --git a/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simerr b/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simerr deleted file mode 100755 index c4fb7c226..000000000 --- a/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simerr +++ /dev/null @@ -1,74 +0,0 @@ -system.cpu7: completed 10000 read, 5407 write accesses @2193104 -system.cpu5: completed 10000 read, 5417 write accesses @2227894 -system.cpu3: completed 10000 read, 5304 write accesses @2241899 -system.cpu0: completed 10000 read, 5406 write accesses @2286999 -system.cpu6: completed 10000 read, 5500 write accesses @2314615 -system.cpu2: completed 10000 read, 5192 write accesses @2332464 -system.cpu4: completed 10000 read, 5484 write accesses @2351825 -system.cpu1: completed 10000 read, 5601 write accesses @2421215 -system.cpu7: completed 20000 read, 10600 write accesses @4362574 -system.cpu2: completed 20000 read, 10442 write accesses @4540254 -system.cpu5: completed 20000 read, 10862 write accesses @4558355 -system.cpu3: completed 20000 read, 10634 write accesses @4562696 -system.cpu0: completed 20000 read, 10789 write accesses @4572225 -system.cpu6: completed 20000 read, 10964 write accesses @4613315 -system.cpu4: completed 20000 read, 10859 write accesses @4624135 -system.cpu1: completed 20000 read, 10860 write accesses @4669865 -system.cpu7: completed 30000 read, 16054 write accesses @6655525 -system.cpu0: completed 30000 read, 16092 write accesses @6770115 -system.cpu1: completed 30000 read, 16284 write accesses @6828865 -system.cpu3: completed 30000 read, 16125 write accesses @6864285 -system.cpu4: completed 30000 read, 16227 write accesses @6890965 -system.cpu6: completed 30000 read, 16336 write accesses @6904064 -system.cpu2: completed 30000 read, 15932 write accesses @6953085 -system.cpu5: completed 30000 read, 16240 write accesses @6957625 -system.cpu7: completed 40000 read, 21410 write accesses @8901178 -system.cpu0: completed 40000 read, 21509 write accesses @9069465 -system.cpu1: completed 40000 read, 21632 write accesses @9091094 -system.cpu3: completed 40000 read, 21475 write accesses @9116195 -system.cpu4: completed 40000 read, 21761 write accesses @9209395 -system.cpu5: completed 40000 read, 21553 write accesses @9245188 -system.cpu6: completed 40000 read, 21832 write accesses @9310296 -system.cpu2: completed 40000 read, 21265 write accesses @9325324 -system.cpu7: completed 50000 read, 26853 write accesses @11255815 -system.cpu0: completed 50000 read, 26977 write accesses @11286865 -system.cpu1: completed 50000 read, 27136 write accesses @11385455 -system.cpu5: completed 50000 read, 26999 write accesses @11446175 -system.cpu4: completed 50000 read, 27138 write accesses @11497105 -system.cpu3: completed 50000 read, 26925 write accesses @11513845 -system.cpu6: completed 50000 read, 27245 write accesses @11629194 -system.cpu2: completed 50000 read, 26613 write accesses @11642405 -system.cpu0: completed 60000 read, 32322 write accesses @13513714 -system.cpu7: completed 60000 read, 32300 write accesses @13580354 -system.cpu5: completed 60000 read, 32335 write accesses @13650056 -system.cpu1: completed 60000 read, 32734 write accesses @13710275 -system.cpu4: completed 60000 read, 32403 write accesses @13735965 -system.cpu2: completed 60000 read, 31942 write accesses @13824435 -system.cpu6: completed 60000 read, 32511 write accesses @13871344 -system.cpu3: completed 60000 read, 32324 write accesses @13913205 -system.cpu0: completed 70000 read, 37723 write accesses @15813186 -system.cpu7: completed 70000 read, 37805 write accesses @15917425 -system.cpu5: completed 70000 read, 37663 write accesses @15942505 -system.cpu4: completed 70000 read, 37631 write accesses @16028785 -system.cpu1: completed 70000 read, 38017 write accesses @16031454 -system.cpu3: completed 70000 read, 37707 write accesses @16112322 -system.cpu6: completed 70000 read, 37910 write accesses @16120997 -system.cpu2: completed 70000 read, 37183 write accesses @16150764 -system.cpu0: completed 80000 read, 42908 write accesses @18001745 -system.cpu5: completed 80000 read, 42901 write accesses @18163144 -system.cpu4: completed 80000 read, 42765 write accesses @18206905 -system.cpu7: completed 80000 read, 43338 write accesses @18261574 -system.cpu6: completed 80000 read, 43257 write accesses @18334555 -system.cpu1: completed 80000 read, 43298 write accesses @18408395 -system.cpu3: completed 80000 read, 43106 write accesses @18453978 -system.cpu2: completed 80000 read, 42466 write accesses @18467507 -system.cpu0: completed 90000 read, 48230 write accesses @20259175 -system.cpu5: completed 90000 read, 48356 write accesses @20526365 -system.cpu7: completed 90000 read, 48874 write accesses @20532605 -system.cpu4: completed 90000 read, 48159 write accesses @20555334 -system.cpu1: completed 90000 read, 48676 write accesses @20572365 -system.cpu6: completed 90000 read, 48688 write accesses @20703625 -system.cpu2: completed 90000 read, 47767 write accesses @20716675 -system.cpu3: completed 90000 read, 48620 write accesses @20769265 -system.cpu0: completed 100000 read, 53615 write accesses @22570074 -hack: be nice to actually delete the event here diff --git a/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simout b/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simout deleted file mode 100755 index 20caf030d..000000000 --- a/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simout +++ /dev/null @@ -1,10 +0,0 @@ -gem5 Simulator System. http://gem5.org -gem5 is copyrighted software; use the --copyright option for details. - -gem5 compiled Jan 23 2012 03:44:57 -gem5 started Jan 23 2012 04:22:01 -gem5 executing on zizzer -command line: build/ALPHA_SE_MESI_CMP_directory/gem5.opt -d build/ALPHA_SE_MESI_CMP_directory/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MESI_CMP_directory -re tests/run.py build/ALPHA_SE_MESI_CMP_directory/tests/opt/quick/50.memtest/alpha/linux/memtest-ruby-MESI_CMP_directory -Global frequency set at 1000000000 ticks per second -info: Entering event queue @ 0. Starting simulation... -Exiting @ tick 22570074 because maximum number of loads reached diff --git a/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/stats.txt b/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/stats.txt deleted file mode 100644 index bb265760e..000000000 --- a/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/stats.txt +++ /dev/null @@ -1,47 +0,0 @@ - ----------- Begin Simulation Statistics ---------- -sim_seconds 0.022570 # Number of seconds simulated -sim_ticks 22570074 # Number of ticks simulated -final_tick 22570074 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) -sim_freq 1000000000 # Frequency of simulated ticks -host_tick_rate 89999 # Simulator tick rate (ticks/s) -host_mem_usage 347844 # Number of bytes of host memory used -host_seconds 250.78 # Real time elapsed on the host -system.physmem.bytes_read 0 # Number of bytes read from this memory -system.physmem.bytes_inst_read 0 # Number of instructions bytes read from this memory -system.physmem.bytes_written 0 # Number of bytes written to this memory -system.physmem.num_reads 0 # Number of read requests responded to by this memory -system.physmem.num_writes 0 # Number of write requests responded to by this memory -system.physmem.num_other 0 # Number of other requests responded to by this memory -system.funcmem.bytes_read 0 # Number of bytes read from this memory -system.funcmem.bytes_inst_read 0 # Number of instructions bytes read from this memory -system.funcmem.bytes_written 0 # Number of bytes written to this memory -system.funcmem.num_reads 0 # Number of read requests responded to by this memory -system.funcmem.num_writes 0 # Number of write requests responded to by this memory -system.funcmem.num_other 0 # Number of other requests responded to by this memory -system.cpu0.num_reads 100000 # number of read accesses completed -system.cpu0.num_writes 53615 # number of write accesses completed -system.cpu0.num_copies 0 # number of copy accesses completed -system.cpu1.num_reads 98926 # number of read accesses completed -system.cpu1.num_writes 53490 # number of write accesses completed -system.cpu1.num_copies 0 # number of copy accesses completed -system.cpu2.num_reads 98053 # number of read accesses completed -system.cpu2.num_writes 52227 # number of write accesses completed -system.cpu2.num_copies 0 # number of copy accesses completed -system.cpu3.num_reads 98222 # number of read accesses completed -system.cpu3.num_writes 53057 # number of write accesses completed -system.cpu3.num_copies 0 # number of copy accesses completed -system.cpu4.num_reads 98292 # number of read accesses completed -system.cpu4.num_writes 52603 # number of write accesses completed -system.cpu4.num_copies 0 # number of copy accesses completed -system.cpu5.num_reads 98988 # number of read accesses completed -system.cpu5.num_writes 53055 # number of write accesses completed -system.cpu5.num_copies 0 # number of copy accesses completed -system.cpu6.num_reads 98007 # number of read accesses completed -system.cpu6.num_writes 53041 # number of write accesses completed -system.cpu6.num_copies 0 # number of copy accesses completed -system.cpu7.num_reads 99081 # number of read accesses completed -system.cpu7.num_writes 53785 # number of write accesses completed -system.cpu7.num_copies 0 # number of copy accesses completed - ----------- End Simulation Statistics ---------- |