m5: Regression Tester Update

This patch includes the necessary regression updates to test the new ruby
configuration system.  The patch includes support for multiple ruby protocols
and adds the ruby random tester.  The patch removes atomic mode test for
ruby since ruby does not support atomic mode acceses.  These tests can be
added back in when ruby supports atomic mode for real.

--HG--
rename : tests/quick/50.memtest/test.py => tests/quick/60.rubytest/test.py

1 files changed, 34 insertions, 0 deletions

diff --git a/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/stats.txt b/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/stats.txt
new file mode 100644
index 000000000..9f8f7b94e
--- /dev/null
+++ b/tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/stats.txt
@@ -0,0 +1,34 @@
+
+---------- Begin Simulation Statistics ----------
+host_mem_usage                                 342412                       # Number of bytes of host memory used
+host_seconds                                    54.05                       # Real time elapsed on the host
+host_tick_rate                                  80836                       # Simulator tick rate (ticks/s)
+sim_freq                                   1000000000                       # Frequency of simulated ticks
+sim_seconds                                  0.004369                       # Number of seconds simulated
+sim_ticks                                     4369301                       # Number of ticks simulated
+system.cpu0.num_copies                              0                       # number of copy accesses completed
+system.cpu0.num_reads                           99702                       # number of read accesses completed
+system.cpu0.num_writes                          54194                       # number of write accesses completed
+system.cpu1.num_copies                              0                       # number of copy accesses completed
+system.cpu1.num_reads                           99603                       # number of read accesses completed
+system.cpu1.num_writes                          53835                       # number of write accesses completed
+system.cpu2.num_copies                              0                       # number of copy accesses completed
+system.cpu2.num_reads                           99782                       # number of read accesses completed
+system.cpu2.num_writes                          53417                       # number of write accesses completed
+system.cpu3.num_copies                              0                       # number of copy accesses completed
+system.cpu3.num_reads                          100000                       # number of read accesses completed
+system.cpu3.num_writes                          53655                       # number of write accesses completed
+system.cpu4.num_copies                              0                       # number of copy accesses completed
+system.cpu4.num_reads                           99541                       # number of read accesses completed
+system.cpu4.num_writes                          53625                       # number of write accesses completed
+system.cpu5.num_copies                              0                       # number of copy accesses completed
+system.cpu5.num_reads                           99748                       # number of read accesses completed
+system.cpu5.num_writes                          53937                       # number of write accesses completed
+system.cpu6.num_copies                              0                       # number of copy accesses completed
+system.cpu6.num_reads                           99530                       # number of read accesses completed
+system.cpu6.num_writes                          53708                       # number of write accesses completed
+system.cpu7.num_copies                              0                       # number of copy accesses completed
+system.cpu7.num_reads                           99892                       # number of read accesses completed
+system.cpu7.num_writes                          53981                       # number of write accesses completed
+
+---------- End Simulation Statistics   ----------