diff options
author | Steve Reinhardt <stever@eecs.umich.edu> | 2007-02-06 21:16:33 -0800 |
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committer | Steve Reinhardt <stever@eecs.umich.edu> | 2007-02-06 21:16:33 -0800 |
commit | d4867001490911bf853130ec0eeb1731ba71da37 (patch) | |
tree | 7bb115e97a32b5742dbd873f5b914d43b2578534 /tests/quick/50.memtest/ref/alpha/linux/memtest/stderr | |
parent | 98ef836ca6a851c14b335603f75a2d728a897936 (diff) | |
download | gem5-d4867001490911bf853130ec0eeb1731ba71da37.tar.xz |
Add short memtest run to quick regressions.
Caveats:
- Even though memtest is ISA-independent, it will only
run for the Alpha builds, since there's no way to specify
ISA-independent reference files and I didn't want to commit
3 copies since I'm not sure we want to run it for all the
different ISAs anyway.
- Reference outputs were generated on my laptop,
so performance numbers will be low compared to zizzer.
--HG--
extra : convert_revision : 210fe4abecc19fbab0b15402c6cb4863650bab66
Diffstat (limited to 'tests/quick/50.memtest/ref/alpha/linux/memtest/stderr')
-rw-r--r-- | tests/quick/50.memtest/ref/alpha/linux/memtest/stderr | 74 |
1 files changed, 74 insertions, 0 deletions
diff --git a/tests/quick/50.memtest/ref/alpha/linux/memtest/stderr b/tests/quick/50.memtest/ref/alpha/linux/memtest/stderr new file mode 100644 index 000000000..16580296b --- /dev/null +++ b/tests/quick/50.memtest/ref/alpha/linux/memtest/stderr @@ -0,0 +1,74 @@ +warn: Entering event queue @ 0. Starting simulation... +system.cpu2: completed 10000 read accesses @573559 +system.cpu1: completed 10000 read accesses @574452 +system.cpu4: completed 10000 read accesses @578704 +system.cpu6: completed 10000 read accesses @579414 +system.cpu0: completed 10000 read accesses @588706 +system.cpu5: completed 10000 read accesses @590846 +system.cpu7: completed 10000 read accesses @592958 +system.cpu3: completed 10000 read accesses @604807 +system.cpu2: completed 20000 read accesses @1142209 +system.cpu1: completed 20000 read accesses @1143294 +system.cpu6: completed 20000 read accesses @1150506 +system.cpu4: completed 20000 read accesses @1152288 +system.cpu0: completed 20000 read accesses @1160537 +system.cpu3: completed 20000 read accesses @1175338 +system.cpu5: completed 20000 read accesses @1175648 +system.cpu7: completed 20000 read accesses @1180960 +system.cpu6: completed 30000 read accesses @1716218 +system.cpu3: completed 30000 read accesses @1728281 +system.cpu1: completed 30000 read accesses @1735983 +system.cpu0: completed 30000 read accesses @1736422 +system.cpu2: completed 30000 read accesses @1739692 +system.cpu4: completed 30000 read accesses @1746362 +system.cpu5: completed 30000 read accesses @1766199 +system.cpu7: completed 30000 read accesses @1783424 +system.cpu6: completed 40000 read accesses @2281651 +system.cpu0: completed 40000 read accesses @2300760 +system.cpu3: completed 40000 read accesses @2312993 +system.cpu2: completed 40000 read accesses @2314026 +system.cpu4: completed 40000 read accesses @2332178 +system.cpu1: completed 40000 read accesses @2336380 +system.cpu5: completed 40000 read accesses @2349370 +system.cpu7: completed 40000 read accesses @2365352 +system.cpu6: completed 50000 read accesses @2863317 +system.cpu0: completed 50000 read accesses @2878182 +system.cpu2: completed 50000 read accesses @2884989 +system.cpu3: completed 50000 read accesses @2897940 +system.cpu4: completed 50000 read accesses @2918842 +system.cpu1: completed 50000 read accesses @2929102 +system.cpu5: completed 50000 read accesses @2938269 +system.cpu7: completed 50000 read accesses @2944872 +system.cpu6: completed 60000 read accesses @3435715 +system.cpu2: completed 60000 read accesses @3454809 +system.cpu0: completed 60000 read accesses @3462986 +system.cpu3: completed 60000 read accesses @3485243 +system.cpu4: completed 60000 read accesses @3498361 +system.cpu1: completed 60000 read accesses @3501000 +system.cpu5: completed 60000 read accesses @3516984 +system.cpu7: completed 60000 read accesses @3517323 +system.cpu6: completed 70000 read accesses @4032530 +system.cpu0: completed 70000 read accesses @4041457 +system.cpu2: completed 70000 read accesses @4043695 +system.cpu7: completed 70000 read accesses @4070977 +system.cpu1: completed 70000 read accesses @4075964 +system.cpu4: completed 70000 read accesses @4076518 +system.cpu3: completed 70000 read accesses @4082470 +system.cpu5: completed 70000 read accesses @4104778 +system.cpu0: completed 80000 read accesses @4610101 +system.cpu2: completed 80000 read accesses @4622528 +system.cpu6: completed 80000 read accesses @4627690 +system.cpu1: completed 80000 read accesses @4654033 +system.cpu4: completed 80000 read accesses @4661016 +system.cpu3: completed 80000 read accesses @4662752 +system.cpu7: completed 80000 read accesses @4668924 +system.cpu5: completed 80000 read accesses @4689767 +system.cpu2: completed 90000 read accesses @5186824 +system.cpu0: completed 90000 read accesses @5189006 +system.cpu6: completed 90000 read accesses @5214829 +system.cpu1: completed 90000 read accesses @5229787 +system.cpu3: completed 90000 read accesses @5235400 +system.cpu4: completed 90000 read accesses @5240445 +system.cpu7: completed 90000 read accesses @5254426 +system.cpu5: completed 90000 read accesses @5292462 +system.cpu2: completed 100000 read accesses @5755736 |