diff options
author | Steve Reinhardt <steve.reinhardt@amd.com> | 2010-08-17 05:06:22 -0700 |
---|---|---|
committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2010-08-17 05:06:22 -0700 |
commit | 0f8b5afd7ad82fda05c3ad42cda4f9046992428d (patch) | |
tree | 794e8480ec916aa1b7da4c756f71ae1f6b1ffec7 /tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini | |
parent | 0685ae7a2dbceaa2b9b264a57c9d5f82868e777e (diff) | |
download | gem5-0f8b5afd7ad82fda05c3ad42cda4f9046992428d.tar.xz |
tests: update reference config.ini files for previous cset
Rename 'responder_set' to 'use_default_range'.
Diffstat (limited to 'tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini')
-rw-r--r-- | tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini b/tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini index f9d319b05..5e988f0dd 100644 --- a/tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini +++ b/tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini @@ -128,7 +128,7 @@ block_size=64 bus_id=0 clock=1000 header_cycles=1 -responder_set=true +use_default_range=true width=64 default=drivesys.tsunami.pciconfig.pio port=drivesys.bridge.side_a drivesys.tsunami.cchip.pio drivesys.tsunami.pchip.pio drivesys.tsunami.fake_sm_chip.pio drivesys.tsunami.fake_uart1.pio drivesys.tsunami.fake_uart2.pio drivesys.tsunami.fake_uart3.pio drivesys.tsunami.fake_uart4.pio drivesys.tsunami.fake_ppc.pio drivesys.tsunami.fake_OROM.pio drivesys.tsunami.fake_pnp_addr.pio drivesys.tsunami.fake_pnp_write.pio drivesys.tsunami.fake_pnp_read0.pio drivesys.tsunami.fake_pnp_read1.pio drivesys.tsunami.fake_pnp_read2.pio drivesys.tsunami.fake_pnp_read3.pio drivesys.tsunami.fake_pnp_read4.pio drivesys.tsunami.fake_pnp_read5.pio drivesys.tsunami.fake_pnp_read6.pio drivesys.tsunami.fake_pnp_read7.pio drivesys.tsunami.fake_ata0.pio drivesys.tsunami.fake_ata1.pio drivesys.tsunami.fb.pio drivesys.tsunami.io.pio drivesys.tsunami.uart.pio drivesys.tsunami.backdoor.pio drivesys.tsunami.ide.pio drivesys.tsunami.ethernet.pio drivesys.tsunami.ethernet.config drivesys.tsunami.ethernet.dma drivesys.tsunami.ide.config drivesys.tsunami.ide.dma @@ -140,7 +140,7 @@ block_size=64 bus_id=1 clock=1000 header_cycles=1 -responder_set=false +use_default_range=false width=64 default=drivesys.membus.badaddr_responder.pio port=drivesys.bridge.side_b drivesys.physmem.port[0] drivesys.cpu.icache_port drivesys.cpu.dcache_port @@ -832,7 +832,7 @@ block_size=64 bus_id=0 clock=1000 header_cycles=1 -responder_set=true +use_default_range=true width=64 default=testsys.tsunami.pciconfig.pio port=testsys.bridge.side_a testsys.tsunami.cchip.pio testsys.tsunami.pchip.pio testsys.tsunami.fake_sm_chip.pio testsys.tsunami.fake_uart1.pio testsys.tsunami.fake_uart2.pio testsys.tsunami.fake_uart3.pio testsys.tsunami.fake_uart4.pio testsys.tsunami.fake_ppc.pio testsys.tsunami.fake_OROM.pio testsys.tsunami.fake_pnp_addr.pio testsys.tsunami.fake_pnp_write.pio testsys.tsunami.fake_pnp_read0.pio testsys.tsunami.fake_pnp_read1.pio testsys.tsunami.fake_pnp_read2.pio testsys.tsunami.fake_pnp_read3.pio testsys.tsunami.fake_pnp_read4.pio testsys.tsunami.fake_pnp_read5.pio testsys.tsunami.fake_pnp_read6.pio testsys.tsunami.fake_pnp_read7.pio testsys.tsunami.fake_ata0.pio testsys.tsunami.fake_ata1.pio testsys.tsunami.fb.pio testsys.tsunami.io.pio testsys.tsunami.uart.pio testsys.tsunami.backdoor.pio testsys.tsunami.ide.pio testsys.tsunami.ethernet.pio testsys.tsunami.ethernet.config testsys.tsunami.ethernet.dma testsys.tsunami.ide.config testsys.tsunami.ide.dma @@ -844,7 +844,7 @@ block_size=64 bus_id=1 clock=1000 header_cycles=1 -responder_set=false +use_default_range=false width=64 default=testsys.membus.badaddr_responder.pio port=testsys.bridge.side_b testsys.physmem.port[0] testsys.cpu.icache_port testsys.cpu.dcache_port |