output: Change default output directory and files and update tests.

--HG-- rename : tests/long/00.gzip/ref/alpha/tru64/o3-timing/stderr => tests/long/00.gzip/ref/alpha/tru64/o3-timing/simerr rename : tests/long/00.gzip/ref/alpha/tru64/o3-timing/stdout => tests/long/00.gzip/ref/alpha/tru64/o3-timing/simout rename : tests/long/00.gzip/ref/alpha/tru64/o3-timing/m5stats.txt => tests/long/00.gzip/ref/alpha/tru64/o3-timing/stats.txt rename : tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stderr => tests/long/00.gzip/ref/alpha/tru64/simple-atomic/simerr rename : tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stdout => tests/long/00.gzip/ref/alpha/tru64/simple-atomic/simout rename : tests/long/00.gzip/ref/alpha/tru64/simple-atomic/m5stats.txt => tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stats.txt rename : tests/long/00.gzip/ref/alpha/tru64/simple-timing/stderr => tests/long/00.gzip/ref/alpha/tru64/simple-timing/simerr rename : tests/long/00.gzip/ref/alpha/tru64/simple-timing/stdout => tests/long/00.gzip/ref/alpha/tru64/simple-timing/simout rename : tests/long/00.gzip/ref/alpha/tru64/simple-timing/m5stats.txt => tests/long/00.gzip/ref/alpha/tru64/simple-timing/stats.txt rename : tests/long/00.gzip/ref/sparc/linux/o3-timing/stderr => tests/long/00.gzip/ref/sparc/linux/o3-timing/simerr rename : tests/long/00.gzip/ref/sparc/linux/o3-timing/stdout => tests/long/00.gzip/ref/sparc/linux/o3-timing/simout rename : tests/long/00.gzip/ref/sparc/linux/o3-timing/m5stats.txt => tests/long/00.gzip/ref/sparc/linux/o3-timing/stats.txt rename : tests/long/00.gzip/ref/sparc/linux/simple-atomic/stderr => tests/long/00.gzip/ref/sparc/linux/simple-atomic/simerr rename : tests/long/00.gzip/ref/sparc/linux/simple-atomic/stdout => tests/long/00.gzip/ref/sparc/linux/simple-atomic/simout rename : tests/long/00.gzip/ref/sparc/linux/simple-atomic/m5stats.txt => tests/long/00.gzip/ref/sparc/linux/simple-atomic/stats.txt rename : tests/long/00.gzip/ref/sparc/linux/simple-timing/stderr => tests/long/00.gzip/ref/sparc/linux/simple-timing/simerr rename : tests/long/00.gzip/ref/sparc/linux/simple-timing/stdout => tests/long/00.gzip/ref/sparc/linux/simple-timing/simout rename : tests/long/00.gzip/ref/sparc/linux/simple-timing/m5stats.txt => tests/long/00.gzip/ref/sparc/linux/simple-timing/stats.txt rename : tests/long/00.gzip/ref/x86/linux/simple-atomic/stderr => tests/long/00.gzip/ref/x86/linux/simple-atomic/simerr rename : tests/long/00.gzip/ref/x86/linux/simple-atomic/stdout => tests/long/00.gzip/ref/x86/linux/simple-atomic/simout rename : tests/long/00.gzip/ref/x86/linux/simple-atomic/m5stats.txt => tests/long/00.gzip/ref/x86/linux/simple-atomic/stats.txt rename : tests/long/00.gzip/ref/x86/linux/simple-timing/stderr => tests/long/00.gzip/ref/x86/linux/simple-timing/simerr rename : tests/long/00.gzip/ref/x86/linux/simple-timing/stdout => tests/long/00.gzip/ref/x86/linux/simple-timing/simout rename : tests/long/00.gzip/ref/x86/linux/simple-timing/m5stats.txt => tests/long/00.gzip/ref/x86/linux/simple-timing/stats.txt rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stderr => tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simerr rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stdout => tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/m5stats.txt => tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/stderr => tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simerr rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/stdout => tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simout rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/m5stats.txt => tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt rename : tests/long/10.mcf/ref/sparc/linux/simple-atomic/stderr => tests/long/10.mcf/ref/sparc/linux/simple-atomic/simerr rename : tests/long/10.mcf/ref/sparc/linux/simple-atomic/stdout => tests/long/10.mcf/ref/sparc/linux/simple-atomic/simout rename : tests/long/10.mcf/ref/sparc/linux/simple-atomic/m5stats.txt => tests/long/10.mcf/ref/sparc/linux/simple-atomic/stats.txt rename : tests/long/10.mcf/ref/sparc/linux/simple-timing/stderr => tests/long/10.mcf/ref/sparc/linux/simple-timing/simerr rename : tests/long/10.mcf/ref/sparc/linux/simple-timing/stdout => tests/long/10.mcf/ref/sparc/linux/simple-timing/simout rename : tests/long/10.mcf/ref/sparc/linux/simple-timing/m5stats.txt => tests/long/10.mcf/ref/sparc/linux/simple-timing/stats.txt rename : tests/long/10.mcf/ref/x86/linux/simple-atomic/stderr => tests/long/10.mcf/ref/x86/linux/simple-atomic/simerr rename : tests/long/10.mcf/ref/x86/linux/simple-atomic/stdout => tests/long/10.mcf/ref/x86/linux/simple-atomic/simout rename : tests/long/10.mcf/ref/x86/linux/simple-atomic/m5stats.txt => tests/long/10.mcf/ref/x86/linux/simple-atomic/stats.txt rename : tests/long/10.mcf/ref/x86/linux/simple-timing/stderr => tests/long/10.mcf/ref/x86/linux/simple-timing/simerr rename : tests/long/10.mcf/ref/x86/linux/simple-timing/stdout => tests/long/10.mcf/ref/x86/linux/simple-timing/simout rename : tests/long/10.mcf/ref/x86/linux/simple-timing/m5stats.txt => tests/long/10.mcf/ref/x86/linux/simple-timing/stats.txt rename : tests/long/20.parser/ref/x86/linux/simple-atomic/stderr => tests/long/20.parser/ref/x86/linux/simple-atomic/simerr rename : tests/long/20.parser/ref/x86/linux/simple-atomic/stdout => tests/long/20.parser/ref/x86/linux/simple-atomic/simout rename : tests/long/20.parser/ref/x86/linux/simple-atomic/m5stats.txt => tests/long/20.parser/ref/x86/linux/simple-atomic/stats.txt rename : tests/long/20.parser/ref/x86/linux/simple-timing/stderr => tests/long/20.parser/ref/x86/linux/simple-timing/simerr rename : tests/long/20.parser/ref/x86/linux/simple-timing/stdout => tests/long/20.parser/ref/x86/linux/simple-timing/simout rename : tests/long/20.parser/ref/x86/linux/simple-timing/m5stats.txt => tests/long/20.parser/ref/x86/linux/simple-timing/stats.txt rename : tests/long/30.eon/ref/alpha/tru64/o3-timing/stderr => tests/long/30.eon/ref/alpha/tru64/o3-timing/simerr rename : tests/long/30.eon/ref/alpha/tru64/o3-timing/stdout => tests/long/30.eon/ref/alpha/tru64/o3-timing/simout rename : tests/long/30.eon/ref/alpha/tru64/o3-timing/m5stats.txt => tests/long/30.eon/ref/alpha/tru64/o3-timing/stats.txt rename : tests/long/30.eon/ref/alpha/tru64/simple-atomic/stderr => tests/long/30.eon/ref/alpha/tru64/simple-atomic/simerr rename : tests/long/30.eon/ref/alpha/tru64/simple-atomic/stdout => tests/long/30.eon/ref/alpha/tru64/simple-atomic/simout rename : tests/long/30.eon/ref/alpha/tru64/simple-atomic/m5stats.txt => tests/long/30.eon/ref/alpha/tru64/simple-atomic/stats.txt rename : tests/long/30.eon/ref/alpha/tru64/simple-timing/stderr => tests/long/30.eon/ref/alpha/tru64/simple-timing/simerr rename : tests/long/30.eon/ref/alpha/tru64/simple-timing/stdout => tests/long/30.eon/ref/alpha/tru64/simple-timing/simout rename : tests/long/30.eon/ref/alpha/tru64/simple-timing/m5stats.txt => tests/long/30.eon/ref/alpha/tru64/simple-timing/stats.txt rename : tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/stderr => tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/simerr rename : tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/stdout => tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/simout rename : tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/m5stats.txt => tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt rename : tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/stderr => tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/simerr rename : tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/stdout => tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/simout rename : tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/m5stats.txt => tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/stats.txt rename : tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/stderr => tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/simerr rename : tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/stdout => tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/simout rename : tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/m5stats.txt => tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/stats.txt rename : tests/long/50.vortex/ref/alpha/tru64/o3-timing/stderr => tests/long/50.vortex/ref/alpha/tru64/o3-timing/simerr rename : tests/long/50.vortex/ref/alpha/tru64/o3-timing/stdout => tests/long/50.vortex/ref/alpha/tru64/o3-timing/simout rename : tests/long/50.vortex/ref/alpha/tru64/o3-timing/m5stats.txt => tests/long/50.vortex/ref/alpha/tru64/o3-timing/stats.txt rename : tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stderr => tests/long/50.vortex/ref/alpha/tru64/simple-atomic/simerr rename : tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stdout => tests/long/50.vortex/ref/alpha/tru64/simple-atomic/simout rename : tests/long/50.vortex/ref/alpha/tru64/simple-atomic/m5stats.txt => tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stats.txt rename : tests/long/50.vortex/ref/alpha/tru64/simple-timing/stderr => tests/long/50.vortex/ref/alpha/tru64/simple-timing/simerr rename : tests/long/50.vortex/ref/alpha/tru64/simple-timing/stdout => tests/long/50.vortex/ref/alpha/tru64/simple-timing/simout rename : tests/long/50.vortex/ref/alpha/tru64/simple-timing/m5stats.txt => tests/long/50.vortex/ref/alpha/tru64/simple-timing/stats.txt rename : tests/long/50.vortex/ref/sparc/linux/simple-atomic/stderr => tests/long/50.vortex/ref/sparc/linux/simple-atomic/simerr rename : tests/long/50.vortex/ref/sparc/linux/simple-atomic/stdout => tests/long/50.vortex/ref/sparc/linux/simple-atomic/simout rename : tests/long/50.vortex/ref/sparc/linux/simple-atomic/m5stats.txt => tests/long/50.vortex/ref/sparc/linux/simple-atomic/stats.txt rename : tests/long/50.vortex/ref/sparc/linux/simple-timing/stderr => tests/long/50.vortex/ref/sparc/linux/simple-timing/simerr rename : tests/long/50.vortex/ref/sparc/linux/simple-timing/stdout => tests/long/50.vortex/ref/sparc/linux/simple-timing/simout rename : tests/long/50.vortex/ref/sparc/linux/simple-timing/m5stats.txt => tests/long/50.vortex/ref/sparc/linux/simple-timing/stats.txt rename : tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stderr => tests/long/60.bzip2/ref/alpha/tru64/o3-timing/simerr rename : tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stdout => tests/long/60.bzip2/ref/alpha/tru64/o3-timing/simout rename : tests/long/60.bzip2/ref/alpha/tru64/o3-timing/m5stats.txt => tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt rename : tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stderr => tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/simerr rename : tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stdout => tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/simout rename : tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/m5stats.txt => tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stats.txt rename : tests/long/60.bzip2/ref/alpha/tru64/simple-timing/stderr => tests/long/60.bzip2/ref/alpha/tru64/simple-timing/simerr rename : tests/long/60.bzip2/ref/alpha/tru64/simple-timing/stdout => tests/long/60.bzip2/ref/alpha/tru64/simple-timing/simout rename : tests/long/60.bzip2/ref/alpha/tru64/simple-timing/m5stats.txt => tests/long/60.bzip2/ref/alpha/tru64/simple-timing/stats.txt rename : tests/long/60.bzip2/ref/x86/linux/simple-atomic/stderr => tests/long/60.bzip2/ref/x86/linux/simple-atomic/simerr rename : tests/long/60.bzip2/ref/x86/linux/simple-atomic/stdout => tests/long/60.bzip2/ref/x86/linux/simple-atomic/simout rename : tests/long/60.bzip2/ref/x86/linux/simple-atomic/m5stats.txt => tests/long/60.bzip2/ref/x86/linux/simple-atomic/stats.txt rename : tests/long/60.bzip2/ref/x86/linux/simple-timing/stderr => tests/long/60.bzip2/ref/x86/linux/simple-timing/simerr rename : tests/long/60.bzip2/ref/x86/linux/simple-timing/stdout => tests/long/60.bzip2/ref/x86/linux/simple-timing/simout rename : tests/long/60.bzip2/ref/x86/linux/simple-timing/m5stats.txt => tests/long/60.bzip2/ref/x86/linux/simple-timing/stats.txt rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/stderr => tests/long/70.twolf/ref/alpha/tru64/o3-timing/simerr rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/stdout => tests/long/70.twolf/ref/alpha/tru64/o3-timing/simout rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/m5stats.txt => tests/long/70.twolf/ref/alpha/tru64/o3-timing/stats.txt rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/stderr => tests/long/70.twolf/ref/alpha/tru64/simple-atomic/simerr rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/stdout => tests/long/70.twolf/ref/alpha/tru64/simple-atomic/simout rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/m5stats.txt => tests/long/70.twolf/ref/alpha/tru64/simple-atomic/stats.txt rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/stderr => tests/long/70.twolf/ref/alpha/tru64/simple-timing/simerr rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/stdout => tests/long/70.twolf/ref/alpha/tru64/simple-timing/simout rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/m5stats.txt => tests/long/70.twolf/ref/alpha/tru64/simple-timing/stats.txt rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/stderr => tests/long/70.twolf/ref/sparc/linux/simple-atomic/simerr rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/stdout => tests/long/70.twolf/ref/sparc/linux/simple-atomic/simout rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/m5stats.txt => tests/long/70.twolf/ref/sparc/linux/simple-atomic/stats.txt rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/stderr => tests/long/70.twolf/ref/sparc/linux/simple-timing/simerr rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/stdout => tests/long/70.twolf/ref/sparc/linux/simple-timing/simout rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/m5stats.txt => tests/long/70.twolf/ref/sparc/linux/simple-timing/stats.txt rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/stderr => tests/long/70.twolf/ref/x86/linux/simple-atomic/simerr rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/stdout => tests/long/70.twolf/ref/x86/linux/simple-atomic/simout rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/m5stats.txt => tests/long/70.twolf/ref/x86/linux/simple-atomic/stats.txt rename : tests/long/70.twolf/ref/x86/linux/simple-timing/stderr => tests/long/70.twolf/ref/x86/linux/simple-timing/simerr rename : tests/long/70.twolf/ref/x86/linux/simple-timing/stdout => tests/long/70.twolf/ref/x86/linux/simple-timing/simout rename : tests/long/70.twolf/ref/x86/linux/simple-timing/m5stats.txt => tests/long/70.twolf/ref/x86/linux/simple-timing/stats.txt rename : tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stderr => tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simerr rename : tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stdout => tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout rename : tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/m5stats.txt => tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt rename : tests/quick/00.hello/ref/alpha/linux/o3-timing/stderr => tests/quick/00.hello/ref/alpha/linux/o3-timing/simerr rename : tests/quick/00.hello/ref/alpha/linux/o3-timing/stdout => tests/quick/00.hello/ref/alpha/linux/o3-timing/simout rename : tests/quick/00.hello/ref/alpha/linux/o3-timing/m5stats.txt => tests/quick/00.hello/ref/alpha/linux/o3-timing/stats.txt rename : tests/quick/00.hello/ref/alpha/linux/simple-atomic/stderr => tests/quick/00.hello/ref/alpha/linux/simple-atomic/simerr rename : tests/quick/00.hello/ref/alpha/linux/simple-atomic/stdout => tests/quick/00.hello/ref/alpha/linux/simple-atomic/simout rename : tests/quick/00.hello/ref/alpha/linux/simple-atomic/m5stats.txt => tests/quick/00.hello/ref/alpha/linux/simple-atomic/stats.txt rename : tests/quick/00.hello/ref/alpha/linux/simple-timing/stderr => tests/quick/00.hello/ref/alpha/linux/simple-timing/simerr rename : tests/quick/00.hello/ref/alpha/linux/simple-timing/stdout => tests/quick/00.hello/ref/alpha/linux/simple-timing/simout rename : tests/quick/00.hello/ref/alpha/linux/simple-timing/m5stats.txt => tests/quick/00.hello/ref/alpha/linux/simple-timing/stats.txt rename : tests/quick/00.hello/ref/alpha/tru64/o3-timing/stderr => tests/quick/00.hello/ref/alpha/tru64/o3-timing/simerr rename : tests/quick/00.hello/ref/alpha/tru64/o3-timing/stdout => tests/quick/00.hello/ref/alpha/tru64/o3-timing/simout rename : tests/quick/00.hello/ref/alpha/tru64/o3-timing/m5stats.txt => tests/quick/00.hello/ref/alpha/tru64/o3-timing/stats.txt rename : tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stderr => tests/quick/00.hello/ref/alpha/tru64/simple-atomic/simerr rename : tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stdout => tests/quick/00.hello/ref/alpha/tru64/simple-atomic/simout rename : tests/quick/00.hello/ref/alpha/tru64/simple-atomic/m5stats.txt => tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stats.txt rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing/stderr => tests/quick/00.hello/ref/alpha/tru64/simple-timing/simerr rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing/stdout => tests/quick/00.hello/ref/alpha/tru64/simple-timing/simout rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing/m5stats.txt => tests/quick/00.hello/ref/alpha/tru64/simple-timing/stats.txt rename : tests/quick/00.hello/ref/mips/linux/simple-atomic/stderr => tests/quick/00.hello/ref/mips/linux/simple-atomic/simerr rename : tests/quick/00.hello/ref/mips/linux/simple-atomic/stdout => tests/quick/00.hello/ref/mips/linux/simple-atomic/simout rename : tests/quick/00.hello/ref/mips/linux/simple-atomic/m5stats.txt => tests/quick/00.hello/ref/mips/linux/simple-atomic/stats.txt rename : tests/quick/00.hello/ref/mips/linux/simple-timing/stderr => tests/quick/00.hello/ref/mips/linux/simple-timing/simerr rename : tests/quick/00.hello/ref/mips/linux/simple-timing/stdout => tests/quick/00.hello/ref/mips/linux/simple-timing/simout rename : tests/quick/00.hello/ref/mips/linux/simple-timing/m5stats.txt => tests/quick/00.hello/ref/mips/linux/simple-timing/stats.txt rename : tests/quick/00.hello/ref/sparc/linux/simple-atomic/stderr => tests/quick/00.hello/ref/sparc/linux/simple-atomic/simerr rename : tests/quick/00.hello/ref/sparc/linux/simple-atomic/stdout => tests/quick/00.hello/ref/sparc/linux/simple-atomic/simout rename : tests/quick/00.hello/ref/sparc/linux/simple-atomic/m5stats.txt => tests/quick/00.hello/ref/sparc/linux/simple-atomic/stats.txt rename : tests/quick/00.hello/ref/sparc/linux/simple-timing/stderr => tests/quick/00.hello/ref/sparc/linux/simple-timing/simerr rename : tests/quick/00.hello/ref/sparc/linux/simple-timing/stdout => tests/quick/00.hello/ref/sparc/linux/simple-timing/simout rename : tests/quick/00.hello/ref/sparc/linux/simple-timing/m5stats.txt => tests/quick/00.hello/ref/sparc/linux/simple-timing/stats.txt rename : tests/quick/00.hello/ref/x86/linux/simple-atomic/stderr => tests/quick/00.hello/ref/x86/linux/simple-atomic/simerr rename : tests/quick/00.hello/ref/x86/linux/simple-atomic/stdout => tests/quick/00.hello/ref/x86/linux/simple-atomic/simout rename : tests/quick/00.hello/ref/x86/linux/simple-atomic/m5stats.txt => tests/quick/00.hello/ref/x86/linux/simple-atomic/stats.txt rename : tests/quick/00.hello/ref/x86/linux/simple-timing/stderr => tests/quick/00.hello/ref/x86/linux/simple-timing/simerr rename : tests/quick/00.hello/ref/x86/linux/simple-timing/stdout => tests/quick/00.hello/ref/x86/linux/simple-timing/simout rename : tests/quick/00.hello/ref/x86/linux/simple-timing/m5stats.txt => tests/quick/00.hello/ref/x86/linux/simple-timing/stats.txt rename : tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stderr => tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/simerr rename : tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stdout => tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/simout rename : tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/m5stats.txt => tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stats.txt rename : tests/quick/02.insttest/ref/sparc/linux/o3-timing/stderr => tests/quick/02.insttest/ref/sparc/linux/o3-timing/simerr rename : tests/quick/02.insttest/ref/sparc/linux/o3-timing/stdout => tests/quick/02.insttest/ref/sparc/linux/o3-timing/simout rename : tests/quick/02.insttest/ref/sparc/linux/o3-timing/m5stats.txt => tests/quick/02.insttest/ref/sparc/linux/o3-timing/stats.txt rename : tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stderr => tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simerr rename : tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stdout => tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simout rename : tests/quick/02.insttest/ref/sparc/linux/simple-atomic/m5stats.txt => tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stats.txt rename : tests/quick/02.insttest/ref/sparc/linux/simple-timing/stderr => tests/quick/02.insttest/ref/sparc/linux/simple-timing/simerr rename : tests/quick/02.insttest/ref/sparc/linux/simple-timing/stdout => tests/quick/02.insttest/ref/sparc/linux/simple-timing/simout rename : tests/quick/02.insttest/ref/sparc/linux/simple-timing/m5stats.txt => tests/quick/02.insttest/ref/sparc/linux/simple-timing/stats.txt rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stderr => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/simerr rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stdout => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/simout rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stats.txt rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stderr => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simerr rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stdout => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simout rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/m5stats.txt => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stderr => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/simerr rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/simout rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stats.txt rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stderr => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simerr rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stdout => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simout rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stats.txt rename : tests/quick/20.eio-short/ref/alpha/eio/detailed/stderr => tests/quick/20.eio-short/ref/alpha/eio/detailed/simerr rename : tests/quick/20.eio-short/ref/alpha/eio/detailed/stdout => tests/quick/20.eio-short/ref/alpha/eio/detailed/simout rename : tests/quick/20.eio-short/ref/alpha/eio/detailed/m5stats.txt => tests/quick/20.eio-short/ref/alpha/eio/detailed/stats.txt rename : tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stderr => tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/simerr rename : tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stdout => tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/simout rename : tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/m5stats.txt => tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stats.txt rename : tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stderr => tests/quick/20.eio-short/ref/alpha/eio/simple-timing/simerr rename : tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stdout => tests/quick/20.eio-short/ref/alpha/eio/simple-timing/simout rename : tests/quick/20.eio-short/ref/alpha/eio/simple-timing/m5stats.txt => tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stats.txt rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stderr => tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simerr rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stdout => tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simout rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/m5stats.txt => tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stats.txt rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/stderr => tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simerr rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/stdout => tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simout rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/m5stats.txt => tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/stats.txt rename : tests/quick/50.memtest/ref/alpha/linux/memtest/stderr => tests/quick/50.memtest/ref/alpha/linux/memtest/simerr rename : tests/quick/50.memtest/ref/alpha/linux/memtest/stdout => tests/quick/50.memtest/ref/alpha/linux/memtest/simout rename : tests/quick/50.memtest/ref/alpha/linux/memtest/m5stats.txt => tests/quick/50.memtest/ref/alpha/linux/memtest/stats.txt rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stderr => tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/simerr rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stdout => tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/simout rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/m5stats.txt => tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt
author: Nathan Binkert <nate@binkert.org> 2008-12-08 07:16:40 -0800
committer: Nathan Binkert <nate@binkert.org> 2008-12-08 07:16:40 -0800
commit: 19273164da50011d59b7f362026f8e80260807d4 (patch)
tree: bf5053cec37827ff14037776b019990ffaed32cc /tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt
parent: 9192b7f1effaa9aabdd61840903e4f0c12079758 (diff)
download: gem5-19273164da50011d59b7f362026f8e80260807d4.tar.xz
1 files changed, 474 insertions, 0 deletions
diff --git a/tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt b/tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt
new file mode 100644
index 000000000..3a06809c5
--- /dev/null
+++ b/tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt
@@ -0,0 +1,474 @@
+
+---------- Begin Simulation Statistics ----------
+drivesys.cpu.dtb.accesses                      401302                       # DTB accesses
+drivesys.cpu.dtb.acv                               40                       # DTB access violations
+drivesys.cpu.dtb.hits                          624235                       # DTB hits
+drivesys.cpu.dtb.misses                           569                       # DTB misses
+drivesys.cpu.dtb.read_accesses                 268057                       # DTB read accesses
+drivesys.cpu.dtb.read_acv                          30                       # DTB read access violations
+drivesys.cpu.dtb.read_hits                     393500                       # DTB read hits
+drivesys.cpu.dtb.read_misses                      487                       # DTB read misses
+drivesys.cpu.dtb.write_accesses                133245                       # DTB write accesses
+drivesys.cpu.dtb.write_acv                         10                       # DTB write access violations
+drivesys.cpu.dtb.write_hits                    230735                       # DTB write hits
+drivesys.cpu.dtb.write_misses                      82                       # DTB write misses
+drivesys.cpu.idle_fraction                   1.000000                       # Percentage of idle cycles
+drivesys.cpu.itb.accesses                     1337980                       # ITB accesses
+drivesys.cpu.itb.acv                               22                       # ITB acv
+drivesys.cpu.itb.hits                         1337786                       # ITB hits
+drivesys.cpu.itb.misses                           194                       # ITB misses
+drivesys.cpu.kern.callpal                        4443                       # number of callpals executed
+drivesys.cpu.kern.callpal_swpctx                   70      1.58%      1.58% # number of callpals executed
+drivesys.cpu.kern.callpal_tbi                       5      0.11%      1.69% # number of callpals executed
+drivesys.cpu.kern.callpal_swpipl                 3654     82.24%     83.93% # number of callpals executed
+drivesys.cpu.kern.callpal_rdps                    359      8.08%     92.01% # number of callpals executed
+drivesys.cpu.kern.callpal_rdusp                     1      0.02%     92.03% # number of callpals executed
+drivesys.cpu.kern.callpal_rti                     322      7.25%     99.28% # number of callpals executed
+drivesys.cpu.kern.callpal_callsys                  25      0.56%     99.84% # number of callpals executed
+drivesys.cpu.kern.callpal_imb                       7      0.16%    100.00% # number of callpals executed
+drivesys.cpu.kern.inst.arm                          0                       # number of arm instructions executed
+drivesys.cpu.kern.inst.hwrei                     5483                       # number of hwrei instructions executed
+drivesys.cpu.kern.inst.quiesce                    215                       # number of quiesce instructions executed
+drivesys.cpu.kern.ipl_count                      4191                       # number of times we switched to this ipl
+drivesys.cpu.kern.ipl_count_0                    1189     28.37%     28.37% # number of times we switched to this ipl
+drivesys.cpu.kern.ipl_count_21                     10      0.24%     28.61% # number of times we switched to this ipl
+drivesys.cpu.kern.ipl_count_22                    205      4.89%     33.50% # number of times we switched to this ipl
+drivesys.cpu.kern.ipl_count_31                   2787     66.50%    100.00% # number of times we switched to this ipl
+drivesys.cpu.kern.ipl_good                       2593                       # number of times we switched to this ipl from a different ipl
+drivesys.cpu.kern.ipl_good_0                     1189     45.85%     45.85% # number of times we switched to this ipl from a different ipl
+drivesys.cpu.kern.ipl_good_21                      10      0.39%     46.24% # number of times we switched to this ipl from a different ipl
+drivesys.cpu.kern.ipl_good_22                     205      7.91%     54.15% # number of times we switched to this ipl from a different ipl
+drivesys.cpu.kern.ipl_good_31                    1189     45.85%    100.00% # number of times we switched to this ipl from a different ipl
+drivesys.cpu.kern.ipl_ticks              199571362884                       # number of cycles we spent at this ipl
+drivesys.cpu.kern.ipl_ticks_0            199571043172    100.00%    100.00% # number of cycles we spent at this ipl
+drivesys.cpu.kern.ipl_ticks_21                   1620      0.00%    100.00% # number of cycles we spent at this ipl
+drivesys.cpu.kern.ipl_ticks_22                  17630      0.00%    100.00% # number of cycles we spent at this ipl
+drivesys.cpu.kern.ipl_ticks_31                 300462      0.00%    100.00% # number of cycles we spent at this ipl
+drivesys.cpu.kern.ipl_used_0                        1                       # fraction of swpipl calls that actually changed the ipl
+drivesys.cpu.kern.ipl_used_21                       1                       # fraction of swpipl calls that actually changed the ipl
+drivesys.cpu.kern.ipl_used_22                       1                       # fraction of swpipl calls that actually changed the ipl
+drivesys.cpu.kern.ipl_used_31                0.426624                       # fraction of swpipl calls that actually changed the ipl
+drivesys.cpu.kern.mode_good_kernel                110                      
+drivesys.cpu.kern.mode_good_user                  107                      
+drivesys.cpu.kern.mode_good_idle                    3                      
+drivesys.cpu.kern.mode_switch_kernel              174                       # number of protection mode switches
+drivesys.cpu.kern.mode_switch_user                107                       # number of protection mode switches
+drivesys.cpu.kern.mode_switch_idle                218                       # number of protection mode switches
+drivesys.cpu.kern.mode_switch_good           1.645945                       # fraction of useful protection mode switches
+drivesys.cpu.kern.mode_switch_good_kernel     0.632184                       # fraction of useful protection mode switches
+drivesys.cpu.kern.mode_switch_good_user             1                       # fraction of useful protection mode switches
+drivesys.cpu.kern.mode_switch_good_idle      0.013761                       # fraction of useful protection mode switches
+drivesys.cpu.kern.mode_ticks_kernel            263256      0.24%      0.24% # number of ticks spent at the given mode
+drivesys.cpu.kern.mode_ticks_user             1278343      1.15%      1.39% # number of ticks spent at the given mode
+drivesys.cpu.kern.mode_ticks_idle           109686421     98.61%    100.00% # number of ticks spent at the given mode
+drivesys.cpu.kern.swap_context                     70                       # number of times the context was actually changed
+drivesys.cpu.kern.syscall                          22                       # number of syscalls executed
+drivesys.cpu.kern.syscall_2                         1      4.55%      4.55% # number of syscalls executed
+drivesys.cpu.kern.syscall_6                         3     13.64%     18.18% # number of syscalls executed
+drivesys.cpu.kern.syscall_17                        2      9.09%     27.27% # number of syscalls executed
+drivesys.cpu.kern.syscall_97                        1      4.55%     31.82% # number of syscalls executed
+drivesys.cpu.kern.syscall_99                        2      9.09%     40.91% # number of syscalls executed
+drivesys.cpu.kern.syscall_101                       2      9.09%     50.00% # number of syscalls executed
+drivesys.cpu.kern.syscall_102                       3     13.64%     63.64% # number of syscalls executed
+drivesys.cpu.kern.syscall_104                       1      4.55%     68.18% # number of syscalls executed
+drivesys.cpu.kern.syscall_105                       3     13.64%     81.82% # number of syscalls executed
+drivesys.cpu.kern.syscall_106                       1      4.55%     86.36% # number of syscalls executed
+drivesys.cpu.kern.syscall_118                       2      9.09%     95.45% # number of syscalls executed
+drivesys.cpu.kern.syscall_150                       1      4.55%    100.00% # number of syscalls executed
+drivesys.cpu.not_idle_fraction               0.000000                       # Percentage of non-idle cycles
+drivesys.cpu.numCycles                   199571362884                       # number of cpu cycles simulated
+drivesys.cpu.num_insts                        1958129                       # Number of instructions executed
+drivesys.cpu.num_refs                          626223                       # Number of memory references
+drivesys.disk0.dma_read_bytes                       0                       # Number of bytes transfered via DMA reads (not PRD).
+drivesys.disk0.dma_read_full_pages                  0                       # Number of full page size DMA reads (not PRD).
+drivesys.disk0.dma_read_txs                         0                       # Number of DMA read transactions (not PRD).
+drivesys.disk0.dma_write_bytes                      0                       # Number of bytes transfered via DMA writes.
+drivesys.disk0.dma_write_full_pages                 0                       # Number of full page size DMA writes.
+drivesys.disk0.dma_write_txs                        0                       # Number of DMA write transactions.
+drivesys.disk2.dma_read_bytes                       0                       # Number of bytes transfered via DMA reads (not PRD).
+drivesys.disk2.dma_read_full_pages                  0                       # Number of full page size DMA reads (not PRD).
+drivesys.disk2.dma_read_txs                         0                       # Number of DMA read transactions (not PRD).
+drivesys.disk2.dma_write_bytes                      0                       # Number of bytes transfered via DMA writes.
+drivesys.disk2.dma_write_full_pages                 0                       # Number of full page size DMA writes.
+drivesys.disk2.dma_write_txs                        0                       # Number of DMA write transactions.
+drivesys.tsunami.ethernet.coalescedRxDesc            0                       # average number of RxDesc's coalesced into each post
+drivesys.tsunami.ethernet.coalescedRxIdle            0                       # average number of RxIdle's coalesced into each post
+drivesys.tsunami.ethernet.coalescedRxOk             0                       # average number of RxOk's coalesced into each post
+drivesys.tsunami.ethernet.coalescedRxOrn            0                       # average number of RxOrn's coalesced into each post
+drivesys.tsunami.ethernet.coalescedSwi              0                       # average number of Swi's coalesced into each post
+drivesys.tsunami.ethernet.coalescedTotal            1                       # average number of interrupts coalesced into each post
+drivesys.tsunami.ethernet.coalescedTxDesc            0                       # average number of TxDesc's coalesced into each post
+drivesys.tsunami.ethernet.coalescedTxIdle            0                       # average number of TxIdle's coalesced into each post
+drivesys.tsunami.ethernet.coalescedTxOk             0                       # average number of TxOk's coalesced into each post
+drivesys.tsunami.ethernet.descDMAReads              4                       # Number of descriptors the device read w/ DMA
+drivesys.tsunami.ethernet.descDMAWrites            13                       # Number of descriptors the device wrote w/ DMA
+drivesys.tsunami.ethernet.descDmaReadBytes           96                       # number of descriptor bytes read w/ DMA
+drivesys.tsunami.ethernet.descDmaWriteBytes          104                       # number of descriptor bytes write w/ DMA
+drivesys.tsunami.ethernet.droppedPackets            0                       # number of packets dropped
+drivesys.tsunami.ethernet.postedInterrupts           16                       # number of posts to CPU
+drivesys.tsunami.ethernet.postedRxDesc              6                       # number of RxDesc interrupts posted to CPU
+drivesys.tsunami.ethernet.postedRxIdle              0                       # number of rxIdle interrupts posted to CPU
+drivesys.tsunami.ethernet.postedRxOk                0                       # number of RxOk interrupts posted to CPU
+drivesys.tsunami.ethernet.postedRxOrn               0                       # number of RxOrn posted to CPU
+drivesys.tsunami.ethernet.postedSwi                 0                       # number of software interrupts posted to CPU
+drivesys.tsunami.ethernet.postedTxDesc              0                       # number of TxDesc interrupts posted to CPU
+drivesys.tsunami.ethernet.postedTxIdle              4                       # number of TxIdle interrupts posted to CPU
+drivesys.tsunami.ethernet.postedTxOk                0                       # number of TxOk interrupts posted to CPU
+drivesys.tsunami.ethernet.rxBandwidth           38400                       # Receive Bandwidth (bits/s)
+drivesys.tsunami.ethernet.rxBytes                 960                       # Bytes Received
+drivesys.tsunami.ethernet.rxIpChecksums             8                       # Number of rx IP Checksums done by device
+drivesys.tsunami.ethernet.rxPPS                    40                       # Packet Reception Rate (packets/s)
+drivesys.tsunami.ethernet.rxPackets                 8                       # Number of Packets Received
+drivesys.tsunami.ethernet.rxTcpChecksums            8                       # Number of rx TCP Checksums done by device
+drivesys.tsunami.ethernet.rxUdpChecksums            0                       # Number of rx UDP Checksums done by device
+drivesys.tsunami.ethernet.totBandwidth          70320                       # Total Bandwidth (bits/s)
+drivesys.tsunami.ethernet.totBytes               1758                       # Total Bytes
+drivesys.tsunami.ethernet.totPackets               13                       # Total Packets
+drivesys.tsunami.ethernet.totalRxDesc               8                       # total number of RxDesc written to ISR
+drivesys.tsunami.ethernet.totalRxIdle               0                       # total number of RxIdle written to ISR
+drivesys.tsunami.ethernet.totalRxOk                 0                       # total number of RxOk written to ISR
+drivesys.tsunami.ethernet.totalRxOrn                0                       # total number of RxOrn written to ISR
+drivesys.tsunami.ethernet.totalSwi                  0                       # total number of Swi written to ISR
+drivesys.tsunami.ethernet.totalTxDesc               0                       # total number of TxDesc written to ISR
+drivesys.tsunami.ethernet.totalTxIdle               4                       # total number of TxIdle written to ISR
+drivesys.tsunami.ethernet.totalTxOk                 0                       # total number of TxOk written to ISR
+drivesys.tsunami.ethernet.txBandwidth           31920                       # Transmit Bandwidth (bits/s)
+drivesys.tsunami.ethernet.txBytes                 798                       # Bytes Transmitted
+drivesys.tsunami.ethernet.txIpChecksums             2                       # Number of tx IP Checksums done by device
+drivesys.tsunami.ethernet.txPPS                    25                       # Packet Tranmission Rate (packets/s)
+drivesys.tsunami.ethernet.txPackets                 5                       # Number of Packets Transmitted
+drivesys.tsunami.ethernet.txTcpChecksums            2                       # Number of tx TCP Checksums done by device
+drivesys.tsunami.ethernet.txUdpChecksums            0                       # Number of tx UDP Checksums done by device
+host_inst_rate                              200792296                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 476644                       # Number of bytes of host memory used
+host_seconds                                     1.36                       # Real time elapsed on the host
+host_tick_rate                           146922204609                       # Simulator tick rate (ticks/s)
+sim_freq                                 1000000000000                       # Frequency of simulated ticks
+sim_insts                                   273294177                       # Number of instructions simulated
+sim_seconds                                  0.200001                       # Number of seconds simulated
+sim_ticks                                200000789468                       # Number of ticks simulated
+testsys.cpu.dtb.accesses                       335402                       # DTB accesses
+testsys.cpu.dtb.acv                               161                       # DTB access violations
+testsys.cpu.dtb.hits                          1163288                       # DTB hits
+testsys.cpu.dtb.misses                           3815                       # DTB misses
+testsys.cpu.dtb.read_accesses                  225414                       # DTB read accesses
+testsys.cpu.dtb.read_acv                           80                       # DTB read access violations
+testsys.cpu.dtb.read_hits                      658435                       # DTB read hits
+testsys.cpu.dtb.read_misses                      3287                       # DTB read misses
+testsys.cpu.dtb.write_accesses                 109988                       # DTB write accesses
+testsys.cpu.dtb.write_acv                          81                       # DTB write access violations
+testsys.cpu.dtb.write_hits                     504853                       # DTB write hits
+testsys.cpu.dtb.write_misses                      528                       # DTB write misses
+testsys.cpu.idle_fraction                    0.999999                       # Percentage of idle cycles
+testsys.cpu.itb.accesses                      1249822                       # ITB accesses
+testsys.cpu.itb.acv                                69                       # ITB acv
+testsys.cpu.itb.hits                          1248325                       # ITB hits
+testsys.cpu.itb.misses                           1497                       # ITB misses
+testsys.cpu.kern.callpal                        13122                       # number of callpals executed
+testsys.cpu.kern.callpal_swpctx                   438      3.34%      3.34% # number of callpals executed
+testsys.cpu.kern.callpal_tbi                       20      0.15%      3.49% # number of callpals executed
+testsys.cpu.kern.callpal_swpipl                 11074     84.39%     87.88% # number of callpals executed
+testsys.cpu.kern.callpal_rdps                     359      2.74%     90.62% # number of callpals executed
+testsys.cpu.kern.callpal_wrusp                      3      0.02%     90.64% # number of callpals executed
+testsys.cpu.kern.callpal_rdusp                      3      0.02%     90.66% # number of callpals executed
+testsys.cpu.kern.callpal_rti                     1041      7.93%     98.60% # number of callpals executed
+testsys.cpu.kern.callpal_callsys                  140      1.07%     99.66% # number of callpals executed
+testsys.cpu.kern.callpal_imb                       44      0.34%    100.00% # number of callpals executed
+testsys.cpu.kern.inst.arm                           0                       # number of arm instructions executed
+testsys.cpu.kern.inst.hwrei                     19053                       # number of hwrei instructions executed
+testsys.cpu.kern.inst.quiesce                     376                       # number of quiesce instructions executed
+testsys.cpu.kern.ipl_count                      12504                       # number of times we switched to this ipl
+testsys.cpu.kern.ipl_count_0                     5061     40.48%     40.48% # number of times we switched to this ipl
+testsys.cpu.kern.ipl_count_21                     184      1.47%     41.95% # number of times we switched to this ipl
+testsys.cpu.kern.ipl_count_22                     205      1.64%     43.59% # number of times we switched to this ipl
+testsys.cpu.kern.ipl_count_31                    7054     56.41%    100.00% # number of times we switched to this ipl
+testsys.cpu.kern.ipl_good                       10499                       # number of times we switched to this ipl from a different ipl
+testsys.cpu.kern.ipl_good_0                      5055     48.15%     48.15% # number of times we switched to this ipl from a different ipl
+testsys.cpu.kern.ipl_good_21                      184      1.75%     49.90% # number of times we switched to this ipl from a different ipl
+testsys.cpu.kern.ipl_good_22                      205      1.95%     51.85% # number of times we switched to this ipl from a different ipl
+testsys.cpu.kern.ipl_good_31                     5055     48.15%    100.00% # number of times we switched to this ipl from a different ipl
+testsys.cpu.kern.ipl_ticks               199569460830                       # number of cycles we spent at this ipl
+testsys.cpu.kern.ipl_ticks_0             199568845670    100.00%    100.00% # number of cycles we spent at this ipl
+testsys.cpu.kern.ipl_ticks_21                   31026      0.00%    100.00% # number of cycles we spent at this ipl
+testsys.cpu.kern.ipl_ticks_22                   17630      0.00%    100.00% # number of cycles we spent at this ipl
+testsys.cpu.kern.ipl_ticks_31                  566504      0.00%    100.00% # number of cycles we spent at this ipl
+testsys.cpu.kern.ipl_used_0                  0.998814                       # fraction of swpipl calls that actually changed the ipl
+testsys.cpu.kern.ipl_used_21                        1                       # fraction of swpipl calls that actually changed the ipl
+testsys.cpu.kern.ipl_used_22                        1                       # fraction of swpipl calls that actually changed the ipl
+testsys.cpu.kern.ipl_used_31                 0.716615                       # fraction of swpipl calls that actually changed the ipl
+testsys.cpu.kern.mode_good_kernel                 654                      
+testsys.cpu.kern.mode_good_user                   649                      
+testsys.cpu.kern.mode_good_idle                     5                      
+testsys.cpu.kern.mode_switch_kernel              1099                       # number of protection mode switches
+testsys.cpu.kern.mode_switch_user                 649                       # number of protection mode switches
+testsys.cpu.kern.mode_switch_idle                 381                       # number of protection mode switches
+testsys.cpu.kern.mode_switch_good            1.608210                       # fraction of useful protection mode switches
+testsys.cpu.kern.mode_switch_good_kernel     0.595086                       # fraction of useful protection mode switches
+testsys.cpu.kern.mode_switch_good_user              1                       # fraction of useful protection mode switches
+testsys.cpu.kern.mode_switch_good_idle       0.013123                       # fraction of useful protection mode switches
+testsys.cpu.kern.mode_ticks_kernel            1821131      2.10%      2.10% # number of ticks spent at the given mode
+testsys.cpu.kern.mode_ticks_user              1065606      1.23%      3.32% # number of ticks spent at the given mode
+testsys.cpu.kern.mode_ticks_idle             83963628     96.68%    100.00% # number of ticks spent at the given mode
+testsys.cpu.kern.swap_context                     438                       # number of times the context was actually changed
+testsys.cpu.kern.syscall                           83                       # number of syscalls executed
+testsys.cpu.kern.syscall_2                          3      3.61%      3.61% # number of syscalls executed
+testsys.cpu.kern.syscall_3                          7      8.43%     12.05% # number of syscalls executed
+testsys.cpu.kern.syscall_4                          1      1.20%     13.25% # number of syscalls executed
+testsys.cpu.kern.syscall_6                          7      8.43%     21.69% # number of syscalls executed
+testsys.cpu.kern.syscall_17                         7      8.43%     30.12% # number of syscalls executed
+testsys.cpu.kern.syscall_19                         2      2.41%     32.53% # number of syscalls executed
+testsys.cpu.kern.syscall_20                         1      1.20%     33.73% # number of syscalls executed
+testsys.cpu.kern.syscall_33                         3      3.61%     37.35% # number of syscalls executed
+testsys.cpu.kern.syscall_45                        10     12.05%     49.40% # number of syscalls executed
+testsys.cpu.kern.syscall_48                         5      6.02%     55.42% # number of syscalls executed
+testsys.cpu.kern.syscall_54                         1      1.20%     56.63% # number of syscalls executed
+testsys.cpu.kern.syscall_59                         3      3.61%     60.24% # number of syscalls executed
+testsys.cpu.kern.syscall_71                        15     18.07%     78.31% # number of syscalls executed
+testsys.cpu.kern.syscall_74                         4      4.82%     83.13% # number of syscalls executed
+testsys.cpu.kern.syscall_97                         2      2.41%     85.54% # number of syscalls executed
+testsys.cpu.kern.syscall_98                         2      2.41%     87.95% # number of syscalls executed
+testsys.cpu.kern.syscall_101                        2      2.41%     90.36% # number of syscalls executed
+testsys.cpu.kern.syscall_102                        2      2.41%     92.77% # number of syscalls executed
+testsys.cpu.kern.syscall_104                        1      1.20%     93.98% # number of syscalls executed
+testsys.cpu.kern.syscall_105                        3      3.61%     97.59% # number of syscalls executed
+testsys.cpu.kern.syscall_118                        2      2.41%    100.00% # number of syscalls executed
+testsys.cpu.not_idle_fraction                0.000001                       # Percentage of non-idle cycles
+testsys.cpu.numCycles                    199569460393                       # number of cpu cycles simulated
+testsys.cpu.num_insts                         3560411                       # Number of instructions executed
+testsys.cpu.num_refs                          1173571                       # Number of memory references
+testsys.disk0.dma_read_bytes                        0                       # Number of bytes transfered via DMA reads (not PRD).
+testsys.disk0.dma_read_full_pages                   0                       # Number of full page size DMA reads (not PRD).
+testsys.disk0.dma_read_txs                          0                       # Number of DMA read transactions (not PRD).
+testsys.disk0.dma_write_bytes                       0                       # Number of bytes transfered via DMA writes.
+testsys.disk0.dma_write_full_pages                  0                       # Number of full page size DMA writes.
+testsys.disk0.dma_write_txs                         0                       # Number of DMA write transactions.
+testsys.disk2.dma_read_bytes                        0                       # Number of bytes transfered via DMA reads (not PRD).
+testsys.disk2.dma_read_full_pages                   0                       # Number of full page size DMA reads (not PRD).
+testsys.disk2.dma_read_txs                          0                       # Number of DMA read transactions (not PRD).
+testsys.disk2.dma_write_bytes                       0                       # Number of bytes transfered via DMA writes.
+testsys.disk2.dma_write_full_pages                  0                       # Number of full page size DMA writes.
+testsys.disk2.dma_write_txs                         0                       # Number of DMA write transactions.
+testsys.tsunami.ethernet.coalescedRxDesc            0                       # average number of RxDesc's coalesced into each post
+testsys.tsunami.ethernet.coalescedRxIdle            0                       # average number of RxIdle's coalesced into each post
+testsys.tsunami.ethernet.coalescedRxOk              0                       # average number of RxOk's coalesced into each post
+testsys.tsunami.ethernet.coalescedRxOrn             0                       # average number of RxOrn's coalesced into each post
+testsys.tsunami.ethernet.coalescedSwi               0                       # average number of Swi's coalesced into each post
+testsys.tsunami.ethernet.coalescedTotal             1                       # average number of interrupts coalesced into each post
+testsys.tsunami.ethernet.coalescedTxDesc            0                       # average number of TxDesc's coalesced into each post
+testsys.tsunami.ethernet.coalescedTxIdle            0                       # average number of TxIdle's coalesced into each post
+testsys.tsunami.ethernet.coalescedTxOk              0                       # average number of TxOk's coalesced into each post
+testsys.tsunami.ethernet.descDMAReads               6                       # Number of descriptors the device read w/ DMA
+testsys.tsunami.ethernet.descDMAWrites             13                       # Number of descriptors the device wrote w/ DMA
+testsys.tsunami.ethernet.descDmaReadBytes          144                       # number of descriptor bytes read w/ DMA
+testsys.tsunami.ethernet.descDmaWriteBytes          104                       # number of descriptor bytes write w/ DMA
+testsys.tsunami.ethernet.droppedPackets             0                       # number of packets dropped
+testsys.tsunami.ethernet.postedInterrupts           15                       # number of posts to CPU
+testsys.tsunami.ethernet.postedRxDesc               4                       # number of RxDesc interrupts posted to CPU
+testsys.tsunami.ethernet.postedRxIdle               0                       # number of rxIdle interrupts posted to CPU
+testsys.tsunami.ethernet.postedRxOk                 0                       # number of RxOk interrupts posted to CPU
+testsys.tsunami.ethernet.postedRxOrn                0                       # number of RxOrn posted to CPU
+testsys.tsunami.ethernet.postedSwi                  0                       # number of software interrupts posted to CPU
+testsys.tsunami.ethernet.postedTxDesc               0                       # number of TxDesc interrupts posted to CPU
+testsys.tsunami.ethernet.postedTxIdle               6                       # number of TxIdle interrupts posted to CPU
+testsys.tsunami.ethernet.postedTxOk                 0                       # number of TxOk interrupts posted to CPU
+testsys.tsunami.ethernet.rxBandwidth            31920                       # Receive Bandwidth (bits/s)
+testsys.tsunami.ethernet.rxBytes                  798                       # Bytes Received
+testsys.tsunami.ethernet.rxIpChecksums              5                       # Number of rx IP Checksums done by device
+testsys.tsunami.ethernet.rxPPS                     25                       # Packet Reception Rate (packets/s)
+testsys.tsunami.ethernet.rxPackets                  5                       # Number of Packets Received
+testsys.tsunami.ethernet.rxTcpChecksums             5                       # Number of rx TCP Checksums done by device
+testsys.tsunami.ethernet.rxUdpChecksums             0                       # Number of rx UDP Checksums done by device
+testsys.tsunami.ethernet.totBandwidth           70320                       # Total Bandwidth (bits/s)
+testsys.tsunami.ethernet.totBytes                1758                       # Total Bytes
+testsys.tsunami.ethernet.totPackets                13                       # Total Packets
+testsys.tsunami.ethernet.totalRxDesc                5                       # total number of RxDesc written to ISR
+testsys.tsunami.ethernet.totalRxIdle                0                       # total number of RxIdle written to ISR
+testsys.tsunami.ethernet.totalRxOk                  0                       # total number of RxOk written to ISR
+testsys.tsunami.ethernet.totalRxOrn                 0                       # total number of RxOrn written to ISR
+testsys.tsunami.ethernet.totalSwi                   0                       # total number of Swi written to ISR
+testsys.tsunami.ethernet.totalTxDesc                0                       # total number of TxDesc written to ISR
+testsys.tsunami.ethernet.totalTxIdle                6                       # total number of TxIdle written to ISR
+testsys.tsunami.ethernet.totalTxOk                  0                       # total number of TxOk written to ISR
+testsys.tsunami.ethernet.txBandwidth            38400                       # Transmit Bandwidth (bits/s)
+testsys.tsunami.ethernet.txBytes                  960                       # Bytes Transmitted
+testsys.tsunami.ethernet.txIpChecksums              2                       # Number of tx IP Checksums done by device
+testsys.tsunami.ethernet.txPPS                     40                       # Packet Tranmission Rate (packets/s)
+testsys.tsunami.ethernet.txPackets                  8                       # Number of Packets Transmitted
+testsys.tsunami.ethernet.txTcpChecksums             2                       # Number of tx TCP Checksums done by device
+testsys.tsunami.ethernet.txUdpChecksums             0                       # Number of tx UDP Checksums done by device
+
+---------- End Simulation Statistics   ----------
+
+---------- Begin Simulation Statistics ----------
+drivesys.cpu.dtb.accesses                           0                       # DTB accesses
+drivesys.cpu.dtb.acv                                0                       # DTB access violations
+drivesys.cpu.dtb.hits                               0                       # DTB hits
+drivesys.cpu.dtb.misses                             0                       # DTB misses
+drivesys.cpu.dtb.read_accesses                      0                       # DTB read accesses
+drivesys.cpu.dtb.read_acv                           0                       # DTB read access violations
+drivesys.cpu.dtb.read_hits                          0                       # DTB read hits
+drivesys.cpu.dtb.read_misses                        0                       # DTB read misses
+drivesys.cpu.dtb.write_accesses                     0                       # DTB write accesses
+drivesys.cpu.dtb.write_acv                          0                       # DTB write access violations
+drivesys.cpu.dtb.write_hits                         0                       # DTB write hits
+drivesys.cpu.dtb.write_misses                       0                       # DTB write misses
+drivesys.cpu.idle_fraction                          1                       # Percentage of idle cycles
+drivesys.cpu.itb.accesses                           0                       # ITB accesses
+drivesys.cpu.itb.acv                                0                       # ITB acv
+drivesys.cpu.itb.hits                               0                       # ITB hits
+drivesys.cpu.itb.misses                             0                       # ITB misses
+drivesys.cpu.kern.inst.arm                          0                       # number of arm instructions executed
+drivesys.cpu.kern.inst.hwrei                        0                       # number of hwrei instructions executed
+drivesys.cpu.kern.inst.quiesce                      0                       # number of quiesce instructions executed
+drivesys.cpu.kern.mode_good_kernel                  0                      
+drivesys.cpu.kern.mode_good_user                    0                      
+drivesys.cpu.kern.mode_good_idle                    0                      
+drivesys.cpu.kern.mode_switch_kernel                0                       # number of protection mode switches
+drivesys.cpu.kern.mode_switch_user                  0                       # number of protection mode switches
+drivesys.cpu.kern.mode_switch_idle                  0                       # number of protection mode switches
+drivesys.cpu.kern.mode_switch_good       <err: div-0>                       # fraction of useful protection mode switches
+drivesys.cpu.kern.mode_switch_good_kernel <err: div-0>                       # fraction of useful protection mode switches
+drivesys.cpu.kern.mode_switch_good_user  <err: div-0>                       # fraction of useful protection mode switches
+drivesys.cpu.kern.mode_switch_good_idle  <err: div-0>                       # fraction of useful protection mode switches
+drivesys.cpu.kern.mode_ticks_kernel                 0                       # number of ticks spent at the given mode
+drivesys.cpu.kern.mode_ticks_user                   0                       # number of ticks spent at the given mode
+drivesys.cpu.kern.mode_ticks_idle                   0                       # number of ticks spent at the given mode
+drivesys.cpu.kern.swap_context                      0                       # number of times the context was actually changed
+drivesys.cpu.not_idle_fraction                      0                       # Percentage of non-idle cycles
+drivesys.cpu.numCycles                              0                       # number of cpu cycles simulated
+drivesys.cpu.num_insts                              0                       # Number of instructions executed
+drivesys.cpu.num_refs                               0                       # Number of memory references
+drivesys.disk0.dma_read_bytes                       0                       # Number of bytes transfered via DMA reads (not PRD).
+drivesys.disk0.dma_read_full_pages                  0                       # Number of full page size DMA reads (not PRD).
+drivesys.disk0.dma_read_txs                         0                       # Number of DMA read transactions (not PRD).
+drivesys.disk0.dma_write_bytes                      0                       # Number of bytes transfered via DMA writes.
+drivesys.disk0.dma_write_full_pages                 0                       # Number of full page size DMA writes.
+drivesys.disk0.dma_write_txs                        0                       # Number of DMA write transactions.
+drivesys.disk2.dma_read_bytes                       0                       # Number of bytes transfered via DMA reads (not PRD).
+drivesys.disk2.dma_read_full_pages                  0                       # Number of full page size DMA reads (not PRD).
+drivesys.disk2.dma_read_txs                         0                       # Number of DMA read transactions (not PRD).
+drivesys.disk2.dma_write_bytes                      0                       # Number of bytes transfered via DMA writes.
+drivesys.disk2.dma_write_full_pages                 0                       # Number of full page size DMA writes.
+drivesys.disk2.dma_write_txs                        0                       # Number of DMA write transactions.
+drivesys.tsunami.ethernet.coalescedRxDesc <err: div-0>                       # average number of RxDesc's coalesced into each post
+drivesys.tsunami.ethernet.coalescedRxIdle <err: div-0>                       # average number of RxIdle's coalesced into each post
+drivesys.tsunami.ethernet.coalescedRxOk  <err: div-0>                       # average number of RxOk's coalesced into each post
+drivesys.tsunami.ethernet.coalescedRxOrn <err: div-0>                       # average number of RxOrn's coalesced into each post
+drivesys.tsunami.ethernet.coalescedSwi   <err: div-0>                       # average number of Swi's coalesced into each post
+drivesys.tsunami.ethernet.coalescedTotal <err: div-0>                       # average number of interrupts coalesced into each post
+drivesys.tsunami.ethernet.coalescedTxDesc <err: div-0>                       # average number of TxDesc's coalesced into each post
+drivesys.tsunami.ethernet.coalescedTxIdle <err: div-0>                       # average number of TxIdle's coalesced into each post
+drivesys.tsunami.ethernet.coalescedTxOk  <err: div-0>                       # average number of TxOk's coalesced into each post
+drivesys.tsunami.ethernet.descDMAReads              0                       # Number of descriptors the device read w/ DMA
+drivesys.tsunami.ethernet.descDMAWrites             0                       # Number of descriptors the device wrote w/ DMA
+drivesys.tsunami.ethernet.descDmaReadBytes            0                       # number of descriptor bytes read w/ DMA
+drivesys.tsunami.ethernet.descDmaWriteBytes            0                       # number of descriptor bytes write w/ DMA
+drivesys.tsunami.ethernet.droppedPackets            0                       # number of packets dropped
+drivesys.tsunami.ethernet.postedInterrupts            0                       # number of posts to CPU
+drivesys.tsunami.ethernet.postedRxDesc              0                       # number of RxDesc interrupts posted to CPU
+drivesys.tsunami.ethernet.postedRxIdle              0                       # number of rxIdle interrupts posted to CPU
+drivesys.tsunami.ethernet.postedRxOk                0                       # number of RxOk interrupts posted to CPU
+drivesys.tsunami.ethernet.postedRxOrn               0                       # number of RxOrn posted to CPU
+drivesys.tsunami.ethernet.postedSwi                 0                       # number of software interrupts posted to CPU
+drivesys.tsunami.ethernet.postedTxDesc              0                       # number of TxDesc interrupts posted to CPU
+drivesys.tsunami.ethernet.postedTxIdle              0                       # number of TxIdle interrupts posted to CPU
+drivesys.tsunami.ethernet.postedTxOk                0                       # number of TxOk interrupts posted to CPU
+drivesys.tsunami.ethernet.totalRxDesc               0                       # total number of RxDesc written to ISR
+drivesys.tsunami.ethernet.totalRxIdle               0                       # total number of RxIdle written to ISR
+drivesys.tsunami.ethernet.totalRxOk                 0                       # total number of RxOk written to ISR
+drivesys.tsunami.ethernet.totalRxOrn                0                       # total number of RxOrn written to ISR
+drivesys.tsunami.ethernet.totalSwi                  0                       # total number of Swi written to ISR
+drivesys.tsunami.ethernet.totalTxDesc               0                       # total number of TxDesc written to ISR
+drivesys.tsunami.ethernet.totalTxIdle               0                       # total number of TxIdle written to ISR
+drivesys.tsunami.ethernet.totalTxOk                 0                       # total number of TxOk written to ISR
+host_inst_rate                           214516622449                       # Simulator instruction rate (inst/s)
+host_mem_usage                                 476644                       # Number of bytes of host memory used
+host_seconds                                     0.00                       # Real time elapsed on the host
+host_tick_rate                              582637509                       # Simulator tick rate (ticks/s)
+sim_freq                                 1000000000000                       # Frequency of simulated ticks
+sim_insts                                   273294177                       # Number of instructions simulated
+sim_seconds                                  0.000001                       # Number of seconds simulated
+sim_ticks                                      785978                       # Number of ticks simulated
+testsys.cpu.dtb.accesses                            0                       # DTB accesses
+testsys.cpu.dtb.acv                                 0                       # DTB access violations
+testsys.cpu.dtb.hits                                0                       # DTB hits
+testsys.cpu.dtb.misses                              0                       # DTB misses
+testsys.cpu.dtb.read_accesses                       0                       # DTB read accesses
+testsys.cpu.dtb.read_acv                            0                       # DTB read access violations
+testsys.cpu.dtb.read_hits                           0                       # DTB read hits
+testsys.cpu.dtb.read_misses                         0                       # DTB read misses
+testsys.cpu.dtb.write_accesses                      0                       # DTB write accesses
+testsys.cpu.dtb.write_acv                           0                       # DTB write access violations
+testsys.cpu.dtb.write_hits                          0                       # DTB write hits
+testsys.cpu.dtb.write_misses                        0                       # DTB write misses
+testsys.cpu.idle_fraction                           1                       # Percentage of idle cycles
+testsys.cpu.itb.accesses                            0                       # ITB accesses
+testsys.cpu.itb.acv                                 0                       # ITB acv
+testsys.cpu.itb.hits                                0                       # ITB hits
+testsys.cpu.itb.misses                              0                       # ITB misses
+testsys.cpu.kern.inst.arm                           0                       # number of arm instructions executed
+testsys.cpu.kern.inst.hwrei                         0                       # number of hwrei instructions executed
+testsys.cpu.kern.inst.quiesce                       0                       # number of quiesce instructions executed
+testsys.cpu.kern.mode_good_kernel                   0                      
+testsys.cpu.kern.mode_good_user                     0                      
+testsys.cpu.kern.mode_good_idle                     0                      
+testsys.cpu.kern.mode_switch_kernel                 0                       # number of protection mode switches
+testsys.cpu.kern.mode_switch_user                   0                       # number of protection mode switches
+testsys.cpu.kern.mode_switch_idle                   0                       # number of protection mode switches
+testsys.cpu.kern.mode_switch_good        <err: div-0>                       # fraction of useful protection mode switches
+testsys.cpu.kern.mode_switch_good_kernel <err: div-0>                       # fraction of useful protection mode switches
+testsys.cpu.kern.mode_switch_good_user   <err: div-0>                       # fraction of useful protection mode switches
+testsys.cpu.kern.mode_switch_good_idle   <err: div-0>                       # fraction of useful protection mode switches
+testsys.cpu.kern.mode_ticks_kernel                  0                       # number of ticks spent at the given mode
+testsys.cpu.kern.mode_ticks_user                    0                       # number of ticks spent at the given mode
+testsys.cpu.kern.mode_ticks_idle                    0                       # number of ticks spent at the given mode
+testsys.cpu.kern.swap_context                       0                       # number of times the context was actually changed
+testsys.cpu.not_idle_fraction                       0                       # Percentage of non-idle cycles
+testsys.cpu.numCycles                               0                       # number of cpu cycles simulated
+testsys.cpu.num_insts                               0                       # Number of instructions executed
+testsys.cpu.num_refs                                0                       # Number of memory references
+testsys.disk0.dma_read_bytes                        0                       # Number of bytes transfered via DMA reads (not PRD).
+testsys.disk0.dma_read_full_pages                   0                       # Number of full page size DMA reads (not PRD).
+testsys.disk0.dma_read_txs                          0                       # Number of DMA read transactions (not PRD).
+testsys.disk0.dma_write_bytes                       0                       # Number of bytes transfered via DMA writes.
+testsys.disk0.dma_write_full_pages                  0                       # Number of full page size DMA writes.
+testsys.disk0.dma_write_txs                         0                       # Number of DMA write transactions.
+testsys.disk2.dma_read_bytes                        0                       # Number of bytes transfered via DMA reads (not PRD).
+testsys.disk2.dma_read_full_pages                   0                       # Number of full page size DMA reads (not PRD).
+testsys.disk2.dma_read_txs                          0                       # Number of DMA read transactions (not PRD).
+testsys.disk2.dma_write_bytes                       0                       # Number of bytes transfered via DMA writes.
+testsys.disk2.dma_write_full_pages                  0                       # Number of full page size DMA writes.
+testsys.disk2.dma_write_txs                         0                       # Number of DMA write transactions.
+testsys.tsunami.ethernet.coalescedRxDesc <err: div-0>                       # average number of RxDesc's coalesced into each post
+testsys.tsunami.ethernet.coalescedRxIdle <err: div-0>                       # average number of RxIdle's coalesced into each post
+testsys.tsunami.ethernet.coalescedRxOk   <err: div-0>                       # average number of RxOk's coalesced into each post
+testsys.tsunami.ethernet.coalescedRxOrn  <err: div-0>                       # average number of RxOrn's coalesced into each post
+testsys.tsunami.ethernet.coalescedSwi    <err: div-0>                       # average number of Swi's coalesced into each post
+testsys.tsunami.ethernet.coalescedTotal  <err: div-0>                       # average number of interrupts coalesced into each post
+testsys.tsunami.ethernet.coalescedTxDesc <err: div-0>                       # average number of TxDesc's coalesced into each post
+testsys.tsunami.ethernet.coalescedTxIdle <err: div-0>                       # average number of TxIdle's coalesced into each post
+testsys.tsunami.ethernet.coalescedTxOk   <err: div-0>                       # average number of TxOk's coalesced into each post
+testsys.tsunami.ethernet.descDMAReads               0                       # Number of descriptors the device read w/ DMA
+testsys.tsunami.ethernet.descDMAWrites              0                       # Number of descriptors the device wrote w/ DMA
+testsys.tsunami.ethernet.descDmaReadBytes            0                       # number of descriptor bytes read w/ DMA
+testsys.tsunami.ethernet.descDmaWriteBytes            0                       # number of descriptor bytes write w/ DMA
+testsys.tsunami.ethernet.droppedPackets             0                       # number of packets dropped
+testsys.tsunami.ethernet.postedInterrupts            0                       # number of posts to CPU
+testsys.tsunami.ethernet.postedRxDesc               0                       # number of RxDesc interrupts posted to CPU
+testsys.tsunami.ethernet.postedRxIdle               0                       # number of rxIdle interrupts posted to CPU
+testsys.tsunami.ethernet.postedRxOk                 0                       # number of RxOk interrupts posted to CPU
+testsys.tsunami.ethernet.postedRxOrn                0                       # number of RxOrn posted to CPU
+testsys.tsunami.ethernet.postedSwi                  0                       # number of software interrupts posted to CPU
+testsys.tsunami.ethernet.postedTxDesc               0                       # number of TxDesc interrupts posted to CPU
+testsys.tsunami.ethernet.postedTxIdle               0                       # number of TxIdle interrupts posted to CPU
+testsys.tsunami.ethernet.postedTxOk                 0                       # number of TxOk interrupts posted to CPU
+testsys.tsunami.ethernet.totalRxDesc                0                       # total number of RxDesc written to ISR
+testsys.tsunami.ethernet.totalRxIdle                0                       # total number of RxIdle written to ISR
+testsys.tsunami.ethernet.totalRxOk                  0                       # total number of RxOk written to ISR
+testsys.tsunami.ethernet.totalRxOrn                 0                       # total number of RxOrn written to ISR
+testsys.tsunami.ethernet.totalSwi                   0                       # total number of Swi written to ISR
+testsys.tsunami.ethernet.totalTxDesc                0                       # total number of TxDesc written to ISR
+testsys.tsunami.ethernet.totalTxIdle                0                       # total number of TxIdle written to ISR
+testsys.tsunami.ethernet.totalTxOk                  0                       # total number of TxOk written to ISR
+
+---------- End Simulation Statistics   ----------
author	Nathan Binkert <nate@binkert.org>	2008-12-08 07:16:40 -0800
committer	Nathan Binkert <nate@binkert.org>	2008-12-08 07:16:40 -0800
commit	19273164da50011d59b7f362026f8e80260807d4 (patch)
tree	bf5053cec37827ff14037776b019990ffaed32cc /tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt
parent	9192b7f1effaa9aabdd61840903e4f0c12079758 (diff)
download	gem5-19273164da50011d59b7f362026f8e80260807d4.tar.xz