diff options
author | Andreas Hansson <andreas.hansson@arm.com> | 2012-10-25 13:14:42 -0400 |
---|---|---|
committer | Andreas Hansson <andreas.hansson@arm.com> | 2012-10-25 13:14:42 -0400 |
commit | 8fe556338db4cc50a3f1ba20306bc5e464941f2b (patch) | |
tree | d95b1933c18d142f9c533f32ac7b84bd1f2d0da5 /tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt | |
parent | 66e331c7bb7d503c35808325e1bfaa9f18f4bdb9 (diff) | |
download | gem5-8fe556338db4cc50a3f1ba20306bc5e464941f2b.tar.xz |
stats: Update stats to reflect use of SimpleDRAM
This patch bumps the stats to match the use of SimpleDRAM instead of
SimpleMemory in all inorder and O3 regressions, and also all
full-system regressions. A number of performance-related stats change,
and a whole bunch of stats are added for the memory controller.
Diffstat (limited to 'tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt')
-rw-r--r-- | tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt | 244 |
1 files changed, 201 insertions, 43 deletions
diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt index cf5c30619..99b74717c 100644 --- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt +++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt @@ -4,11 +4,11 @@ sim_seconds 1.829331 # Nu sim_ticks 1829330593000 # Number of ticks simulated final_tick 1829330593000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 2569577 # Simulator instruction rate (inst/s) -host_op_rate 2569575 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 78294086451 # Simulator tick rate (ticks/s) -host_mem_usage 295292 # Number of bytes of host memory used -host_seconds 23.37 # Real time elapsed on the host +host_inst_rate 1577718 # Simulator instruction rate (inst/s) +host_op_rate 1577717 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 48072530632 # Simulator tick rate (ticks/s) +host_mem_usage 294780 # Number of bytes of host memory used +host_seconds 38.05 # Real time elapsed on the host sim_insts 60037737 # Number of instructions simulated sim_ops 60037737 # Number of ops (including micro ops) simulated system.physmem.bytes_read::cpu.inst 857856 # Number of bytes read from this memory @@ -38,6 +38,164 @@ system.physmem.bw_total::cpu.inst 468945 # To system.physmem.bw_total::cpu.data 36537571 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::tsunami.ide 1449868 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::total 42507667 # Total bandwidth to/from this memory (bytes/s) +system.physmem.readReqs 0 # Total number of read requests seen +system.physmem.writeReqs 0 # Total number of write requests seen +system.physmem.cpureqs 0 # Reqs generatd by CPU via cache - shady +system.physmem.bytesRead 0 # Total number of bytes read from memory +system.physmem.bytesWritten 0 # Total number of bytes written to memory +system.physmem.bytesConsumedRd 0 # bytesRead derated as per pkt->getSize() +system.physmem.bytesConsumedWr 0 # bytesWritten derated as per pkt->getSize() +system.physmem.servicedByWrQ 0 # Number of read reqs serviced by write Q +system.physmem.neitherReadNorWrite 0 # Reqs where no action is needed +system.physmem.perBankRdReqs::0 0 # Track reads on a per bank basis +system.physmem.perBankRdReqs::1 0 # Track reads on a per bank basis +system.physmem.perBankRdReqs::2 0 # Track reads on a per bank basis +system.physmem.perBankRdReqs::3 0 # Track reads on a per bank basis +system.physmem.perBankRdReqs::4 0 # Track reads on a per bank basis +system.physmem.perBankRdReqs::5 0 # Track reads on a per bank basis +system.physmem.perBankRdReqs::6 0 # Track reads on a per bank basis +system.physmem.perBankRdReqs::7 0 # Track reads on a per bank basis +system.physmem.perBankRdReqs::8 0 # Track reads on a per bank basis +system.physmem.perBankRdReqs::9 0 # Track reads on a per bank basis +system.physmem.perBankRdReqs::10 0 # Track reads on a per bank basis +system.physmem.perBankRdReqs::11 0 # Track reads on a per bank basis +system.physmem.perBankRdReqs::12 0 # Track reads on a per bank basis +system.physmem.perBankRdReqs::13 0 # Track reads on a per bank basis +system.physmem.perBankRdReqs::14 0 # Track reads on a per bank basis +system.physmem.perBankRdReqs::15 0 # Track reads on a per bank basis +system.physmem.perBankWrReqs::0 0 # Track writes on a per bank basis +system.physmem.perBankWrReqs::1 0 # Track writes on a per bank basis +system.physmem.perBankWrReqs::2 0 # Track writes on a per bank basis +system.physmem.perBankWrReqs::3 0 # Track writes on a per bank basis +system.physmem.perBankWrReqs::4 0 # Track writes on a per bank basis +system.physmem.perBankWrReqs::5 0 # Track writes on a per bank basis +system.physmem.perBankWrReqs::6 0 # Track writes on a per bank basis +system.physmem.perBankWrReqs::7 0 # Track writes on a per bank basis +system.physmem.perBankWrReqs::8 0 # Track writes on a per bank basis +system.physmem.perBankWrReqs::9 0 # Track writes on a per bank basis +system.physmem.perBankWrReqs::10 0 # Track writes on a per bank basis +system.physmem.perBankWrReqs::11 0 # Track writes on a per bank basis +system.physmem.perBankWrReqs::12 0 # Track writes on a per bank basis +system.physmem.perBankWrReqs::13 0 # Track writes on a per bank basis +system.physmem.perBankWrReqs::14 0 # Track writes on a per bank basis +system.physmem.perBankWrReqs::15 0 # Track writes on a per bank basis +system.physmem.numRdRetry 0 # Number of times rd buffer was full causing retry +system.physmem.numWrRetry 0 # Number of times wr buffer was full causing retry +system.physmem.totGap 0 # Total gap between requests +system.physmem.readPktSize::0 0 # Categorize read packet sizes +system.physmem.readPktSize::1 0 # Categorize read packet sizes +system.physmem.readPktSize::2 0 # Categorize read packet sizes +system.physmem.readPktSize::3 0 # Categorize read packet sizes +system.physmem.readPktSize::4 0 # Categorize read packet sizes +system.physmem.readPktSize::5 0 # Categorize read packet sizes +system.physmem.readPktSize::6 0 # Categorize read packet sizes +system.physmem.readPktSize::7 0 # Categorize read packet sizes +system.physmem.readPktSize::8 0 # Categorize read packet sizes +system.physmem.writePktSize::0 0 # categorize write packet sizes +system.physmem.writePktSize::1 0 # categorize write packet sizes +system.physmem.writePktSize::2 0 # categorize write packet sizes +system.physmem.writePktSize::3 0 # categorize write packet sizes +system.physmem.writePktSize::4 0 # categorize write packet sizes +system.physmem.writePktSize::5 0 # categorize write packet sizes +system.physmem.writePktSize::6 0 # categorize write packet sizes +system.physmem.writePktSize::7 0 # categorize write packet sizes +system.physmem.writePktSize::8 0 # categorize write packet sizes +system.physmem.neitherpktsize::0 0 # categorize neither packet sizes +system.physmem.neitherpktsize::1 0 # categorize neither packet sizes +system.physmem.neitherpktsize::2 0 # categorize neither packet sizes +system.physmem.neitherpktsize::3 0 # categorize neither packet sizes +system.physmem.neitherpktsize::4 0 # categorize neither packet sizes +system.physmem.neitherpktsize::5 0 # categorize neither packet sizes +system.physmem.neitherpktsize::6 0 # categorize neither packet sizes +system.physmem.neitherpktsize::7 0 # categorize neither packet sizes +system.physmem.neitherpktsize::8 0 # categorize neither packet sizes +system.physmem.rdQLenPdf::0 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::1 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::2 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::3 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::4 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::5 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::6 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::7 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::8 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::9 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::10 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::11 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::12 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::13 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::14 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::15 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::16 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::17 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::18 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::19 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::20 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::21 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::22 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::23 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::24 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::25 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::26 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::27 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::28 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::29 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::30 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::31 0 # What read queue length does an incoming req see +system.physmem.rdQLenPdf::32 0 # What read queue length does an incoming req see +system.physmem.wrQLenPdf::0 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::1 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::2 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::3 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::4 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::5 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::6 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::7 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::8 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::9 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::10 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::11 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::12 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::13 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::14 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::15 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::16 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::17 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::18 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::19 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::20 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::21 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::22 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::23 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::24 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::25 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::26 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::27 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::28 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::29 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::30 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::31 0 # What write queue length does an incoming req see +system.physmem.wrQLenPdf::32 0 # What write queue length does an incoming req see +system.physmem.totQLat 0 # Total cycles spent in queuing delays +system.physmem.totMemAccLat 0 # Sum of mem lat for all requests +system.physmem.totBusLat 0 # Total cycles spent in databus access +system.physmem.totBankLat 0 # Total cycles spent in bank access +system.physmem.avgQLat nan # Average queueing delay per request +system.physmem.avgBankLat nan # Average bank access latency per request +system.physmem.avgBusLat nan # Average bus latency per request +system.physmem.avgMemAccLat nan # Average memory access latency +system.physmem.avgRdBW 0.00 # Average achieved read bandwidth in MB/s +system.physmem.avgWrBW 0.00 # Average achieved write bandwidth in MB/s +system.physmem.avgConsumedRdBW 0.00 # Average consumed read bandwidth in MB/s +system.physmem.avgConsumedWrBW 0.00 # Average consumed write bandwidth in MB/s +system.physmem.peakBW 16000.00 # Theoretical peak bandwidth in MB/s +system.physmem.busUtil 0.00 # Data bus utilization in percentage +system.physmem.avgRdQLen 0.00 # Average read queue length over time +system.physmem.avgWrQLen 0.00 # Average write queue length over time +system.physmem.readRowHits 0 # Number of row buffer hits during reads +system.physmem.writeRowHits 0 # Number of row buffer hits during writes +system.physmem.readRowHitRate nan # Row buffer hit rate for reads +system.physmem.writeRowHitRate nan # Row buffer hit rate for writes +system.physmem.avgGap nan # Average gap between requests system.iocache.replacements 41686 # number of replacements system.iocache.tagsinuse 1.225558 # Cycle average of tags in use system.iocache.total_refs 0 # Total number of references to valid blocks. @@ -144,8 +302,8 @@ system.cpu.num_fp_register_writes 166520 # nu system.cpu.num_mem_refs 16115688 # number of memory refs system.cpu.num_load_insts 9747503 # Number of load instructions system.cpu.num_store_insts 6368185 # Number of store instructions -system.cpu.num_idle_cycles 3598606247.544791 # Number of idle cycles -system.cpu.num_busy_cycles 60054830.455209 # Number of busy cycles +system.cpu.num_idle_cycles 3598606250.520791 # Number of idle cycles +system.cpu.num_busy_cycles 60054827.479209 # Number of busy cycles system.cpu.not_idle_fraction 0.016414 # Percentage of non-idle cycles system.cpu.idle_fraction 0.983586 # Percentage of idle cycles system.cpu.kern.inst.arm 0 # number of arm instructions executed @@ -306,37 +464,37 @@ system.cpu.icache.avg_blocked_cycles::no_targets nan system.cpu.icache.fast_writes 0 # number of fast writes performed system.cpu.icache.cache_copies 0 # number of cache copies performed system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.replacements 2042708 # number of replacements +system.cpu.dcache.replacements 2042707 # number of replacements system.cpu.dcache.tagsinuse 511.997802 # Cycle average of tags in use -system.cpu.dcache.total_refs 14038404 # Total number of references to valid blocks. -system.cpu.dcache.sampled_refs 2043220 # Sample count of references to valid blocks. -system.cpu.dcache.avg_refs 6.870726 # Average number of references to valid blocks. +system.cpu.dcache.total_refs 14038405 # Total number of references to valid blocks. +system.cpu.dcache.sampled_refs 2043219 # Sample count of references to valid blocks. +system.cpu.dcache.avg_refs 6.870729 # Average number of references to valid blocks. system.cpu.dcache.warmup_cycle 10840000 # Cycle when the warmup percentage was hit. system.cpu.dcache.occ_blocks::cpu.data 511.997802 # Average occupied blocks per requestor system.cpu.dcache.occ_percent::cpu.data 0.999996 # Average percentage of cache occupancy system.cpu.dcache.occ_percent::total 0.999996 # Average percentage of cache occupancy -system.cpu.dcache.ReadReq_hits::cpu.data 7807768 # number of ReadReq hits -system.cpu.dcache.ReadReq_hits::total 7807768 # number of ReadReq hits +system.cpu.dcache.ReadReq_hits::cpu.data 7807769 # number of ReadReq hits +system.cpu.dcache.ReadReq_hits::total 7807769 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 5848199 # number of WriteReq hits system.cpu.dcache.WriteReq_hits::total 5848199 # number of WriteReq hits system.cpu.dcache.LoadLockedReq_hits::cpu.data 183140 # number of LoadLockedReq hits system.cpu.dcache.LoadLockedReq_hits::total 183140 # number of LoadLockedReq hits system.cpu.dcache.StoreCondReq_hits::cpu.data 199281 # number of StoreCondReq hits system.cpu.dcache.StoreCondReq_hits::total 199281 # number of StoreCondReq hits -system.cpu.dcache.demand_hits::cpu.data 13655967 # number of demand (read+write) hits -system.cpu.dcache.demand_hits::total 13655967 # number of demand (read+write) hits -system.cpu.dcache.overall_hits::cpu.data 13655967 # number of overall hits -system.cpu.dcache.overall_hits::total 13655967 # number of overall hits -system.cpu.dcache.ReadReq_misses::cpu.data 1721710 # number of ReadReq misses -system.cpu.dcache.ReadReq_misses::total 1721710 # number of ReadReq misses +system.cpu.dcache.demand_hits::cpu.data 13655968 # number of demand (read+write) hits +system.cpu.dcache.demand_hits::total 13655968 # number of demand (read+write) hits +system.cpu.dcache.overall_hits::cpu.data 13655968 # number of overall hits +system.cpu.dcache.overall_hits::total 13655968 # number of overall hits +system.cpu.dcache.ReadReq_misses::cpu.data 1721709 # number of ReadReq misses +system.cpu.dcache.ReadReq_misses::total 1721709 # number of ReadReq misses system.cpu.dcache.WriteReq_misses::cpu.data 304365 # number of WriteReq misses system.cpu.dcache.WriteReq_misses::total 304365 # number of WriteReq misses system.cpu.dcache.LoadLockedReq_misses::cpu.data 17162 # number of LoadLockedReq misses system.cpu.dcache.LoadLockedReq_misses::total 17162 # number of LoadLockedReq misses -system.cpu.dcache.demand_misses::cpu.data 2026075 # number of demand (read+write) misses -system.cpu.dcache.demand_misses::total 2026075 # number of demand (read+write) misses -system.cpu.dcache.overall_misses::cpu.data 2026075 # number of overall misses -system.cpu.dcache.overall_misses::total 2026075 # number of overall misses +system.cpu.dcache.demand_misses::cpu.data 2026074 # number of demand (read+write) misses +system.cpu.dcache.demand_misses::total 2026074 # number of demand (read+write) misses +system.cpu.dcache.overall_misses::cpu.data 2026074 # number of overall misses +system.cpu.dcache.overall_misses::total 2026074 # number of overall misses system.cpu.dcache.ReadReq_accesses::cpu.data 9529478 # number of ReadReq accesses(hits+misses) system.cpu.dcache.ReadReq_accesses::total 9529478 # number of ReadReq accesses(hits+misses) system.cpu.dcache.WriteReq_accesses::cpu.data 6152564 # number of WriteReq accesses(hits+misses) @@ -372,20 +530,20 @@ system.cpu.dcache.writebacks::total 833491 # nu system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate system.cpu.l2cache.replacements 992297 # number of replacements system.cpu.l2cache.tagsinuse 65424.375500 # Cycle average of tags in use -system.cpu.l2cache.total_refs 2433229 # Total number of references to valid blocks. +system.cpu.l2cache.total_refs 2433228 # Total number of references to valid blocks. system.cpu.l2cache.sampled_refs 1057460 # Sample count of references to valid blocks. -system.cpu.l2cache.avg_refs 2.301013 # Average number of references to valid blocks. +system.cpu.l2cache.avg_refs 2.301012 # Average number of references to valid blocks. system.cpu.l2cache.warmup_cycle 614754000 # Cycle when the warmup percentage was hit. -system.cpu.l2cache.occ_blocks::writebacks 56309.097195 # Average occupied blocks per requestor -system.cpu.l2cache.occ_blocks::cpu.inst 4867.351144 # Average occupied blocks per requestor -system.cpu.l2cache.occ_blocks::cpu.data 4247.927161 # Average occupied blocks per requestor +system.cpu.l2cache.occ_blocks::writebacks 56309.097197 # Average occupied blocks per requestor +system.cpu.l2cache.occ_blocks::cpu.inst 4867.351143 # Average occupied blocks per requestor +system.cpu.l2cache.occ_blocks::cpu.data 4247.927159 # Average occupied blocks per requestor system.cpu.l2cache.occ_percent::writebacks 0.859209 # Average percentage of cache occupancy system.cpu.l2cache.occ_percent::cpu.inst 0.074270 # Average percentage of cache occupancy system.cpu.l2cache.occ_percent::cpu.data 0.064818 # Average percentage of cache occupancy system.cpu.l2cache.occ_percent::total 0.998297 # Average percentage of cache occupancy system.cpu.l2cache.ReadReq_hits::cpu.inst 906782 # number of ReadReq hits -system.cpu.l2cache.ReadReq_hits::cpu.data 811232 # number of ReadReq hits -system.cpu.l2cache.ReadReq_hits::total 1718014 # number of ReadReq hits +system.cpu.l2cache.ReadReq_hits::cpu.data 811231 # number of ReadReq hits +system.cpu.l2cache.ReadReq_hits::total 1718013 # number of ReadReq hits system.cpu.l2cache.Writeback_hits::writebacks 833491 # number of Writeback hits system.cpu.l2cache.Writeback_hits::total 833491 # number of Writeback hits system.cpu.l2cache.UpgradeReq_hits::cpu.data 4 # number of UpgradeReq hits @@ -393,11 +551,11 @@ system.cpu.l2cache.UpgradeReq_hits::total 4 # n system.cpu.l2cache.ReadExReq_hits::cpu.data 187234 # number of ReadExReq hits system.cpu.l2cache.ReadExReq_hits::total 187234 # number of ReadExReq hits system.cpu.l2cache.demand_hits::cpu.inst 906782 # number of demand (read+write) hits -system.cpu.l2cache.demand_hits::cpu.data 998466 # number of demand (read+write) hits -system.cpu.l2cache.demand_hits::total 1905248 # number of demand (read+write) hits +system.cpu.l2cache.demand_hits::cpu.data 998465 # number of demand (read+write) hits +system.cpu.l2cache.demand_hits::total 1905247 # number of demand (read+write) hits system.cpu.l2cache.overall_hits::cpu.inst 906782 # number of overall hits -system.cpu.l2cache.overall_hits::cpu.data 998466 # number of overall hits -system.cpu.l2cache.overall_hits::total 1905248 # number of overall hits +system.cpu.l2cache.overall_hits::cpu.data 998465 # number of overall hits +system.cpu.l2cache.overall_hits::total 1905247 # number of overall hits system.cpu.l2cache.ReadReq_misses::cpu.inst 13404 # number of ReadReq misses system.cpu.l2cache.ReadReq_misses::cpu.data 927640 # number of ReadReq misses system.cpu.l2cache.ReadReq_misses::total 941044 # number of ReadReq misses @@ -412,8 +570,8 @@ system.cpu.l2cache.overall_misses::cpu.inst 13404 # system.cpu.l2cache.overall_misses::cpu.data 1044755 # number of overall misses system.cpu.l2cache.overall_misses::total 1058159 # number of overall misses system.cpu.l2cache.ReadReq_accesses::cpu.inst 920186 # number of ReadReq accesses(hits+misses) -system.cpu.l2cache.ReadReq_accesses::cpu.data 1738872 # number of ReadReq accesses(hits+misses) -system.cpu.l2cache.ReadReq_accesses::total 2659058 # number of ReadReq accesses(hits+misses) +system.cpu.l2cache.ReadReq_accesses::cpu.data 1738871 # number of ReadReq accesses(hits+misses) +system.cpu.l2cache.ReadReq_accesses::total 2659057 # number of ReadReq accesses(hits+misses) system.cpu.l2cache.Writeback_accesses::writebacks 833491 # number of Writeback accesses(hits+misses) system.cpu.l2cache.Writeback_accesses::total 833491 # number of Writeback accesses(hits+misses) system.cpu.l2cache.UpgradeReq_accesses::cpu.data 16 # number of UpgradeReq accesses(hits+misses) @@ -421,23 +579,23 @@ system.cpu.l2cache.UpgradeReq_accesses::total 16 system.cpu.l2cache.ReadExReq_accesses::cpu.data 304349 # number of ReadExReq accesses(hits+misses) system.cpu.l2cache.ReadExReq_accesses::total 304349 # number of ReadExReq accesses(hits+misses) system.cpu.l2cache.demand_accesses::cpu.inst 920186 # number of demand (read+write) accesses -system.cpu.l2cache.demand_accesses::cpu.data 2043221 # number of demand (read+write) accesses -system.cpu.l2cache.demand_accesses::total 2963407 # number of demand (read+write) accesses +system.cpu.l2cache.demand_accesses::cpu.data 2043220 # number of demand (read+write) accesses +system.cpu.l2cache.demand_accesses::total 2963406 # number of demand (read+write) accesses system.cpu.l2cache.overall_accesses::cpu.inst 920186 # number of overall (read+write) accesses -system.cpu.l2cache.overall_accesses::cpu.data 2043221 # number of overall (read+write) accesses -system.cpu.l2cache.overall_accesses::total 2963407 # number of overall (read+write) accesses +system.cpu.l2cache.overall_accesses::cpu.data 2043220 # number of overall (read+write) accesses +system.cpu.l2cache.overall_accesses::total 2963406 # number of overall (read+write) accesses system.cpu.l2cache.ReadReq_miss_rate::cpu.inst 0.014567 # miss rate for ReadReq accesses -system.cpu.l2cache.ReadReq_miss_rate::cpu.data 0.533472 # miss rate for ReadReq accesses +system.cpu.l2cache.ReadReq_miss_rate::cpu.data 0.533473 # miss rate for ReadReq accesses system.cpu.l2cache.ReadReq_miss_rate::total 0.353901 # miss rate for ReadReq accesses system.cpu.l2cache.UpgradeReq_miss_rate::cpu.data 0.750000 # miss rate for UpgradeReq accesses system.cpu.l2cache.UpgradeReq_miss_rate::total 0.750000 # miss rate for UpgradeReq accesses system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 0.384805 # miss rate for ReadExReq accesses system.cpu.l2cache.ReadExReq_miss_rate::total 0.384805 # miss rate for ReadExReq accesses system.cpu.l2cache.demand_miss_rate::cpu.inst 0.014567 # miss rate for demand accesses -system.cpu.l2cache.demand_miss_rate::cpu.data 0.511327 # miss rate for demand accesses +system.cpu.l2cache.demand_miss_rate::cpu.data 0.511328 # miss rate for demand accesses system.cpu.l2cache.demand_miss_rate::total 0.357075 # miss rate for demand accesses system.cpu.l2cache.overall_miss_rate::cpu.inst 0.014567 # miss rate for overall accesses -system.cpu.l2cache.overall_miss_rate::cpu.data 0.511327 # miss rate for overall accesses +system.cpu.l2cache.overall_miss_rate::cpu.data 0.511328 # miss rate for overall accesses system.cpu.l2cache.overall_miss_rate::total 0.357075 # miss rate for overall accesses system.cpu.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked |