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authorNathan Binkert <nate@binkert.org>2012-05-09 11:52:14 -0700
committerNathan Binkert <nate@binkert.org>2012-05-09 11:52:14 -0700
commit4a644767c58754339965cecc5d85853255652a30 (patch)
treee435caa3b1ba7f5e395c58ca0fdfdfa91804d2dd /tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual
parent55411f7f713a42f67552a9621051fae8f7869648 (diff)
downloadgem5-4a644767c58754339965cecc5d85853255652a30.tar.xz
stats: update stats for no_value -> nan
Lots of accumulated older changes too.
Diffstat (limited to 'tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual')
-rw-r--r--tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini112
-rwxr-xr-xtests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/simout9
-rw-r--r--tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stats.txt54
3 files changed, 90 insertions, 85 deletions
diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini
index 110cfac39..6299f010e 100644
--- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini
+++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini
@@ -19,7 +19,6 @@ mem_mode=timing
memories=system.physmem
num_work_ids=16
pal=/dist/m5/system/binaries/ts_osfpal
-physmem=system.physmem
readfile=tests/halt.sh
symbolfile=
system_rev=1024
@@ -31,7 +30,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
-system_port=system.membus.port[2]
+system_port=system.membus.slave[0]
[system.bridge]
type=Bridge
@@ -41,8 +40,8 @@ ranges=8796093022208:18446744073709551615
req_size=16
resp_size=16
write_ack=false
-master=system.iobus.port[0]
-slave=system.membus.port[0]
+master=system.iobus.slave[0]
+slave=system.membus.master[0]
[system.cpu0]
type=TimingSimpleCPU
@@ -75,7 +74,7 @@ icache_port=system.cpu0.icache.cpu_side
[system.cpu0.dcache]
type=BaseCache
-addr_range=0:18446744073709551615
+addr_ranges=0:18446744073709551615
assoc=4
block_size=64
forward_snoops=true
@@ -96,7 +95,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu0.dcache_port
-mem_side=system.toL2Bus.port[2]
+mem_side=system.toL2Bus.slave[1]
[system.cpu0.dtb]
type=AlphaTLB
@@ -104,7 +103,7 @@ size=64
[system.cpu0.icache]
type=BaseCache
-addr_range=0:18446744073709551615
+addr_ranges=0:18446744073709551615
assoc=1
block_size=64
forward_snoops=true
@@ -125,7 +124,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu0.icache_port
-mem_side=system.toL2Bus.port[1]
+mem_side=system.toL2Bus.slave[0]
[system.cpu0.interrupts]
type=AlphaInterrupts
@@ -168,7 +167,7 @@ icache_port=system.cpu1.icache.cpu_side
[system.cpu1.dcache]
type=BaseCache
-addr_range=0:18446744073709551615
+addr_ranges=0:18446744073709551615
assoc=4
block_size=64
forward_snoops=true
@@ -189,7 +188,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu1.dcache_port
-mem_side=system.toL2Bus.port[4]
+mem_side=system.toL2Bus.slave[3]
[system.cpu1.dtb]
type=AlphaTLB
@@ -197,7 +196,7 @@ size=64
[system.cpu1.icache]
type=BaseCache
-addr_range=0:18446744073709551615
+addr_ranges=0:18446744073709551615
assoc=1
block_size=64
forward_snoops=true
@@ -218,7 +217,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu1.icache_port
-mem_side=system.toL2Bus.port[3]
+mem_side=system.toL2Bus.slave[2]
[system.cpu1.interrupts]
type=AlphaInterrupts
@@ -283,11 +282,12 @@ header_cycles=1
use_default_range=true
width=64
default=system.tsunami.pciconfig.pio
-port=system.bridge.master system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ide.dma system.tsunami.ethernet.pio system.tsunami.ethernet.config system.tsunami.ethernet.dma system.iocache.cpu_side
+master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side
+slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma
[system.iocache]
type=BaseCache
-addr_range=0:8589934591
+addr_ranges=0:8589934591
assoc=8
block_size=64
forward_snoops=false
@@ -307,12 +307,12 @@ tgts_per_mshr=12
trace_addr=0
two_queue=false
write_buffers=8
-cpu_side=system.iobus.port[32]
-mem_side=system.membus.port[3]
+cpu_side=system.iobus.master[29]
+mem_side=system.membus.slave[1]
[system.l2c]
type=BaseCache
-addr_range=0:18446744073709551615
+addr_ranges=0:18446744073709551615
assoc=8
block_size=64
forward_snoops=true
@@ -332,8 +332,8 @@ tgts_per_mshr=16
trace_addr=0
two_queue=false
write_buffers=8
-cpu_side=system.toL2Bus.port[0]
-mem_side=system.membus.port[4]
+cpu_side=system.toL2Bus.master[0]
+mem_side=system.membus.slave[2]
[system.membus]
type=Bus
@@ -345,7 +345,8 @@ header_cycles=1
use_default_range=false
width=64
default=system.membus.badaddr_responder.pio
-port=system.bridge.slave system.physmem.port[0] system.system_port system.iocache.mem_side system.l2c.mem_side
+master=system.bridge.slave system.physmem.port[0]
+slave=system.system_port system.iocache.mem_side system.l2c.mem_side
[system.membus.badaddr_responder]
type=IsaFake
@@ -364,14 +365,16 @@ warn_access=
pio=system.membus.default
[system.physmem]
-type=PhysicalMemory
+type=SimpleMemory
+conf_table_reported=false
file=
+in_addr_map=true
latency=30000
latency_var=0
null=false
range=0:134217727
zero=false
-port=system.membus.port[1]
+port=system.membus.master[1]
[system.simple_disk]
type=SimpleDisk
@@ -399,7 +402,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
-port=system.l2c.cpu_side system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side
+master=system.l2c.cpu_side
+slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side
[system.tsunami]
type=Tsunami
@@ -416,7 +420,7 @@ pio_latency=1000
platform=system.tsunami
system=system
terminal=system.terminal
-pio=system.iobus.port[25]
+pio=system.iobus.master[24]
[system.tsunami.cchip]
type=TsunamiCChip
@@ -424,7 +428,7 @@ pio_addr=8803072344064
pio_latency=1000
system=system
tsunami=system.tsunami
-pio=system.iobus.port[1]
+pio=system.iobus.master[0]
[system.tsunami.ethernet]
type=NSGigE
@@ -493,9 +497,9 @@ system=system
tx_delay=1000000
tx_fifo_size=524288
tx_thread=false
-config=system.iobus.port[30]
-dma=system.iobus.port[31]
-pio=system.iobus.port[29]
+config=system.iobus.master[28]
+dma=system.iobus.slave[2]
+pio=system.iobus.master[27]
[system.tsunami.fake_OROM]
type=IsaFake
@@ -511,7 +515,7 @@ ret_data8=255
system=system
update_data=false
warn_access=
-pio=system.iobus.port[9]
+pio=system.iobus.master[8]
[system.tsunami.fake_ata0]
type=IsaFake
@@ -527,7 +531,7 @@ ret_data8=255
system=system
update_data=false
warn_access=
-pio=system.iobus.port[20]
+pio=system.iobus.master[19]
[system.tsunami.fake_ata1]
type=IsaFake
@@ -543,7 +547,7 @@ ret_data8=255
system=system
update_data=false
warn_access=
-pio=system.iobus.port[21]
+pio=system.iobus.master[20]
[system.tsunami.fake_pnp_addr]
type=IsaFake
@@ -559,7 +563,7 @@ ret_data8=255
system=system
update_data=false
warn_access=
-pio=system.iobus.port[10]
+pio=system.iobus.master[9]
[system.tsunami.fake_pnp_read0]
type=IsaFake
@@ -575,7 +579,7 @@ ret_data8=255
system=system
update_data=false
warn_access=
-pio=system.iobus.port[12]
+pio=system.iobus.master[11]
[system.tsunami.fake_pnp_read1]
type=IsaFake
@@ -591,7 +595,7 @@ ret_data8=255
system=system
update_data=false
warn_access=
-pio=system.iobus.port[13]
+pio=system.iobus.master[12]
[system.tsunami.fake_pnp_read2]
type=IsaFake
@@ -607,7 +611,7 @@ ret_data8=255
system=system
update_data=false
warn_access=
-pio=system.iobus.port[14]
+pio=system.iobus.master[13]
[system.tsunami.fake_pnp_read3]
type=IsaFake
@@ -623,7 +627,7 @@ ret_data8=255
system=system
update_data=false
warn_access=
-pio=system.iobus.port[15]
+pio=system.iobus.master[14]
[system.tsunami.fake_pnp_read4]
type=IsaFake
@@ -639,7 +643,7 @@ ret_data8=255
system=system
update_data=false
warn_access=
-pio=system.iobus.port[16]
+pio=system.iobus.master[15]
[system.tsunami.fake_pnp_read5]
type=IsaFake
@@ -655,7 +659,7 @@ ret_data8=255
system=system
update_data=false
warn_access=
-pio=system.iobus.port[17]
+pio=system.iobus.master[16]
[system.tsunami.fake_pnp_read6]
type=IsaFake
@@ -671,7 +675,7 @@ ret_data8=255
system=system
update_data=false
warn_access=
-pio=system.iobus.port[18]
+pio=system.iobus.master[17]
[system.tsunami.fake_pnp_read7]
type=IsaFake
@@ -687,7 +691,7 @@ ret_data8=255
system=system
update_data=false
warn_access=
-pio=system.iobus.port[19]
+pio=system.iobus.master[18]
[system.tsunami.fake_pnp_write]
type=IsaFake
@@ -703,7 +707,7 @@ ret_data8=255
system=system
update_data=false
warn_access=
-pio=system.iobus.port[11]
+pio=system.iobus.master[10]
[system.tsunami.fake_ppc]
type=IsaFake
@@ -719,7 +723,7 @@ ret_data8=255
system=system
update_data=false
warn_access=
-pio=system.iobus.port[8]
+pio=system.iobus.master[7]
[system.tsunami.fake_sm_chip]
type=IsaFake
@@ -735,7 +739,7 @@ ret_data8=255
system=system
update_data=false
warn_access=
-pio=system.iobus.port[3]
+pio=system.iobus.master[2]
[system.tsunami.fake_uart1]
type=IsaFake
@@ -751,7 +755,7 @@ ret_data8=255
system=system
update_data=false
warn_access=
-pio=system.iobus.port[4]
+pio=system.iobus.master[3]
[system.tsunami.fake_uart2]
type=IsaFake
@@ -767,7 +771,7 @@ ret_data8=255
system=system
update_data=false
warn_access=
-pio=system.iobus.port[5]
+pio=system.iobus.master[4]
[system.tsunami.fake_uart3]
type=IsaFake
@@ -783,7 +787,7 @@ ret_data8=255
system=system
update_data=false
warn_access=
-pio=system.iobus.port[6]
+pio=system.iobus.master[5]
[system.tsunami.fake_uart4]
type=IsaFake
@@ -799,7 +803,7 @@ ret_data8=255
system=system
update_data=false
warn_access=
-pio=system.iobus.port[7]
+pio=system.iobus.master[6]
[system.tsunami.fb]
type=BadDevice
@@ -807,7 +811,7 @@ devicename=FrameBuffer
pio_addr=8804615848912
pio_latency=1000
system=system
-pio=system.iobus.port[22]
+pio=system.iobus.master[21]
[system.tsunami.ide]
type=IdeController
@@ -861,9 +865,9 @@ pci_func=0
pio_latency=1000
platform=system.tsunami
system=system
-config=system.iobus.port[27]
-dma=system.iobus.port[28]
-pio=system.iobus.port[26]
+config=system.iobus.master[26]
+dma=system.iobus.slave[1]
+pio=system.iobus.master[25]
[system.tsunami.io]
type=TsunamiIO
@@ -874,7 +878,7 @@ system=system
time=Thu Jan 1 00:00:00 2009
tsunami=system.tsunami
year_is_bcd=false
-pio=system.iobus.port[23]
+pio=system.iobus.master[22]
[system.tsunami.pchip]
type=TsunamiPChip
@@ -882,7 +886,7 @@ pio_addr=8802535473152
pio_latency=1000
system=system
tsunami=system.tsunami
-pio=system.iobus.port[2]
+pio=system.iobus.master[1]
[system.tsunami.pciconfig]
type=PciConfigAll
@@ -900,5 +904,5 @@ pio_latency=1000
platform=system.tsunami
system=system
terminal=system.terminal
-pio=system.iobus.port[24]
+pio=system.iobus.master[23]
diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/simout b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/simout
index b1f645266..dc632ce62 100755
--- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/simout
+++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/simout
@@ -1,12 +1,13 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Feb 11 2012 13:05:17
-gem5 started Feb 11 2012 13:10:02
-gem5 executing on zizzer
-command line: build/ALPHA/gem5.fast -d build/ALPHA/tests/fast/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual -re tests/run.py build/ALPHA/tests/fast/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual
+gem5 compiled May 8 2012 15:36:31
+gem5 started May 8 2012 15:41:25
+gem5 executing on piton
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual -re tests/run.py build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual
Global frequency set at 1000000000000 ticks per second
info: kernel located at: /dist/m5/system/binaries/vmlinux
+ 0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
info: Entering event queue @ 0. Starting simulation...
info: Launching CPU 1 @ 562628000
Exiting @ tick 1958647095000 because m5_exit instruction encountered
diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stats.txt b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stats.txt
index 565674386..7ab3bb0af 100644
--- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stats.txt
+++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 1.958647 # Nu
sim_ticks 1958647095000 # Number of ticks simulated
final_tick 1958647095000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 1989502 # Simulator instruction rate (inst/s)
-host_op_rate 1989500 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 65650485361 # Simulator tick rate (ticks/s)
-host_mem_usage 290388 # Number of bytes of host memory used
-host_seconds 29.83 # Real time elapsed on the host
+host_inst_rate 669282 # Simulator instruction rate (inst/s)
+host_op_rate 669282 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 22085281308 # Simulator tick rate (ticks/s)
+host_mem_usage 295084 # Number of bytes of host memory used
+host_seconds 88.69 # Real time elapsed on the host
sim_insts 59355643 # Number of instructions simulated
sim_ops 59355643 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 30050624 # Number of bytes read from this memory
@@ -178,8 +178,8 @@ system.l2c.blocked_cycles::no_mshrs 0 # nu
system.l2c.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.l2c.blocked::no_mshrs 0 # number of cycles access was blocked
system.l2c.blocked::no_targets 0 # number of cycles access was blocked
-system.l2c.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
-system.l2c.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked
+system.l2c.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
+system.l2c.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.l2c.fast_writes 0 # number of fast writes performed
system.l2c.cache_copies 0 # number of cache copies performed
system.l2c.writebacks::writebacks 119935 # number of writebacks
@@ -336,7 +336,7 @@ system.iocache.blocked_cycles::no_targets 0 # n
system.iocache.blocked::no_mshrs 10459 # number of cycles access was blocked
system.iocache.blocked::no_targets 0 # number of cycles access was blocked
system.iocache.avg_blocked_cycles::no_mshrs 6176.122765 # average number of cycles each access was blocked
-system.iocache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked
+system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.iocache.fast_writes 0 # number of fast writes performed
system.iocache.cache_copies 0 # number of cache copies performed
system.iocache.writebacks::writebacks 41520 # number of writebacks
@@ -514,8 +514,8 @@ system.cpu0.kern.mode_good::user 1283
system.cpu0.kern.mode_good::idle 0
system.cpu0.kern.mode_switch_good::kernel 0.175705 # fraction of useful protection mode switches
system.cpu0.kern.mode_switch_good::user 1 # fraction of useful protection mode switches
-system.cpu0.kern.mode_switch_good::idle no_value # fraction of useful protection mode switches
-system.cpu0.kern.mode_switch_good::total no_value # fraction of useful protection mode switches
+system.cpu0.kern.mode_switch_good::idle nan # fraction of useful protection mode switches
+system.cpu0.kern.mode_switch_good::total nan # fraction of useful protection mode switches
system.cpu0.kern.mode_ticks::kernel 1954355762000 99.83% 99.83% # number of ticks spent at the given mode
system.cpu0.kern.mode_ticks::user 3390072000 0.17% 100.00% # number of ticks spent at the given mode
system.cpu0.kern.mode_ticks::idle 0 0.00% 100.00% # number of ticks spent at the given mode
@@ -525,30 +525,30 @@ system.tsunami.ethernet.descDMAWrites 0 # Nu
system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA
system.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA
system.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU
-system.tsunami.ethernet.coalescedSwi no_value # average number of Swi's coalesced into each post
+system.tsunami.ethernet.coalescedSwi nan # average number of Swi's coalesced into each post
system.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR
system.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU
-system.tsunami.ethernet.coalescedRxIdle no_value # average number of RxIdle's coalesced into each post
+system.tsunami.ethernet.coalescedRxIdle nan # average number of RxIdle's coalesced into each post
system.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR
system.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU
-system.tsunami.ethernet.coalescedRxOk no_value # average number of RxOk's coalesced into each post
+system.tsunami.ethernet.coalescedRxOk nan # average number of RxOk's coalesced into each post
system.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR
system.tsunami.ethernet.postedRxDesc 0 # number of RxDesc interrupts posted to CPU
-system.tsunami.ethernet.coalescedRxDesc no_value # average number of RxDesc's coalesced into each post
+system.tsunami.ethernet.coalescedRxDesc nan # average number of RxDesc's coalesced into each post
system.tsunami.ethernet.totalRxDesc 0 # total number of RxDesc written to ISR
system.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU
-system.tsunami.ethernet.coalescedTxOk no_value # average number of TxOk's coalesced into each post
+system.tsunami.ethernet.coalescedTxOk nan # average number of TxOk's coalesced into each post
system.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR
system.tsunami.ethernet.postedTxIdle 0 # number of TxIdle interrupts posted to CPU
-system.tsunami.ethernet.coalescedTxIdle no_value # average number of TxIdle's coalesced into each post
+system.tsunami.ethernet.coalescedTxIdle nan # average number of TxIdle's coalesced into each post
system.tsunami.ethernet.totalTxIdle 0 # total number of TxIdle written to ISR
system.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU
-system.tsunami.ethernet.coalescedTxDesc no_value # average number of TxDesc's coalesced into each post
+system.tsunami.ethernet.coalescedTxDesc nan # average number of TxDesc's coalesced into each post
system.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR
system.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU
-system.tsunami.ethernet.coalescedRxOrn no_value # average number of RxOrn's coalesced into each post
+system.tsunami.ethernet.coalescedRxOrn nan # average number of RxOrn's coalesced into each post
system.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR
-system.tsunami.ethernet.coalescedTotal no_value # average number of interrupts coalesced into each post
+system.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post
system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU
system.tsunami.ethernet.droppedPackets 0 # number of packets dropped
system.cpu0.icache.replacements 915147 # number of replacements
@@ -594,8 +594,8 @@ system.cpu0.icache.blocked_cycles::no_mshrs 0 #
system.cpu0.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.cpu0.icache.blocked::no_mshrs 0 # number of cycles access was blocked
system.cpu0.icache.blocked::no_targets 0 # number of cycles access was blocked
-system.cpu0.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
-system.cpu0.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked
+system.cpu0.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
+system.cpu0.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu0.icache.fast_writes 0 # number of fast writes performed
system.cpu0.icache.cache_copies 0 # number of cache copies performed
system.cpu0.icache.writebacks::writebacks 55 # number of writebacks
@@ -692,8 +692,8 @@ system.cpu0.dcache.blocked_cycles::no_mshrs 0 #
system.cpu0.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.cpu0.dcache.blocked::no_mshrs 0 # number of cycles access was blocked
system.cpu0.dcache.blocked::no_targets 0 # number of cycles access was blocked
-system.cpu0.dcache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
-system.cpu0.dcache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked
+system.cpu0.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
+system.cpu0.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu0.dcache.fast_writes 0 # number of fast writes performed
system.cpu0.dcache.cache_copies 0 # number of cache copies performed
system.cpu0.dcache.writebacks::writebacks 786441 # number of writebacks
@@ -908,8 +908,8 @@ system.cpu1.icache.blocked_cycles::no_mshrs 0 #
system.cpu1.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.cpu1.icache.blocked::no_mshrs 0 # number of cycles access was blocked
system.cpu1.icache.blocked::no_targets 0 # number of cycles access was blocked
-system.cpu1.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
-system.cpu1.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked
+system.cpu1.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
+system.cpu1.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu1.icache.fast_writes 0 # number of fast writes performed
system.cpu1.icache.cache_copies 0 # number of cache copies performed
system.cpu1.icache.writebacks::writebacks 14 # number of writebacks
@@ -1006,8 +1006,8 @@ system.cpu1.dcache.blocked_cycles::no_mshrs 0 #
system.cpu1.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.cpu1.dcache.blocked::no_mshrs 0 # number of cycles access was blocked
system.cpu1.dcache.blocked::no_targets 0 # number of cycles access was blocked
-system.cpu1.dcache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
-system.cpu1.dcache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked
+system.cpu1.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
+system.cpu1.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu1.dcache.fast_writes 0 # number of fast writes performed
system.cpu1.dcache.cache_copies 0 # number of cache copies performed
system.cpu1.dcache.writebacks::writebacks 29784 # number of writebacks