stats: update stats for cache occupancy and clock domain changes

4 files changed, 192 insertions, 20 deletions

diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini
index 54bf6e928..161fac4a8 100644
--- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini
+++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini
@@ -1,7 +1,9 @@
 [root]
 type=Root
 children=system
+eventq_index=0
 full_system=true
+sim_quantum=0
 time_sync_enable=false
 time_sync_period=100000000000
 time_sync_spin_threshold=100000000
@@ -13,15 +15,16 @@ boot_cpu_frequency=500
 boot_osflags=root=/dev/hda1 console=ttyS0
 cache_line_size=64
 clk_domain=system.clk_domain
-console=/dist/m5/system/binaries/console
+console=/dist/binaries/console
+eventq_index=0
 init_param=0
-kernel=/dist/m5/system/binaries/vmlinux
+kernel=/dist/binaries/vmlinux
 load_addr_mask=1099511627775
 mem_mode=timing
 mem_ranges=0:134217727
 memories=system.physmem
 num_work_ids=16
-pal=/dist/m5/system/binaries/ts_osfpal
+pal=/dist/binaries/ts_osfpal
 readfile=tests/halt.sh
 symbolfile=
 system_rev=1024
@@ -39,6 +42,7 @@ system_port=system.membus.slave[0]
 type=Bridge
 clk_domain=system.clk_domain
 delay=50000
+eventq_index=0
 ranges=8796093022208:18446744073709551615
 req_size=16
 resp_size=16
@@ -48,6 +52,7 @@ slave=system.membus.master[0]
 [system.clk_domain]
 type=SrcClockDomain
 clock=1000
+eventq_index=0
 voltage_domain=system.voltage_domain
 
 [system.cpu]
@@ -60,6 +65,7 @@ do_checkpoint_insts=true
 do_quiesce=true
 do_statistics_insts=true
 dtb=system.cpu.dtb
+eventq_index=0
 function_trace=false
 function_trace_start=0
 interrupts=system.cpu.interrupts
@@ -86,6 +92,7 @@ children=tags
 addr_ranges=0:18446744073709551615
 assoc=4
 clk_domain=system.cpu_clk_domain
+eventq_index=0
 forward_snoops=true
 hit_latency=2
 is_top_level=true
@@ -94,6 +101,7 @@ mshrs=4
 prefetch_on_access=false
 prefetcher=Null
 response_latency=2
+sequential_access=false
 size=32768
 system=system
 tags=system.cpu.dcache.tags
@@ -108,11 +116,14 @@ type=LRU
 assoc=4
 block_size=64
 clk_domain=system.cpu_clk_domain
+eventq_index=0
 hit_latency=2
+sequential_access=false
 size=32768
 
 [system.cpu.dtb]
 type=AlphaTLB
+eventq_index=0
 size=64
 
 [system.cpu.icache]
@@ -121,6 +132,7 @@ children=tags
 addr_ranges=0:18446744073709551615
 assoc=1
 clk_domain=system.cpu_clk_domain
+eventq_index=0
 forward_snoops=true
 hit_latency=2
 is_top_level=true
@@ -129,6 +141,7 @@ mshrs=4
 prefetch_on_access=false
 prefetcher=Null
 response_latency=2
+sequential_access=false
 size=32768
 system=system
 tags=system.cpu.icache.tags
@@ -143,17 +156,23 @@ type=LRU
 assoc=1
 block_size=64
 clk_domain=system.cpu_clk_domain
+eventq_index=0
 hit_latency=2
+sequential_access=false
 size=32768
 
 [system.cpu.interrupts]
 type=AlphaInterrupts
+eventq_index=0
 
 [system.cpu.isa]
 type=AlphaISA
+eventq_index=0
+system=system
 
 [system.cpu.itb]
 type=AlphaTLB
+eventq_index=0
 size=48
 
 [system.cpu.l2cache]
@@ -162,6 +181,7 @@ children=tags
 addr_ranges=0:18446744073709551615
 assoc=8
 clk_domain=system.cpu_clk_domain
+eventq_index=0
 forward_snoops=true
 hit_latency=20
 is_top_level=false
@@ -170,6 +190,7 @@ mshrs=20
 prefetch_on_access=false
 prefetcher=Null
 response_latency=20
+sequential_access=false
 size=4194304
 system=system
 tags=system.cpu.l2cache.tags
@@ -184,12 +205,15 @@ type=LRU
 assoc=8
 block_size=64
 clk_domain=system.cpu_clk_domain
+eventq_index=0
 hit_latency=20
+sequential_access=false
 size=4194304
 
 [system.cpu.toL2Bus]
 type=CoherentBus
 clk_domain=system.cpu_clk_domain
+eventq_index=0
 header_cycles=1
 system=system
 use_default_range=false
@@ -199,10 +223,12 @@ slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
 
 [system.cpu.tracer]
 type=ExeTracer
+eventq_index=0
 
 [system.cpu_clk_domain]
 type=SrcClockDomain
 clock=500
+eventq_index=0
 voltage_domain=system.voltage_domain
 
 [system.disk0]
@@ -210,19 +236,22 @@ type=IdeDisk
 children=image
 delay=1000000
 driveID=master
+eventq_index=0
 image=system.disk0.image
 
 [system.disk0.image]
 type=CowDiskImage
 children=child
 child=system.disk0.image.child
+eventq_index=0
 image_file=
 read_only=false
 table_size=65536
 
 [system.disk0.image.child]
 type=RawDiskImage
-image_file=/dist/m5/system/disks/linux-latest.img
+eventq_index=0
+image_file=/dist/disks/linux-latest.img
 read_only=true
 
 [system.disk2]
@@ -230,28 +259,33 @@ type=IdeDisk
 children=image
 delay=1000000
 driveID=master
+eventq_index=0
 image=system.disk2.image
 
 [system.disk2.image]
 type=CowDiskImage
 children=child
 child=system.disk2.image.child
+eventq_index=0
 image_file=
 read_only=false
 table_size=65536
 
 [system.disk2.image.child]
 type=RawDiskImage
-image_file=/dist/m5/system/disks/linux-bigswap2.img
+eventq_index=0
+image_file=/dist/disks/linux-bigswap2.img
 read_only=true
 
 [system.intrctrl]
 type=IntrControl
+eventq_index=0
 sys=system
 
 [system.iobus]
 type=NoncoherentBus
 clk_domain=system.clk_domain
+eventq_index=0
 header_cycles=1
 use_default_range=true
 width=8
@@ -265,6 +299,7 @@ children=tags
 addr_ranges=0:134217727
 assoc=8
 clk_domain=system.clk_domain
+eventq_index=0
 forward_snoops=false
 hit_latency=50
 is_top_level=true
@@ -273,6 +308,7 @@ mshrs=20
 prefetch_on_access=false
 prefetcher=Null
 response_latency=50
+sequential_access=false
 size=1024
 system=system
 tags=system.iocache.tags
@@ -287,13 +323,16 @@ type=LRU
 assoc=8
 block_size=64
 clk_domain=system.clk_domain
+eventq_index=0
 hit_latency=50
+sequential_access=false
 size=1024
 
 [system.membus]
 type=CoherentBus
 children=badaddr_responder
 clk_domain=system.clk_domain
+eventq_index=0
 header_cycles=1
 system=system
 use_default_range=false
@@ -305,6 +344,7 @@ slave=system.system_port system.cpu.l2cache.mem_side system.iocache.mem_side
 [system.membus.badaddr_responder]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=0
 pio_latency=100000
@@ -331,6 +371,7 @@ conf_table_reported=true
 device_bus_width=8
 device_rowbuffer_size=1024
 devices_per_rank=8
+eventq_index=0
 in_addr_map=true
 mem_sched_policy=frfcfs
 null=false
@@ -342,29 +383,35 @@ static_backend_latency=10000
 static_frontend_latency=10000
 tBURST=5000
 tCL=13750
+tRAS=35000
 tRCD=13750
 tREFI=7800000
 tRFC=300000
 tRP=13750
+tRRD=6250
 tWTR=7500
 tXAW=40000
 write_buffer_size=32
-write_thresh_perc=70
+write_high_thresh_perc=70
+write_low_thresh_perc=0
 port=system.membus.master[1]
 
 [system.simple_disk]
 type=SimpleDisk
 children=disk
 disk=system.simple_disk.disk
+eventq_index=0
 system=system
 
 [system.simple_disk.disk]
 type=RawDiskImage
-image_file=/dist/m5/system/disks/linux-latest.img
+eventq_index=0
+image_file=/dist/disks/linux-latest.img
 read_only=true
 
 [system.terminal]
 type=Terminal
+eventq_index=0
 intr_control=system.intrctrl
 number=0
 output=true
@@ -373,6 +420,7 @@ port=3456
 [system.tsunami]
 type=Tsunami
 children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
+eventq_index=0
 intrctrl=system.intrctrl
 system=system
 
@@ -381,6 +429,7 @@ type=AlphaBackdoor
 clk_domain=system.clk_domain
 cpu=system.cpu
 disk=system.simple_disk
+eventq_index=0
 pio_addr=8804682956800
 pio_latency=100000
 platform=system.tsunami
@@ -391,6 +440,7 @@ pio=system.iobus.master[24]
 [system.tsunami.cchip]
 type=TsunamiCChip
 clk_domain=system.clk_domain
+eventq_index=0
 pio_addr=8803072344064
 pio_latency=100000
 system=system
@@ -419,6 +469,7 @@ BAR5LegacyIO=false
 BAR5Size=0
 BIST=0
 CacheLineSize=0
+CapabilityPtr=0
 CardbusCIS=0
 ClassCode=2
 Command=0
@@ -428,8 +479,40 @@ HeaderType=0
 InterruptLine=30
 InterruptPin=1
 LatencyTimer=0
+MSICAPBaseOffset=0
+MSICAPCapId=0
+MSICAPMaskBits=0
+MSICAPMsgAddr=0
+MSICAPMsgCtrl=0
+MSICAPMsgData=0
+MSICAPMsgUpperAddr=0
+MSICAPNextCapability=0
+MSICAPPendingBits=0
+MSIXCAPBaseOffset=0
+MSIXCAPCapId=0
+MSIXCAPNextCapability=0
+MSIXMsgCtrl=0
+MSIXPbaOffset=0
+MSIXTableOffset=0
 MaximumLatency=52
 MinimumGrant=176
+PMCAPBaseOffset=0
+PMCAPCapId=0
+PMCAPCapabilities=0
+PMCAPCtrlStatus=0
+PMCAPNextCapability=0
+PXCAPBaseOffset=0
+PXCAPCapId=0
+PXCAPCapabilities=0
+PXCAPDevCap2=0
+PXCAPDevCapabilities=0
+PXCAPDevCtrl=0
+PXCAPDevCtrl2=0
+PXCAPDevStatus=0
+PXCAPLinkCap=0
+PXCAPLinkCtrl=0
+PXCAPLinkStatus=0
+PXCAPNextCapability=0
 ProgIF=0
 Revision=0
 Status=656
@@ -446,6 +529,7 @@ dma_read_delay=0
 dma_read_factor=0
 dma_write_delay=0
 dma_write_factor=0
+eventq_index=0
 hardware_address=00:90:00:00:00:01
 intr_delay=10000000
 pci_bus=0
@@ -469,6 +553,7 @@ pio=system.iobus.master[27]
 [system.tsunami.fake_OROM]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=8796093677568
 pio_latency=100000
@@ -486,6 +571,7 @@ pio=system.iobus.master[8]
 [system.tsunami.fake_ata0]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=8804615848432
 pio_latency=100000
@@ -503,6 +589,7 @@ pio=system.iobus.master[19]
 [system.tsunami.fake_ata1]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=8804615848304
 pio_latency=100000
@@ -520,6 +607,7 @@ pio=system.iobus.master[20]
 [system.tsunami.fake_pnp_addr]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=8804615848569
 pio_latency=100000
@@ -537,6 +625,7 @@ pio=system.iobus.master[9]
 [system.tsunami.fake_pnp_read0]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=8804615848451
 pio_latency=100000
@@ -554,6 +643,7 @@ pio=system.iobus.master[11]
 [system.tsunami.fake_pnp_read1]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=8804615848515
 pio_latency=100000
@@ -571,6 +661,7 @@ pio=system.iobus.master[12]
 [system.tsunami.fake_pnp_read2]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=8804615848579
 pio_latency=100000
@@ -588,6 +679,7 @@ pio=system.iobus.master[13]
 [system.tsunami.fake_pnp_read3]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=8804615848643
 pio_latency=100000
@@ -605,6 +697,7 @@ pio=system.iobus.master[14]
 [system.tsunami.fake_pnp_read4]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=8804615848707
 pio_latency=100000
@@ -622,6 +715,7 @@ pio=system.iobus.master[15]
 [system.tsunami.fake_pnp_read5]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=8804615848771
 pio_latency=100000
@@ -639,6 +733,7 @@ pio=system.iobus.master[16]
 [system.tsunami.fake_pnp_read6]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=8804615848835
 pio_latency=100000
@@ -656,6 +751,7 @@ pio=system.iobus.master[17]
 [system.tsunami.fake_pnp_read7]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=8804615848899
 pio_latency=100000
@@ -673,6 +769,7 @@ pio=system.iobus.master[18]
 [system.tsunami.fake_pnp_write]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=8804615850617
 pio_latency=100000
@@ -690,6 +787,7 @@ pio=system.iobus.master[10]
 [system.tsunami.fake_ppc]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=8804615848891
 pio_latency=100000
@@ -707,6 +805,7 @@ pio=system.iobus.master[7]
 [system.tsunami.fake_sm_chip]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=8804615848816
 pio_latency=100000
@@ -724,6 +823,7 @@ pio=system.iobus.master[2]
 [system.tsunami.fake_uart1]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=8804615848696
 pio_latency=100000
@@ -741,6 +841,7 @@ pio=system.iobus.master[3]
 [system.tsunami.fake_uart2]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=8804615848936
 pio_latency=100000
@@ -758,6 +859,7 @@ pio=system.iobus.master[4]
 [system.tsunami.fake_uart3]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=8804615848680
 pio_latency=100000
@@ -775,6 +877,7 @@ pio=system.iobus.master[5]
 [system.tsunami.fake_uart4]
 type=IsaFake
 clk_domain=system.clk_domain
+eventq_index=0
 fake_mem=false
 pio_addr=8804615848944
 pio_latency=100000
@@ -793,6 +896,7 @@ pio=system.iobus.master[6]
 type=BadDevice
 clk_domain=system.clk_domain
 devicename=FrameBuffer
+eventq_index=0
 pio_addr=8804615848912
 pio_latency=100000
 system=system
@@ -820,6 +924,7 @@ BAR5LegacyIO=false
 BAR5Size=0
 BIST=0
 CacheLineSize=0
+CapabilityPtr=0
 CardbusCIS=0
 ClassCode=1
 Command=0
@@ -829,8 +934,40 @@ HeaderType=0
 InterruptLine=31
 InterruptPin=1
 LatencyTimer=0
+MSICAPBaseOffset=0
+MSICAPCapId=0
+MSICAPMaskBits=0
+MSICAPMsgAddr=0
+MSICAPMsgCtrl=0
+MSICAPMsgData=0
+MSICAPMsgUpperAddr=0
+MSICAPNextCapability=0
+MSICAPPendingBits=0
+MSIXCAPBaseOffset=0
+MSIXCAPCapId=0
+MSIXCAPNextCapability=0
+MSIXMsgCtrl=0
+MSIXPbaOffset=0
+MSIXTableOffset=0
 MaximumLatency=0
 MinimumGrant=0
+PMCAPBaseOffset=0
+PMCAPCapId=0
+PMCAPCapabilities=0
+PMCAPCtrlStatus=0
+PMCAPNextCapability=0
+PXCAPBaseOffset=0
+PXCAPCapId=0
+PXCAPCapabilities=0
+PXCAPDevCap2=0
+PXCAPDevCapabilities=0
+PXCAPDevCtrl=0
+PXCAPDevCtrl2=0
+PXCAPDevStatus=0
+PXCAPLinkCap=0
+PXCAPLinkCtrl=0
+PXCAPLinkStatus=0
+PXCAPNextCapability=0
 ProgIF=133
 Revision=0
 Status=640
@@ -842,6 +979,7 @@ clk_domain=system.clk_domain
 config_latency=20000
 ctrl_offset=0
 disks=system.disk0 system.disk2
+eventq_index=0
 io_shift=0
 pci_bus=0
 pci_dev=0
@@ -856,6 +994,7 @@ pio=system.iobus.master[25]
 [system.tsunami.io]
 type=TsunamiIO
 clk_domain=system.clk_domain
+eventq_index=0
 frequency=976562500
 pio_addr=8804615847936
 pio_latency=100000
@@ -868,6 +1007,7 @@ pio=system.iobus.master[22]
 [system.tsunami.pchip]
 type=TsunamiPChip
 clk_domain=system.clk_domain
+eventq_index=0
 pio_addr=8802535473152
 pio_latency=100000
 system=system
@@ -878,6 +1018,7 @@ pio=system.iobus.master[1]
 type=PciConfigAll
 bus=0
 clk_domain=system.clk_domain
+eventq_index=0
 pio_addr=0
 pio_latency=30000
 platform=system.tsunami
@@ -888,6 +1029,7 @@ pio=system.iobus.default
 [system.tsunami.uart]
 type=Uart8250
 clk_domain=system.clk_domain
+eventq_index=0
 pio_addr=8804615848952
 pio_latency=100000
 platform=system.tsunami
@@ -897,5 +1039,6 @@ pio=system.iobus.master[23]
 
 [system.voltage_domain]
 type=VoltageDomain
+eventq_index=0
 voltage=1.000000
 
diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simerr b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simerr
index 0bcb6e870..20fe2d682 100755
--- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simerr
+++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simerr
@@ -2,4 +2,3 @@ warn: Sockets disabled, not accepting terminal connections
 warn: Sockets disabled, not accepting gdb connections
 warn: Prefetch instructions in Alpha do not do anything
 warn: Prefetch instructions in Alpha do not do anything
-hack: be nice to actually delete the event here
diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simout b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simout
index cabc90a11..fa5fb8ad8 100755
--- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simout
+++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simout
@@ -1,14 +1,12 @@
-Redirecting stdout to build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing/simout
-Redirecting stderr to build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Sep 24 2013 03:08:53
-gem5 started Sep 28 2013 03:05:50
-gem5 executing on zizzer
+gem5 compiled Jan 22 2014 16:27:55
+gem5 started Jan 22 2014 17:24:48
+gem5 executing on u200540-lin
 command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing -re tests/run.py build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing
 Global frequency set at 1000000000000 ticks per second
-info: kernel located at: /dist/m5/system/binaries/vmlinux
+info: kernel located at: /dist/binaries/vmlinux
       0: system.tsunami.io.rtc: Real-time clock set to Thu Jan  1 00:00:00 2009
 info: Entering event queue @ 0.  Starting simulation...
-Exiting @ tick 1918473094000 because m5_exit instruction encountered
+Exiting @ tick 1920428041000 because m5_exit instruction encountered
diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stats.txt b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stats.txt
index 479e1f707..01b0606bd 100644
--- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stats.txt
+++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stats.txt
@@ -4,13 +4,15 @@ sim_seconds                                  1.920428                       # Nu
 sim_ticks                                1920428041000                       # Number of ticks simulated
 final_tick                               1920428041000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                1218375                       # Simulator instruction rate (inst/s)
-host_op_rate                                  1218374                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                            41646226437                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 305884                       # Number of bytes of host memory used
-host_seconds                                    46.11                       # Real time elapsed on the host
+host_inst_rate                                1405906                       # Simulator instruction rate (inst/s)
+host_op_rate                                  1405905                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                            48056353161                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 307800                       # Number of bytes of host memory used
+host_seconds                                    39.96                       # Real time elapsed on the host
 sim_insts                                    56182750                       # Number of instructions simulated
 sim_ops                                      56182750                       # Number of ops (including micro ops) simulated
+system.voltage_domain.voltage                       1                       # Voltage in Volts
+system.clk_domain.clock                          1000                       # Clock period in ticks
 system.physmem.bytes_read::cpu.inst            850688                       # Number of bytes read from this memory
 system.physmem.bytes_read::cpu.data          24846912                       # Number of bytes read from this memory
 system.physmem.bytes_read::tsunami.ide        2652352                       # Number of bytes read from this memory
@@ -414,6 +416,11 @@ system.iocache.tags.warmup_cycle         1753529489000                       # C
 system.iocache.tags.occ_blocks::tsunami.ide     1.352288                       # Average occupied blocks per requestor
 system.iocache.tags.occ_percent::tsunami.ide     0.084518                       # Average percentage of cache occupancy
 system.iocache.tags.occ_percent::total       0.084518                       # Average percentage of cache occupancy
+system.iocache.tags.occ_task_id_blocks::1023           16                       # Occupied blocks per task id
+system.iocache.tags.age_task_id_blocks_1023::3           16                       # Occupied blocks per task id
+system.iocache.tags.occ_task_id_percent::1023            1                       # Percentage of cache occupancy per task id
+system.iocache.tags.tag_accesses               375525                       # Number of tag accesses
+system.iocache.tags.data_accesses              375525                       # Number of data accesses
 system.iocache.ReadReq_misses::tsunami.ide          173                       # number of ReadReq misses
 system.iocache.ReadReq_misses::total              173                       # number of ReadReq misses
 system.iocache.WriteReq_misses::tsunami.ide        41552                       # number of WriteReq misses
@@ -509,6 +516,7 @@ system.disk2.dma_read_txs                           0                       # Nu
 system.disk2.dma_write_full_pages                   1                       # Number of full page size DMA writes.
 system.disk2.dma_write_bytes                     8192                       # Number of bytes transfered via DMA writes.
 system.disk2.dma_write_txs                          1                       # Number of DMA write transactions.
+system.cpu_clk_domain.clock                       500                       # Clock period in ticks
 system.cpu.dtb.fetch_hits                           0                       # ITB hits
 system.cpu.dtb.fetch_misses                         0                       # ITB misses
 system.cpu.dtb.fetch_acv                            0                       # ITB acv
@@ -756,6 +764,14 @@ system.cpu.icache.tags.warmup_cycle       39723654250                       # Cy
 system.cpu.icache.tags.occ_blocks::cpu.inst   508.321671                       # Average occupied blocks per requestor
 system.cpu.icache.tags.occ_percent::cpu.inst     0.992816                       # Average percentage of cache occupancy
 system.cpu.icache.tags.occ_percent::total     0.992816                       # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_task_id_blocks::1024          511                       # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::0           63                       # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::1            1                       # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::2          438                       # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::3            9                       # Occupied blocks per task id
+system.cpu.icache.tags.occ_task_id_percent::1024     0.998047                       # Percentage of cache occupancy per task id
+system.cpu.icache.tags.tag_accesses          57123599                       # Number of tag accesses
+system.cpu.icache.tags.data_accesses         57123599                       # Number of data accesses
 system.cpu.icache.ReadReq_hits::cpu.inst     55265541                       # number of ReadReq hits
 system.cpu.icache.ReadReq_hits::total        55265541                       # number of ReadReq hits
 system.cpu.icache.demand_hits::cpu.inst      55265541                       # number of demand (read+write) hits
@@ -838,6 +854,15 @@ system.cpu.l2cache.tags.occ_percent::writebacks     0.848127
 system.cpu.l2cache.tags.occ_percent::cpu.inst     0.072615                       # Average percentage of cache occupancy
 system.cpu.l2cache.tags.occ_percent::cpu.data     0.075609                       # Average percentage of cache occupancy
 system.cpu.l2cache.tags.occ_percent::total     0.996351                       # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_task_id_blocks::1024        65162                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::0          178                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::1         1050                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::2         4896                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::3         3257                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::4        55781                       # Occupied blocks per task id
+system.cpu.l2cache.tags.occ_task_id_percent::1024     0.994293                       # Percentage of cache occupancy per task id
+system.cpu.l2cache.tags.tag_accesses         25947571                       # Number of tag accesses
+system.cpu.l2cache.tags.data_accesses        25947571                       # Number of data accesses
 system.cpu.l2cache.ReadReq_hits::cpu.inst       915717                       # number of ReadReq hits
 system.cpu.l2cache.ReadReq_hits::cpu.data       814814                       # number of ReadReq hits
 system.cpu.l2cache.ReadReq_hits::total        1730531                       # number of ReadReq hits
@@ -1004,6 +1029,13 @@ system.cpu.dcache.tags.warmup_cycle         107298250                       # Cy
 system.cpu.dcache.tags.occ_blocks::cpu.data   511.978915                       # Average occupied blocks per requestor
 system.cpu.dcache.tags.occ_percent::cpu.data     0.999959                       # Average percentage of cache occupancy
 system.cpu.dcache.tags.occ_percent::total     0.999959                       # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_task_id_blocks::1024          512                       # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::0          187                       # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::1          257                       # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::2           68                       # Occupied blocks per task id
+system.cpu.dcache.tags.occ_task_id_percent::1024            1                       # Percentage of cache occupancy per task id
+system.cpu.dcache.tags.tag_accesses          63152102                       # Number of tag accesses
+system.cpu.dcache.tags.data_accesses         63152102                       # Number of data accesses
 system.cpu.dcache.ReadReq_hits::cpu.data      7814622                       # number of ReadReq hits
 system.cpu.dcache.ReadReq_hits::total         7814622                       # number of ReadReq hits
 system.cpu.dcache.WriteReq_hits::cpu.data      5852326                       # number of WriteReq hits