diff options
| author | Nathan Binkert <nate@binkert.org> | 2012-05-09 11:52:14 -0700 |
|---|---|---|
| committer | Nathan Binkert <nate@binkert.org> | 2012-05-09 11:52:14 -0700 |
| commit | 4a644767c58754339965cecc5d85853255652a30 (patch) | |
| tree | e435caa3b1ba7f5e395c58ca0fdfdfa91804d2dd /tests/quick/fs/10.linux-boot/ref/alpha | |
| parent | 55411f7f713a42f67552a9621051fae8f7869648 (diff) | |
| download | gem5-4a644767c58754339965cecc5d85853255652a30.tar.xz | |
stats: update stats for no_value -> nan
Lots of accumulated older changes too.
Diffstat (limited to 'tests/quick/fs/10.linux-boot/ref/alpha')
12 files changed, 345 insertions, 322 deletions
diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini index ab088d9ce..631fa3b25 100644 --- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini +++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini @@ -19,7 +19,6 @@ mem_mode=atomic memories=system.physmem num_work_ids=16 pal=/dist/m5/system/binaries/ts_osfpal -physmem=system.physmem readfile=tests/halt.sh symbolfile= system_rev=1024 @@ -31,7 +30,7 @@ work_cpus_ckpt_count=0 work_end_ckpt_count=0 work_end_exit_count=0 work_item_id=-1 -system_port=system.membus.port[2] +system_port=system.membus.slave[0] [system.bridge] type=Bridge @@ -41,8 +40,8 @@ ranges=8796093022208:18446744073709551615 req_size=16 resp_size=16 write_ack=false -master=system.iobus.port[0] -slave=system.membus.port[0] +master=system.iobus.slave[0] +slave=system.membus.master[0] [system.cpu0] type=AtomicSimpleCPU @@ -55,6 +54,7 @@ do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true dtb=system.cpu0.dtb +fastmem=false function_trace=false function_trace_start=0 interrupts=system.cpu0.interrupts @@ -78,7 +78,7 @@ icache_port=system.cpu0.icache.cpu_side [system.cpu0.dcache] type=BaseCache -addr_range=0:18446744073709551615 +addr_ranges=0:18446744073709551615 assoc=4 block_size=64 forward_snoops=true @@ -99,7 +99,7 @@ trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.cpu0.dcache_port -mem_side=system.toL2Bus.port[2] +mem_side=system.toL2Bus.slave[1] [system.cpu0.dtb] type=AlphaTLB @@ -107,7 +107,7 @@ size=64 [system.cpu0.icache] type=BaseCache -addr_range=0:18446744073709551615 +addr_ranges=0:18446744073709551615 assoc=1 block_size=64 forward_snoops=true @@ -128,7 +128,7 @@ trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.cpu0.icache_port -mem_side=system.toL2Bus.port[1] +mem_side=system.toL2Bus.slave[0] [system.cpu0.interrupts] type=AlphaInterrupts @@ -151,6 +151,7 @@ do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true dtb=system.cpu1.dtb +fastmem=false function_trace=false function_trace_start=0 interrupts=system.cpu1.interrupts @@ -174,7 +175,7 @@ icache_port=system.cpu1.icache.cpu_side [system.cpu1.dcache] type=BaseCache -addr_range=0:18446744073709551615 +addr_ranges=0:18446744073709551615 assoc=4 block_size=64 forward_snoops=true @@ -195,7 +196,7 @@ trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.cpu1.dcache_port -mem_side=system.toL2Bus.port[4] +mem_side=system.toL2Bus.slave[3] [system.cpu1.dtb] type=AlphaTLB @@ -203,7 +204,7 @@ size=64 [system.cpu1.icache] type=BaseCache -addr_range=0:18446744073709551615 +addr_ranges=0:18446744073709551615 assoc=1 block_size=64 forward_snoops=true @@ -224,7 +225,7 @@ trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.cpu1.icache_port -mem_side=system.toL2Bus.port[3] +mem_side=system.toL2Bus.slave[2] [system.cpu1.interrupts] type=AlphaInterrupts @@ -289,11 +290,12 @@ header_cycles=1 use_default_range=true width=64 default=system.tsunami.pciconfig.pio -port=system.bridge.master system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ide.dma system.tsunami.ethernet.pio system.tsunami.ethernet.config system.tsunami.ethernet.dma system.iocache.cpu_side +master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side +slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma [system.iocache] type=BaseCache -addr_range=0:8589934591 +addr_ranges=0:8589934591 assoc=8 block_size=64 forward_snoops=false @@ -313,12 +315,12 @@ tgts_per_mshr=12 trace_addr=0 two_queue=false write_buffers=8 -cpu_side=system.iobus.port[32] -mem_side=system.membus.port[3] +cpu_side=system.iobus.master[29] +mem_side=system.membus.slave[1] [system.l2c] type=BaseCache -addr_range=0:18446744073709551615 +addr_ranges=0:18446744073709551615 assoc=8 block_size=64 forward_snoops=true @@ -338,8 +340,8 @@ tgts_per_mshr=16 trace_addr=0 two_queue=false write_buffers=8 -cpu_side=system.toL2Bus.port[0] -mem_side=system.membus.port[4] +cpu_side=system.toL2Bus.master[0] +mem_side=system.membus.slave[2] [system.membus] type=Bus @@ -351,7 +353,8 @@ header_cycles=1 use_default_range=false width=64 default=system.membus.badaddr_responder.pio -port=system.bridge.slave system.physmem.port[0] system.system_port system.iocache.mem_side system.l2c.mem_side +master=system.bridge.slave system.physmem.port[0] +slave=system.system_port system.iocache.mem_side system.l2c.mem_side [system.membus.badaddr_responder] type=IsaFake @@ -370,14 +373,16 @@ warn_access= pio=system.membus.default [system.physmem] -type=PhysicalMemory +type=SimpleMemory +conf_table_reported=false file= +in_addr_map=true latency=30000 latency_var=0 null=false range=0:134217727 zero=false -port=system.membus.port[1] +port=system.membus.master[1] [system.simple_disk] type=SimpleDisk @@ -405,7 +410,8 @@ clock=1000 header_cycles=1 use_default_range=false width=64 -port=system.l2c.cpu_side system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side +master=system.l2c.cpu_side +slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side [system.tsunami] type=Tsunami @@ -422,7 +428,7 @@ pio_latency=1000 platform=system.tsunami system=system terminal=system.terminal -pio=system.iobus.port[25] +pio=system.iobus.master[24] [system.tsunami.cchip] type=TsunamiCChip @@ -430,7 +436,7 @@ pio_addr=8803072344064 pio_latency=1000 system=system tsunami=system.tsunami -pio=system.iobus.port[1] +pio=system.iobus.master[0] [system.tsunami.ethernet] type=NSGigE @@ -499,9 +505,9 @@ system=system tx_delay=1000000 tx_fifo_size=524288 tx_thread=false -config=system.iobus.port[30] -dma=system.iobus.port[31] -pio=system.iobus.port[29] +config=system.iobus.master[28] +dma=system.iobus.slave[2] +pio=system.iobus.master[27] [system.tsunami.fake_OROM] type=IsaFake @@ -517,7 +523,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[9] +pio=system.iobus.master[8] [system.tsunami.fake_ata0] type=IsaFake @@ -533,7 +539,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[20] +pio=system.iobus.master[19] [system.tsunami.fake_ata1] type=IsaFake @@ -549,7 +555,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[21] +pio=system.iobus.master[20] [system.tsunami.fake_pnp_addr] type=IsaFake @@ -565,7 +571,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[10] +pio=system.iobus.master[9] [system.tsunami.fake_pnp_read0] type=IsaFake @@ -581,7 +587,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[12] +pio=system.iobus.master[11] [system.tsunami.fake_pnp_read1] type=IsaFake @@ -597,7 +603,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[13] +pio=system.iobus.master[12] [system.tsunami.fake_pnp_read2] type=IsaFake @@ -613,7 +619,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[14] +pio=system.iobus.master[13] [system.tsunami.fake_pnp_read3] type=IsaFake @@ -629,7 +635,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[15] +pio=system.iobus.master[14] [system.tsunami.fake_pnp_read4] type=IsaFake @@ -645,7 +651,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[16] +pio=system.iobus.master[15] [system.tsunami.fake_pnp_read5] type=IsaFake @@ -661,7 +667,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[17] +pio=system.iobus.master[16] [system.tsunami.fake_pnp_read6] type=IsaFake @@ -677,7 +683,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[18] +pio=system.iobus.master[17] [system.tsunami.fake_pnp_read7] type=IsaFake @@ -693,7 +699,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[19] +pio=system.iobus.master[18] [system.tsunami.fake_pnp_write] type=IsaFake @@ -709,7 +715,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[11] +pio=system.iobus.master[10] [system.tsunami.fake_ppc] type=IsaFake @@ -725,7 +731,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[8] +pio=system.iobus.master[7] [system.tsunami.fake_sm_chip] type=IsaFake @@ -741,7 +747,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[3] +pio=system.iobus.master[2] [system.tsunami.fake_uart1] type=IsaFake @@ -757,7 +763,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[4] +pio=system.iobus.master[3] [system.tsunami.fake_uart2] type=IsaFake @@ -773,7 +779,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[5] +pio=system.iobus.master[4] [system.tsunami.fake_uart3] type=IsaFake @@ -789,7 +795,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[6] +pio=system.iobus.master[5] [system.tsunami.fake_uart4] type=IsaFake @@ -805,7 +811,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[7] +pio=system.iobus.master[6] [system.tsunami.fb] type=BadDevice @@ -813,7 +819,7 @@ devicename=FrameBuffer pio_addr=8804615848912 pio_latency=1000 system=system -pio=system.iobus.port[22] +pio=system.iobus.master[21] [system.tsunami.ide] type=IdeController @@ -867,9 +873,9 @@ pci_func=0 pio_latency=1000 platform=system.tsunami system=system -config=system.iobus.port[27] -dma=system.iobus.port[28] -pio=system.iobus.port[26] +config=system.iobus.master[26] +dma=system.iobus.slave[1] +pio=system.iobus.master[25] [system.tsunami.io] type=TsunamiIO @@ -880,7 +886,7 @@ system=system time=Thu Jan 1 00:00:00 2009 tsunami=system.tsunami year_is_bcd=false -pio=system.iobus.port[23] +pio=system.iobus.master[22] [system.tsunami.pchip] type=TsunamiPChip @@ -888,7 +894,7 @@ pio_addr=8802535473152 pio_latency=1000 system=system tsunami=system.tsunami -pio=system.iobus.port[2] +pio=system.iobus.master[1] [system.tsunami.pciconfig] type=PciConfigAll @@ -906,5 +912,5 @@ pio_latency=1000 platform=system.tsunami system=system terminal=system.terminal -pio=system.iobus.port[24] +pio=system.iobus.master[23] diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/simout b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/simout index 78e725520..8c9800a70 100755 --- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/simout +++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/simout @@ -1,12 +1,13 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Feb 11 2012 13:05:17 -gem5 started Feb 11 2012 13:09:36 -gem5 executing on zizzer -command line: build/ALPHA/gem5.fast -d build/ALPHA/tests/fast/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic-dual -re tests/run.py build/ALPHA/tests/fast/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic-dual +gem5 compiled May 8 2012 15:36:31 +gem5 started May 8 2012 15:36:56 +gem5 executing on piton +command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic-dual -re tests/run.py build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic-dual Global frequency set at 1000000000000 ticks per second info: kernel located at: /dist/m5/system/binaries/vmlinux + 0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009 info: Entering event queue @ 0. Starting simulation... info: Launching CPU 1 @ 97861500 Exiting @ tick 1870335522500 because m5_exit instruction encountered diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stats.txt b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stats.txt index a6953794d..b34633a17 100644 --- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stats.txt +++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stats.txt @@ -4,11 +4,11 @@ sim_seconds 1.870336 # Nu sim_ticks 1870335522500 # Number of ticks simulated final_tick 1870335522500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 4204751 # Simulator instruction rate (inst/s) -host_op_rate 4204746 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 124525337361 # Simulator tick rate (ticks/s) -host_mem_usage 293604 # Number of bytes of host memory used -host_seconds 15.02 # Real time elapsed on the host +host_inst_rate 1989571 # Simulator instruction rate (inst/s) +host_op_rate 1989570 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 58921958204 # Simulator tick rate (ticks/s) +host_mem_usage 298304 # Number of bytes of host memory used +host_seconds 31.74 # Real time elapsed on the host sim_insts 63154034 # Number of instructions simulated sim_ops 63154034 # Number of ops (including micro ops) simulated system.physmem.bytes_read 72297472 # Number of bytes read from this memory @@ -136,8 +136,8 @@ system.l2c.blocked_cycles::no_mshrs 0 # nu system.l2c.blocked_cycles::no_targets 0 # number of cycles access was blocked system.l2c.blocked::no_mshrs 0 # number of cycles access was blocked system.l2c.blocked::no_targets 0 # number of cycles access was blocked -system.l2c.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.l2c.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.l2c.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.l2c.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.l2c.fast_writes 0 # number of fast writes performed system.l2c.cache_copies 0 # number of cache copies performed system.l2c.writebacks::writebacks 121798 # number of writebacks @@ -176,8 +176,8 @@ system.iocache.blocked_cycles::no_mshrs 0 # nu system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked system.iocache.blocked::no_targets 0 # number of cycles access was blocked -system.iocache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.iocache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.iocache.fast_writes 0 # number of fast writes performed system.iocache.cache_copies 0 # number of cache copies performed system.iocache.writebacks::writebacks 41520 # number of writebacks @@ -332,8 +332,8 @@ system.cpu0.kern.mode_good::user 1158 system.cpu0.kern.mode_good::idle 0 system.cpu0.kern.mode_switch_good::kernel 0.163165 # fraction of useful protection mode switches system.cpu0.kern.mode_switch_good::user 1 # fraction of useful protection mode switches -system.cpu0.kern.mode_switch_good::idle no_value # fraction of useful protection mode switches -system.cpu0.kern.mode_switch_good::total no_value # fraction of useful protection mode switches +system.cpu0.kern.mode_switch_good::idle nan # fraction of useful protection mode switches +system.cpu0.kern.mode_switch_good::total nan # fraction of useful protection mode switches system.cpu0.kern.mode_ticks::kernel 1869378305000 99.95% 99.95% # number of ticks spent at the given mode system.cpu0.kern.mode_ticks::user 957009000 0.05% 100.00% # number of ticks spent at the given mode system.cpu0.kern.mode_ticks::idle 0 0.00% 100.00% # number of ticks spent at the given mode @@ -343,30 +343,30 @@ system.tsunami.ethernet.descDMAWrites 0 # Nu system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA system.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA system.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU -system.tsunami.ethernet.coalescedSwi no_value # average number of Swi's coalesced into each post +system.tsunami.ethernet.coalescedSwi nan # average number of Swi's coalesced into each post system.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR system.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU -system.tsunami.ethernet.coalescedRxIdle no_value # average number of RxIdle's coalesced into each post +system.tsunami.ethernet.coalescedRxIdle nan # average number of RxIdle's coalesced into each post system.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR system.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU -system.tsunami.ethernet.coalescedRxOk no_value # average number of RxOk's coalesced into each post +system.tsunami.ethernet.coalescedRxOk nan # average number of RxOk's coalesced into each post system.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR system.tsunami.ethernet.postedRxDesc 0 # number of RxDesc interrupts posted to CPU -system.tsunami.ethernet.coalescedRxDesc no_value # average number of RxDesc's coalesced into each post +system.tsunami.ethernet.coalescedRxDesc nan # average number of RxDesc's coalesced into each post system.tsunami.ethernet.totalRxDesc 0 # total number of RxDesc written to ISR system.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU -system.tsunami.ethernet.coalescedTxOk no_value # average number of TxOk's coalesced into each post +system.tsunami.ethernet.coalescedTxOk nan # average number of TxOk's coalesced into each post system.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR system.tsunami.ethernet.postedTxIdle 0 # number of TxIdle interrupts posted to CPU -system.tsunami.ethernet.coalescedTxIdle no_value # average number of TxIdle's coalesced into each post +system.tsunami.ethernet.coalescedTxIdle nan # average number of TxIdle's coalesced into each post system.tsunami.ethernet.totalTxIdle 0 # total number of TxIdle written to ISR system.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU -system.tsunami.ethernet.coalescedTxDesc no_value # average number of TxDesc's coalesced into each post +system.tsunami.ethernet.coalescedTxDesc nan # average number of TxDesc's coalesced into each post system.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR system.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU -system.tsunami.ethernet.coalescedRxOrn no_value # average number of RxOrn's coalesced into each post +system.tsunami.ethernet.coalescedRxOrn nan # average number of RxOrn's coalesced into each post system.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR -system.tsunami.ethernet.coalescedTotal no_value # average number of interrupts coalesced into each post +system.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU system.tsunami.ethernet.droppedPackets 0 # number of packets dropped system.cpu0.icache.replacements 884404 # number of replacements @@ -403,8 +403,8 @@ system.cpu0.icache.blocked_cycles::no_mshrs 0 # system.cpu0.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu0.icache.blocked::no_mshrs 0 # number of cycles access was blocked system.cpu0.icache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu0.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.cpu0.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu0.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu0.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu0.icache.fast_writes 0 # number of fast writes performed system.cpu0.icache.cache_copies 0 # number of cache copies performed system.cpu0.icache.writebacks::writebacks 95 # number of writebacks @@ -465,8 +465,8 @@ system.cpu0.dcache.blocked_cycles::no_mshrs 0 # system.cpu0.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu0.dcache.blocked::no_mshrs 0 # number of cycles access was blocked system.cpu0.dcache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu0.dcache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.cpu0.dcache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu0.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu0.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu0.dcache.fast_writes 0 # number of fast writes performed system.cpu0.dcache.cache_copies 0 # number of cache copies performed system.cpu0.dcache.writebacks::writebacks 771740 # number of writebacks @@ -632,8 +632,8 @@ system.cpu1.icache.blocked_cycles::no_mshrs 0 # system.cpu1.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu1.icache.blocked::no_mshrs 0 # number of cycles access was blocked system.cpu1.icache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu1.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.cpu1.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu1.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu1.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu1.icache.fast_writes 0 # number of fast writes performed system.cpu1.icache.cache_copies 0 # number of cache copies performed system.cpu1.icache.writebacks::writebacks 15 # number of writebacks @@ -694,8 +694,8 @@ system.cpu1.dcache.blocked_cycles::no_mshrs 0 # system.cpu1.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu1.dcache.blocked::no_mshrs 0 # number of cycles access was blocked system.cpu1.dcache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu1.dcache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.cpu1.dcache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu1.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu1.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu1.dcache.fast_writes 0 # number of fast writes performed system.cpu1.dcache.cache_copies 0 # number of cache copies performed system.cpu1.dcache.writebacks::writebacks 39996 # number of writebacks diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini index 435421de9..3d4adbd35 100644 --- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini +++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini @@ -19,7 +19,6 @@ mem_mode=atomic memories=system.physmem num_work_ids=16 pal=/dist/m5/system/binaries/ts_osfpal -physmem=system.physmem readfile=tests/halt.sh symbolfile= system_rev=1024 @@ -31,7 +30,7 @@ work_cpus_ckpt_count=0 work_end_ckpt_count=0 work_end_exit_count=0 work_item_id=-1 -system_port=system.membus.port[2] +system_port=system.membus.slave[0] [system.bridge] type=Bridge @@ -41,8 +40,8 @@ ranges=8796093022208:18446744073709551615 req_size=16 resp_size=16 write_ack=false -master=system.iobus.port[0] -slave=system.membus.port[0] +master=system.iobus.slave[0] +slave=system.membus.master[0] [system.cpu] type=AtomicSimpleCPU @@ -55,6 +54,7 @@ do_checkpoint_insts=true do_quiesce=true do_statistics_insts=true dtb=system.cpu.dtb +fastmem=false function_trace=false function_trace_start=0 interrupts=system.cpu.interrupts @@ -78,7 +78,7 @@ icache_port=system.cpu.icache.cpu_side [system.cpu.dcache] type=BaseCache -addr_range=0:18446744073709551615 +addr_ranges=0:18446744073709551615 assoc=4 block_size=64 forward_snoops=true @@ -99,7 +99,7 @@ trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.cpu.dcache_port -mem_side=system.toL2Bus.port[2] +mem_side=system.toL2Bus.slave[1] [system.cpu.dtb] type=AlphaTLB @@ -107,7 +107,7 @@ size=64 [system.cpu.icache] type=BaseCache -addr_range=0:18446744073709551615 +addr_ranges=0:18446744073709551615 assoc=1 block_size=64 forward_snoops=true @@ -128,7 +128,7 @@ trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.cpu.icache_port -mem_side=system.toL2Bus.port[1] +mem_side=system.toL2Bus.slave[0] [system.cpu.interrupts] type=AlphaInterrupts @@ -193,11 +193,12 @@ header_cycles=1 use_default_range=true width=64 default=system.tsunami.pciconfig.pio -port=system.bridge.master system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ide.dma system.tsunami.ethernet.pio system.tsunami.ethernet.config system.tsunami.ethernet.dma system.iocache.cpu_side +master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side +slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma [system.iocache] type=BaseCache -addr_range=0:8589934591 +addr_ranges=0:8589934591 assoc=8 block_size=64 forward_snoops=false @@ -217,12 +218,12 @@ tgts_per_mshr=12 trace_addr=0 two_queue=false write_buffers=8 -cpu_side=system.iobus.port[32] -mem_side=system.membus.port[3] +cpu_side=system.iobus.master[29] +mem_side=system.membus.slave[1] [system.l2c] type=BaseCache -addr_range=0:18446744073709551615 +addr_ranges=0:18446744073709551615 assoc=8 block_size=64 forward_snoops=true @@ -242,8 +243,8 @@ tgts_per_mshr=16 trace_addr=0 two_queue=false write_buffers=8 -cpu_side=system.toL2Bus.port[0] -mem_side=system.membus.port[4] +cpu_side=system.toL2Bus.master[0] +mem_side=system.membus.slave[2] [system.membus] type=Bus @@ -255,7 +256,8 @@ header_cycles=1 use_default_range=false width=64 default=system.membus.badaddr_responder.pio -port=system.bridge.slave system.physmem.port[0] system.system_port system.iocache.mem_side system.l2c.mem_side +master=system.bridge.slave system.physmem.port[0] +slave=system.system_port system.iocache.mem_side system.l2c.mem_side [system.membus.badaddr_responder] type=IsaFake @@ -274,14 +276,16 @@ warn_access= pio=system.membus.default [system.physmem] -type=PhysicalMemory +type=SimpleMemory +conf_table_reported=false file= +in_addr_map=true latency=30000 latency_var=0 null=false range=0:134217727 zero=false -port=system.membus.port[1] +port=system.membus.master[1] [system.simple_disk] type=SimpleDisk @@ -309,7 +313,8 @@ clock=1000 header_cycles=1 use_default_range=false width=64 -port=system.l2c.cpu_side system.cpu.icache.mem_side system.cpu.dcache.mem_side +master=system.l2c.cpu_side +slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side [system.tsunami] type=Tsunami @@ -326,7 +331,7 @@ pio_latency=1000 platform=system.tsunami system=system terminal=system.terminal -pio=system.iobus.port[25] +pio=system.iobus.master[24] [system.tsunami.cchip] type=TsunamiCChip @@ -334,7 +339,7 @@ pio_addr=8803072344064 pio_latency=1000 system=system tsunami=system.tsunami -pio=system.iobus.port[1] +pio=system.iobus.master[0] [system.tsunami.ethernet] type=NSGigE @@ -403,9 +408,9 @@ system=system tx_delay=1000000 tx_fifo_size=524288 tx_thread=false -config=system.iobus.port[30] -dma=system.iobus.port[31] -pio=system.iobus.port[29] +config=system.iobus.master[28] +dma=system.iobus.slave[2] +pio=system.iobus.master[27] [system.tsunami.fake_OROM] type=IsaFake @@ -421,7 +426,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[9] +pio=system.iobus.master[8] [system.tsunami.fake_ata0] type=IsaFake @@ -437,7 +442,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[20] +pio=system.iobus.master[19] [system.tsunami.fake_ata1] type=IsaFake @@ -453,7 +458,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[21] +pio=system.iobus.master[20] [system.tsunami.fake_pnp_addr] type=IsaFake @@ -469,7 +474,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[10] +pio=system.iobus.master[9] [system.tsunami.fake_pnp_read0] type=IsaFake @@ -485,7 +490,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[12] +pio=system.iobus.master[11] [system.tsunami.fake_pnp_read1] type=IsaFake @@ -501,7 +506,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[13] +pio=system.iobus.master[12] [system.tsunami.fake_pnp_read2] type=IsaFake @@ -517,7 +522,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[14] +pio=system.iobus.master[13] [system.tsunami.fake_pnp_read3] type=IsaFake @@ -533,7 +538,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[15] +pio=system.iobus.master[14] [system.tsunami.fake_pnp_read4] type=IsaFake @@ -549,7 +554,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[16] +pio=system.iobus.master[15] [system.tsunami.fake_pnp_read5] type=IsaFake @@ -565,7 +570,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[17] +pio=system.iobus.master[16] [system.tsunami.fake_pnp_read6] type=IsaFake @@ -581,7 +586,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[18] +pio=system.iobus.master[17] [system.tsunami.fake_pnp_read7] type=IsaFake @@ -597,7 +602,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[19] +pio=system.iobus.master[18] [system.tsunami.fake_pnp_write] type=IsaFake @@ -613,7 +618,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[11] +pio=system.iobus.master[10] [system.tsunami.fake_ppc] type=IsaFake @@ -629,7 +634,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[8] +pio=system.iobus.master[7] [system.tsunami.fake_sm_chip] type=IsaFake @@ -645,7 +650,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[3] +pio=system.iobus.master[2] [system.tsunami.fake_uart1] type=IsaFake @@ -661,7 +666,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[4] +pio=system.iobus.master[3] [system.tsunami.fake_uart2] type=IsaFake @@ -677,7 +682,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[5] +pio=system.iobus.master[4] [system.tsunami.fake_uart3] type=IsaFake @@ -693,7 +698,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[6] +pio=system.iobus.master[5] [system.tsunami.fake_uart4] type=IsaFake @@ -709,7 +714,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[7] +pio=system.iobus.master[6] [system.tsunami.fb] type=BadDevice @@ -717,7 +722,7 @@ devicename=FrameBuffer pio_addr=8804615848912 pio_latency=1000 system=system -pio=system.iobus.port[22] +pio=system.iobus.master[21] [system.tsunami.ide] type=IdeController @@ -771,9 +776,9 @@ pci_func=0 pio_latency=1000 platform=system.tsunami system=system -config=system.iobus.port[27] -dma=system.iobus.port[28] -pio=system.iobus.port[26] +config=system.iobus.master[26] +dma=system.iobus.slave[1] +pio=system.iobus.master[25] [system.tsunami.io] type=TsunamiIO @@ -784,7 +789,7 @@ system=system time=Thu Jan 1 00:00:00 2009 tsunami=system.tsunami year_is_bcd=false -pio=system.iobus.port[23] +pio=system.iobus.master[22] [system.tsunami.pchip] type=TsunamiPChip @@ -792,7 +797,7 @@ pio_addr=8802535473152 pio_latency=1000 system=system tsunami=system.tsunami -pio=system.iobus.port[2] +pio=system.iobus.master[1] [system.tsunami.pciconfig] type=PciConfigAll @@ -810,5 +815,5 @@ pio_latency=1000 platform=system.tsunami system=system terminal=system.terminal -pio=system.iobus.port[24] +pio=system.iobus.master[23] diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simout b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simout index 484a5fec9..f348f1381 100755 --- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simout +++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simout @@ -1,11 +1,12 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Feb 11 2012 13:05:17 -gem5 started Feb 11 2012 13:09:36 -gem5 executing on zizzer -command line: build/ALPHA/gem5.fast -d build/ALPHA/tests/fast/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic -re tests/run.py build/ALPHA/tests/fast/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic +gem5 compiled May 8 2012 15:36:31 +gem5 started May 8 2012 15:42:39 +gem5 executing on piton +command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic -re tests/run.py build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-atomic Global frequency set at 1000000000000 ticks per second info: kernel located at: /dist/m5/system/binaries/vmlinux + 0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009 info: Entering event queue @ 0. Starting simulation... Exiting @ tick 1829332258000 because m5_exit instruction encountered diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt index d300de39a..1b6d7ca40 100644 --- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt +++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt @@ -4,11 +4,11 @@ sim_seconds 1.829332 # Nu sim_ticks 1829332258000 # Number of ticks simulated final_tick 1829332258000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 4111639 # Simulator instruction rate (inst/s) -host_op_rate 4111633 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 125278906724 # Simulator tick rate (ticks/s) -host_mem_usage 291412 # Number of bytes of host memory used -host_seconds 14.60 # Real time elapsed on the host +host_inst_rate 1921293 # Simulator instruction rate (inst/s) +host_op_rate 1921291 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 58540553267 # Simulator tick rate (ticks/s) +host_mem_usage 295828 # Number of bytes of host memory used +host_seconds 31.25 # Real time elapsed on the host sim_insts 60038305 # Number of instructions simulated sim_ops 60038305 # Number of ops (including micro ops) simulated system.physmem.bytes_read 71650816 # Number of bytes read from this memory @@ -89,8 +89,8 @@ system.l2c.blocked_cycles::no_mshrs 0 # nu system.l2c.blocked_cycles::no_targets 0 # number of cycles access was blocked system.l2c.blocked::no_mshrs 0 # number of cycles access was blocked system.l2c.blocked::no_targets 0 # number of cycles access was blocked -system.l2c.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.l2c.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.l2c.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.l2c.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.l2c.fast_writes 0 # number of fast writes performed system.l2c.cache_copies 0 # number of cache copies performed system.l2c.writebacks::writebacks 117189 # number of writebacks @@ -129,8 +129,8 @@ system.iocache.blocked_cycles::no_mshrs 0 # nu system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked system.iocache.blocked::no_targets 0 # number of cycles access was blocked -system.iocache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.iocache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.iocache.fast_writes 0 # number of fast writes performed system.iocache.cache_copies 0 # number of cache copies performed system.iocache.writebacks::writebacks 41512 # number of writebacks @@ -291,30 +291,30 @@ system.tsunami.ethernet.descDMAWrites 0 # Nu system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA system.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA system.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU -system.tsunami.ethernet.coalescedSwi no_value # average number of Swi's coalesced into each post +system.tsunami.ethernet.coalescedSwi nan # average number of Swi's coalesced into each post system.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR system.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU -system.tsunami.ethernet.coalescedRxIdle no_value # average number of RxIdle's coalesced into each post +system.tsunami.ethernet.coalescedRxIdle nan # average number of RxIdle's coalesced into each post system.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR system.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU -system.tsunami.ethernet.coalescedRxOk no_value # average number of RxOk's coalesced into each post +system.tsunami.ethernet.coalescedRxOk nan # average number of RxOk's coalesced into each post system.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR system.tsunami.ethernet.postedRxDesc 0 # number of RxDesc interrupts posted to CPU -system.tsunami.ethernet.coalescedRxDesc no_value # average number of RxDesc's coalesced into each post +system.tsunami.ethernet.coalescedRxDesc nan # average number of RxDesc's coalesced into each post system.tsunami.ethernet.totalRxDesc 0 # total number of RxDesc written to ISR system.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU -system.tsunami.ethernet.coalescedTxOk no_value # average number of TxOk's coalesced into each post +system.tsunami.ethernet.coalescedTxOk nan # average number of TxOk's coalesced into each post system.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR system.tsunami.ethernet.postedTxIdle 0 # number of TxIdle interrupts posted to CPU -system.tsunami.ethernet.coalescedTxIdle no_value # average number of TxIdle's coalesced into each post +system.tsunami.ethernet.coalescedTxIdle nan # average number of TxIdle's coalesced into each post system.tsunami.ethernet.totalTxIdle 0 # total number of TxIdle written to ISR system.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU -system.tsunami.ethernet.coalescedTxDesc no_value # average number of TxDesc's coalesced into each post +system.tsunami.ethernet.coalescedTxDesc nan # average number of TxDesc's coalesced into each post system.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR system.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU -system.tsunami.ethernet.coalescedRxOrn no_value # average number of RxOrn's coalesced into each post +system.tsunami.ethernet.coalescedRxOrn nan # average number of RxOrn's coalesced into each post system.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR -system.tsunami.ethernet.coalescedTotal no_value # average number of interrupts coalesced into each post +system.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU system.tsunami.ethernet.droppedPackets 0 # number of packets dropped system.cpu.icache.replacements 919594 # number of replacements @@ -351,8 +351,8 @@ system.cpu.icache.blocked_cycles::no_mshrs 0 # system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.cpu.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu.icache.fast_writes 0 # number of fast writes performed system.cpu.icache.cache_copies 0 # number of cache copies performed system.cpu.icache.writebacks::writebacks 108 # number of writebacks @@ -410,8 +410,8 @@ system.cpu.dcache.blocked_cycles::no_mshrs 0 # system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu.dcache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.cpu.dcache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu.dcache.fast_writes 0 # number of fast writes performed system.cpu.dcache.cache_copies 0 # number of cache copies performed system.cpu.dcache.writebacks::writebacks 825183 # number of writebacks diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini index 110cfac39..6299f010e 100644 --- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini +++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini @@ -19,7 +19,6 @@ mem_mode=timing memories=system.physmem num_work_ids=16 pal=/dist/m5/system/binaries/ts_osfpal -physmem=system.physmem readfile=tests/halt.sh symbolfile= system_rev=1024 @@ -31,7 +30,7 @@ work_cpus_ckpt_count=0 work_end_ckpt_count=0 work_end_exit_count=0 work_item_id=-1 -system_port=system.membus.port[2] +system_port=system.membus.slave[0] [system.bridge] type=Bridge @@ -41,8 +40,8 @@ ranges=8796093022208:18446744073709551615 req_size=16 resp_size=16 write_ack=false -master=system.iobus.port[0] -slave=system.membus.port[0] +master=system.iobus.slave[0] +slave=system.membus.master[0] [system.cpu0] type=TimingSimpleCPU @@ -75,7 +74,7 @@ icache_port=system.cpu0.icache.cpu_side [system.cpu0.dcache] type=BaseCache -addr_range=0:18446744073709551615 +addr_ranges=0:18446744073709551615 assoc=4 block_size=64 forward_snoops=true @@ -96,7 +95,7 @@ trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.cpu0.dcache_port -mem_side=system.toL2Bus.port[2] +mem_side=system.toL2Bus.slave[1] [system.cpu0.dtb] type=AlphaTLB @@ -104,7 +103,7 @@ size=64 [system.cpu0.icache] type=BaseCache -addr_range=0:18446744073709551615 +addr_ranges=0:18446744073709551615 assoc=1 block_size=64 forward_snoops=true @@ -125,7 +124,7 @@ trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.cpu0.icache_port -mem_side=system.toL2Bus.port[1] +mem_side=system.toL2Bus.slave[0] [system.cpu0.interrupts] type=AlphaInterrupts @@ -168,7 +167,7 @@ icache_port=system.cpu1.icache.cpu_side [system.cpu1.dcache] type=BaseCache -addr_range=0:18446744073709551615 +addr_ranges=0:18446744073709551615 assoc=4 block_size=64 forward_snoops=true @@ -189,7 +188,7 @@ trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.cpu1.dcache_port -mem_side=system.toL2Bus.port[4] +mem_side=system.toL2Bus.slave[3] [system.cpu1.dtb] type=AlphaTLB @@ -197,7 +196,7 @@ size=64 [system.cpu1.icache] type=BaseCache -addr_range=0:18446744073709551615 +addr_ranges=0:18446744073709551615 assoc=1 block_size=64 forward_snoops=true @@ -218,7 +217,7 @@ trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.cpu1.icache_port -mem_side=system.toL2Bus.port[3] +mem_side=system.toL2Bus.slave[2] [system.cpu1.interrupts] type=AlphaInterrupts @@ -283,11 +282,12 @@ header_cycles=1 use_default_range=true width=64 default=system.tsunami.pciconfig.pio -port=system.bridge.master system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ide.dma system.tsunami.ethernet.pio system.tsunami.ethernet.config system.tsunami.ethernet.dma system.iocache.cpu_side +master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side +slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma [system.iocache] type=BaseCache -addr_range=0:8589934591 +addr_ranges=0:8589934591 assoc=8 block_size=64 forward_snoops=false @@ -307,12 +307,12 @@ tgts_per_mshr=12 trace_addr=0 two_queue=false write_buffers=8 -cpu_side=system.iobus.port[32] -mem_side=system.membus.port[3] +cpu_side=system.iobus.master[29] +mem_side=system.membus.slave[1] [system.l2c] type=BaseCache -addr_range=0:18446744073709551615 +addr_ranges=0:18446744073709551615 assoc=8 block_size=64 forward_snoops=true @@ -332,8 +332,8 @@ tgts_per_mshr=16 trace_addr=0 two_queue=false write_buffers=8 -cpu_side=system.toL2Bus.port[0] -mem_side=system.membus.port[4] +cpu_side=system.toL2Bus.master[0] +mem_side=system.membus.slave[2] [system.membus] type=Bus @@ -345,7 +345,8 @@ header_cycles=1 use_default_range=false width=64 default=system.membus.badaddr_responder.pio -port=system.bridge.slave system.physmem.port[0] system.system_port system.iocache.mem_side system.l2c.mem_side +master=system.bridge.slave system.physmem.port[0] +slave=system.system_port system.iocache.mem_side system.l2c.mem_side [system.membus.badaddr_responder] type=IsaFake @@ -364,14 +365,16 @@ warn_access= pio=system.membus.default [system.physmem] -type=PhysicalMemory +type=SimpleMemory +conf_table_reported=false file= +in_addr_map=true latency=30000 latency_var=0 null=false range=0:134217727 zero=false -port=system.membus.port[1] +port=system.membus.master[1] [system.simple_disk] type=SimpleDisk @@ -399,7 +402,8 @@ clock=1000 header_cycles=1 use_default_range=false width=64 -port=system.l2c.cpu_side system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side +master=system.l2c.cpu_side +slave=system.cpu0.icache.mem_side system.cpu0.dcache.mem_side system.cpu1.icache.mem_side system.cpu1.dcache.mem_side [system.tsunami] type=Tsunami @@ -416,7 +420,7 @@ pio_latency=1000 platform=system.tsunami system=system terminal=system.terminal -pio=system.iobus.port[25] +pio=system.iobus.master[24] [system.tsunami.cchip] type=TsunamiCChip @@ -424,7 +428,7 @@ pio_addr=8803072344064 pio_latency=1000 system=system tsunami=system.tsunami -pio=system.iobus.port[1] +pio=system.iobus.master[0] [system.tsunami.ethernet] type=NSGigE @@ -493,9 +497,9 @@ system=system tx_delay=1000000 tx_fifo_size=524288 tx_thread=false -config=system.iobus.port[30] -dma=system.iobus.port[31] -pio=system.iobus.port[29] +config=system.iobus.master[28] +dma=system.iobus.slave[2] +pio=system.iobus.master[27] [system.tsunami.fake_OROM] type=IsaFake @@ -511,7 +515,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[9] +pio=system.iobus.master[8] [system.tsunami.fake_ata0] type=IsaFake @@ -527,7 +531,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[20] +pio=system.iobus.master[19] [system.tsunami.fake_ata1] type=IsaFake @@ -543,7 +547,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[21] +pio=system.iobus.master[20] [system.tsunami.fake_pnp_addr] type=IsaFake @@ -559,7 +563,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[10] +pio=system.iobus.master[9] [system.tsunami.fake_pnp_read0] type=IsaFake @@ -575,7 +579,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[12] +pio=system.iobus.master[11] [system.tsunami.fake_pnp_read1] type=IsaFake @@ -591,7 +595,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[13] +pio=system.iobus.master[12] [system.tsunami.fake_pnp_read2] type=IsaFake @@ -607,7 +611,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[14] +pio=system.iobus.master[13] [system.tsunami.fake_pnp_read3] type=IsaFake @@ -623,7 +627,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[15] +pio=system.iobus.master[14] [system.tsunami.fake_pnp_read4] type=IsaFake @@ -639,7 +643,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[16] +pio=system.iobus.master[15] [system.tsunami.fake_pnp_read5] type=IsaFake @@ -655,7 +659,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[17] +pio=system.iobus.master[16] [system.tsunami.fake_pnp_read6] type=IsaFake @@ -671,7 +675,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[18] +pio=system.iobus.master[17] [system.tsunami.fake_pnp_read7] type=IsaFake @@ -687,7 +691,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[19] +pio=system.iobus.master[18] [system.tsunami.fake_pnp_write] type=IsaFake @@ -703,7 +707,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[11] +pio=system.iobus.master[10] [system.tsunami.fake_ppc] type=IsaFake @@ -719,7 +723,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[8] +pio=system.iobus.master[7] [system.tsunami.fake_sm_chip] type=IsaFake @@ -735,7 +739,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[3] +pio=system.iobus.master[2] [system.tsunami.fake_uart1] type=IsaFake @@ -751,7 +755,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[4] +pio=system.iobus.master[3] [system.tsunami.fake_uart2] type=IsaFake @@ -767,7 +771,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[5] +pio=system.iobus.master[4] [system.tsunami.fake_uart3] type=IsaFake @@ -783,7 +787,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[6] +pio=system.iobus.master[5] [system.tsunami.fake_uart4] type=IsaFake @@ -799,7 +803,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[7] +pio=system.iobus.master[6] [system.tsunami.fb] type=BadDevice @@ -807,7 +811,7 @@ devicename=FrameBuffer pio_addr=8804615848912 pio_latency=1000 system=system -pio=system.iobus.port[22] +pio=system.iobus.master[21] [system.tsunami.ide] type=IdeController @@ -861,9 +865,9 @@ pci_func=0 pio_latency=1000 platform=system.tsunami system=system -config=system.iobus.port[27] -dma=system.iobus.port[28] -pio=system.iobus.port[26] +config=system.iobus.master[26] +dma=system.iobus.slave[1] +pio=system.iobus.master[25] [system.tsunami.io] type=TsunamiIO @@ -874,7 +878,7 @@ system=system time=Thu Jan 1 00:00:00 2009 tsunami=system.tsunami year_is_bcd=false -pio=system.iobus.port[23] +pio=system.iobus.master[22] [system.tsunami.pchip] type=TsunamiPChip @@ -882,7 +886,7 @@ pio_addr=8802535473152 pio_latency=1000 system=system tsunami=system.tsunami -pio=system.iobus.port[2] +pio=system.iobus.master[1] [system.tsunami.pciconfig] type=PciConfigAll @@ -900,5 +904,5 @@ pio_latency=1000 platform=system.tsunami system=system terminal=system.terminal -pio=system.iobus.port[24] +pio=system.iobus.master[23] diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/simout b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/simout index b1f645266..dc632ce62 100755 --- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/simout +++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/simout @@ -1,12 +1,13 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Feb 11 2012 13:05:17 -gem5 started Feb 11 2012 13:10:02 -gem5 executing on zizzer -command line: build/ALPHA/gem5.fast -d build/ALPHA/tests/fast/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual -re tests/run.py build/ALPHA/tests/fast/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual +gem5 compiled May 8 2012 15:36:31 +gem5 started May 8 2012 15:41:25 +gem5 executing on piton +command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual -re tests/run.py build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing-dual Global frequency set at 1000000000000 ticks per second info: kernel located at: /dist/m5/system/binaries/vmlinux + 0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009 info: Entering event queue @ 0. Starting simulation... info: Launching CPU 1 @ 562628000 Exiting @ tick 1958647095000 because m5_exit instruction encountered diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stats.txt b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stats.txt index 565674386..7ab3bb0af 100644 --- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stats.txt +++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stats.txt @@ -4,11 +4,11 @@ sim_seconds 1.958647 # Nu sim_ticks 1958647095000 # Number of ticks simulated final_tick 1958647095000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 1989502 # Simulator instruction rate (inst/s) -host_op_rate 1989500 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 65650485361 # Simulator tick rate (ticks/s) -host_mem_usage 290388 # Number of bytes of host memory used -host_seconds 29.83 # Real time elapsed on the host +host_inst_rate 669282 # Simulator instruction rate (inst/s) +host_op_rate 669282 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 22085281308 # Simulator tick rate (ticks/s) +host_mem_usage 295084 # Number of bytes of host memory used +host_seconds 88.69 # Real time elapsed on the host sim_insts 59355643 # Number of instructions simulated sim_ops 59355643 # Number of ops (including micro ops) simulated system.physmem.bytes_read 30050624 # Number of bytes read from this memory @@ -178,8 +178,8 @@ system.l2c.blocked_cycles::no_mshrs 0 # nu system.l2c.blocked_cycles::no_targets 0 # number of cycles access was blocked system.l2c.blocked::no_mshrs 0 # number of cycles access was blocked system.l2c.blocked::no_targets 0 # number of cycles access was blocked -system.l2c.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.l2c.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.l2c.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.l2c.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.l2c.fast_writes 0 # number of fast writes performed system.l2c.cache_copies 0 # number of cache copies performed system.l2c.writebacks::writebacks 119935 # number of writebacks @@ -336,7 +336,7 @@ system.iocache.blocked_cycles::no_targets 0 # n system.iocache.blocked::no_mshrs 10459 # number of cycles access was blocked system.iocache.blocked::no_targets 0 # number of cycles access was blocked system.iocache.avg_blocked_cycles::no_mshrs 6176.122765 # average number of cycles each access was blocked -system.iocache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.iocache.fast_writes 0 # number of fast writes performed system.iocache.cache_copies 0 # number of cache copies performed system.iocache.writebacks::writebacks 41520 # number of writebacks @@ -514,8 +514,8 @@ system.cpu0.kern.mode_good::user 1283 system.cpu0.kern.mode_good::idle 0 system.cpu0.kern.mode_switch_good::kernel 0.175705 # fraction of useful protection mode switches system.cpu0.kern.mode_switch_good::user 1 # fraction of useful protection mode switches -system.cpu0.kern.mode_switch_good::idle no_value # fraction of useful protection mode switches -system.cpu0.kern.mode_switch_good::total no_value # fraction of useful protection mode switches +system.cpu0.kern.mode_switch_good::idle nan # fraction of useful protection mode switches +system.cpu0.kern.mode_switch_good::total nan # fraction of useful protection mode switches system.cpu0.kern.mode_ticks::kernel 1954355762000 99.83% 99.83% # number of ticks spent at the given mode system.cpu0.kern.mode_ticks::user 3390072000 0.17% 100.00% # number of ticks spent at the given mode system.cpu0.kern.mode_ticks::idle 0 0.00% 100.00% # number of ticks spent at the given mode @@ -525,30 +525,30 @@ system.tsunami.ethernet.descDMAWrites 0 # Nu system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA system.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA system.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU -system.tsunami.ethernet.coalescedSwi no_value # average number of Swi's coalesced into each post +system.tsunami.ethernet.coalescedSwi nan # average number of Swi's coalesced into each post system.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR system.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU -system.tsunami.ethernet.coalescedRxIdle no_value # average number of RxIdle's coalesced into each post +system.tsunami.ethernet.coalescedRxIdle nan # average number of RxIdle's coalesced into each post system.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR system.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU -system.tsunami.ethernet.coalescedRxOk no_value # average number of RxOk's coalesced into each post +system.tsunami.ethernet.coalescedRxOk nan # average number of RxOk's coalesced into each post system.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR system.tsunami.ethernet.postedRxDesc 0 # number of RxDesc interrupts posted to CPU -system.tsunami.ethernet.coalescedRxDesc no_value # average number of RxDesc's coalesced into each post +system.tsunami.ethernet.coalescedRxDesc nan # average number of RxDesc's coalesced into each post system.tsunami.ethernet.totalRxDesc 0 # total number of RxDesc written to ISR system.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU -system.tsunami.ethernet.coalescedTxOk no_value # average number of TxOk's coalesced into each post +system.tsunami.ethernet.coalescedTxOk nan # average number of TxOk's coalesced into each post system.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR system.tsunami.ethernet.postedTxIdle 0 # number of TxIdle interrupts posted to CPU -system.tsunami.ethernet.coalescedTxIdle no_value # average number of TxIdle's coalesced into each post +system.tsunami.ethernet.coalescedTxIdle nan # average number of TxIdle's coalesced into each post system.tsunami.ethernet.totalTxIdle 0 # total number of TxIdle written to ISR system.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU -system.tsunami.ethernet.coalescedTxDesc no_value # average number of TxDesc's coalesced into each post +system.tsunami.ethernet.coalescedTxDesc nan # average number of TxDesc's coalesced into each post system.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR system.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU -system.tsunami.ethernet.coalescedRxOrn no_value # average number of RxOrn's coalesced into each post +system.tsunami.ethernet.coalescedRxOrn nan # average number of RxOrn's coalesced into each post system.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR -system.tsunami.ethernet.coalescedTotal no_value # average number of interrupts coalesced into each post +system.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU system.tsunami.ethernet.droppedPackets 0 # number of packets dropped system.cpu0.icache.replacements 915147 # number of replacements @@ -594,8 +594,8 @@ system.cpu0.icache.blocked_cycles::no_mshrs 0 # system.cpu0.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu0.icache.blocked::no_mshrs 0 # number of cycles access was blocked system.cpu0.icache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu0.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.cpu0.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu0.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu0.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu0.icache.fast_writes 0 # number of fast writes performed system.cpu0.icache.cache_copies 0 # number of cache copies performed system.cpu0.icache.writebacks::writebacks 55 # number of writebacks @@ -692,8 +692,8 @@ system.cpu0.dcache.blocked_cycles::no_mshrs 0 # system.cpu0.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu0.dcache.blocked::no_mshrs 0 # number of cycles access was blocked system.cpu0.dcache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu0.dcache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.cpu0.dcache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu0.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu0.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu0.dcache.fast_writes 0 # number of fast writes performed system.cpu0.dcache.cache_copies 0 # number of cache copies performed system.cpu0.dcache.writebacks::writebacks 786441 # number of writebacks @@ -908,8 +908,8 @@ system.cpu1.icache.blocked_cycles::no_mshrs 0 # system.cpu1.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu1.icache.blocked::no_mshrs 0 # number of cycles access was blocked system.cpu1.icache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu1.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.cpu1.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu1.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu1.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu1.icache.fast_writes 0 # number of fast writes performed system.cpu1.icache.cache_copies 0 # number of cache copies performed system.cpu1.icache.writebacks::writebacks 14 # number of writebacks @@ -1006,8 +1006,8 @@ system.cpu1.dcache.blocked_cycles::no_mshrs 0 # system.cpu1.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu1.dcache.blocked::no_mshrs 0 # number of cycles access was blocked system.cpu1.dcache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu1.dcache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.cpu1.dcache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu1.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu1.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu1.dcache.fast_writes 0 # number of fast writes performed system.cpu1.dcache.cache_copies 0 # number of cache copies performed system.cpu1.dcache.writebacks::writebacks 29784 # number of writebacks diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini index c8fe39e38..d5815e263 100644 --- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini +++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini @@ -19,7 +19,6 @@ mem_mode=timing memories=system.physmem num_work_ids=16 pal=/dist/m5/system/binaries/ts_osfpal -physmem=system.physmem readfile=tests/halt.sh symbolfile= system_rev=1024 @@ -31,7 +30,7 @@ work_cpus_ckpt_count=0 work_end_ckpt_count=0 work_end_exit_count=0 work_item_id=-1 -system_port=system.membus.port[2] +system_port=system.membus.slave[0] [system.bridge] type=Bridge @@ -41,8 +40,8 @@ ranges=8796093022208:18446744073709551615 req_size=16 resp_size=16 write_ack=false -master=system.iobus.port[0] -slave=system.membus.port[0] +master=system.iobus.slave[0] +slave=system.membus.master[0] [system.cpu] type=TimingSimpleCPU @@ -75,7 +74,7 @@ icache_port=system.cpu.icache.cpu_side [system.cpu.dcache] type=BaseCache -addr_range=0:18446744073709551615 +addr_ranges=0:18446744073709551615 assoc=4 block_size=64 forward_snoops=true @@ -96,7 +95,7 @@ trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.cpu.dcache_port -mem_side=system.toL2Bus.port[2] +mem_side=system.toL2Bus.slave[1] [system.cpu.dtb] type=AlphaTLB @@ -104,7 +103,7 @@ size=64 [system.cpu.icache] type=BaseCache -addr_range=0:18446744073709551615 +addr_ranges=0:18446744073709551615 assoc=1 block_size=64 forward_snoops=true @@ -125,7 +124,7 @@ trace_addr=0 two_queue=false write_buffers=8 cpu_side=system.cpu.icache_port -mem_side=system.toL2Bus.port[1] +mem_side=system.toL2Bus.slave[0] [system.cpu.interrupts] type=AlphaInterrupts @@ -190,11 +189,12 @@ header_cycles=1 use_default_range=true width=64 default=system.tsunami.pciconfig.pio -port=system.bridge.master system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ide.dma system.tsunami.ethernet.pio system.tsunami.ethernet.config system.tsunami.ethernet.dma system.iocache.cpu_side +master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_chip.pio system.tsunami.fake_uart1.pio system.tsunami.fake_uart2.pio system.tsunami.fake_uart3.pio system.tsunami.fake_uart4.pio system.tsunami.fake_ppc.pio system.tsunami.fake_OROM.pio system.tsunami.fake_pnp_addr.pio system.tsunami.fake_pnp_write.pio system.tsunami.fake_pnp_read0.pio system.tsunami.fake_pnp_read1.pio system.tsunami.fake_pnp_read2.pio system.tsunami.fake_pnp_read3.pio system.tsunami.fake_pnp_read4.pio system.tsunami.fake_pnp_read5.pio system.tsunami.fake_pnp_read6.pio system.tsunami.fake_pnp_read7.pio system.tsunami.fake_ata0.pio system.tsunami.fake_ata1.pio system.tsunami.fb.pio system.tsunami.io.pio system.tsunami.uart.pio system.tsunami.backdoor.pio system.tsunami.ide.pio system.tsunami.ide.config system.tsunami.ethernet.pio system.tsunami.ethernet.config system.iocache.cpu_side +slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma [system.iocache] type=BaseCache -addr_range=0:8589934591 +addr_ranges=0:8589934591 assoc=8 block_size=64 forward_snoops=false @@ -214,12 +214,12 @@ tgts_per_mshr=12 trace_addr=0 two_queue=false write_buffers=8 -cpu_side=system.iobus.port[32] -mem_side=system.membus.port[3] +cpu_side=system.iobus.master[29] +mem_side=system.membus.slave[1] [system.l2c] type=BaseCache -addr_range=0:18446744073709551615 +addr_ranges=0:18446744073709551615 assoc=8 block_size=64 forward_snoops=true @@ -239,8 +239,8 @@ tgts_per_mshr=16 trace_addr=0 two_queue=false write_buffers=8 -cpu_side=system.toL2Bus.port[0] -mem_side=system.membus.port[4] +cpu_side=system.toL2Bus.master[0] +mem_side=system.membus.slave[2] [system.membus] type=Bus @@ -252,7 +252,8 @@ header_cycles=1 use_default_range=false width=64 default=system.membus.badaddr_responder.pio -port=system.bridge.slave system.physmem.port[0] system.system_port system.iocache.mem_side system.l2c.mem_side +master=system.bridge.slave system.physmem.port[0] +slave=system.system_port system.iocache.mem_side system.l2c.mem_side [system.membus.badaddr_responder] type=IsaFake @@ -271,14 +272,16 @@ warn_access= pio=system.membus.default [system.physmem] -type=PhysicalMemory +type=SimpleMemory +conf_table_reported=false file= +in_addr_map=true latency=30000 latency_var=0 null=false range=0:134217727 zero=false -port=system.membus.port[1] +port=system.membus.master[1] [system.simple_disk] type=SimpleDisk @@ -306,7 +309,8 @@ clock=1000 header_cycles=1 use_default_range=false width=64 -port=system.l2c.cpu_side system.cpu.icache.mem_side system.cpu.dcache.mem_side +master=system.l2c.cpu_side +slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side [system.tsunami] type=Tsunami @@ -323,7 +327,7 @@ pio_latency=1000 platform=system.tsunami system=system terminal=system.terminal -pio=system.iobus.port[25] +pio=system.iobus.master[24] [system.tsunami.cchip] type=TsunamiCChip @@ -331,7 +335,7 @@ pio_addr=8803072344064 pio_latency=1000 system=system tsunami=system.tsunami -pio=system.iobus.port[1] +pio=system.iobus.master[0] [system.tsunami.ethernet] type=NSGigE @@ -400,9 +404,9 @@ system=system tx_delay=1000000 tx_fifo_size=524288 tx_thread=false -config=system.iobus.port[30] -dma=system.iobus.port[31] -pio=system.iobus.port[29] +config=system.iobus.master[28] +dma=system.iobus.slave[2] +pio=system.iobus.master[27] [system.tsunami.fake_OROM] type=IsaFake @@ -418,7 +422,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[9] +pio=system.iobus.master[8] [system.tsunami.fake_ata0] type=IsaFake @@ -434,7 +438,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[20] +pio=system.iobus.master[19] [system.tsunami.fake_ata1] type=IsaFake @@ -450,7 +454,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[21] +pio=system.iobus.master[20] [system.tsunami.fake_pnp_addr] type=IsaFake @@ -466,7 +470,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[10] +pio=system.iobus.master[9] [system.tsunami.fake_pnp_read0] type=IsaFake @@ -482,7 +486,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[12] +pio=system.iobus.master[11] [system.tsunami.fake_pnp_read1] type=IsaFake @@ -498,7 +502,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[13] +pio=system.iobus.master[12] [system.tsunami.fake_pnp_read2] type=IsaFake @@ -514,7 +518,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[14] +pio=system.iobus.master[13] [system.tsunami.fake_pnp_read3] type=IsaFake @@ -530,7 +534,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[15] +pio=system.iobus.master[14] [system.tsunami.fake_pnp_read4] type=IsaFake @@ -546,7 +550,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[16] +pio=system.iobus.master[15] [system.tsunami.fake_pnp_read5] type=IsaFake @@ -562,7 +566,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[17] +pio=system.iobus.master[16] [system.tsunami.fake_pnp_read6] type=IsaFake @@ -578,7 +582,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[18] +pio=system.iobus.master[17] [system.tsunami.fake_pnp_read7] type=IsaFake @@ -594,7 +598,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[19] +pio=system.iobus.master[18] [system.tsunami.fake_pnp_write] type=IsaFake @@ -610,7 +614,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[11] +pio=system.iobus.master[10] [system.tsunami.fake_ppc] type=IsaFake @@ -626,7 +630,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[8] +pio=system.iobus.master[7] [system.tsunami.fake_sm_chip] type=IsaFake @@ -642,7 +646,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[3] +pio=system.iobus.master[2] [system.tsunami.fake_uart1] type=IsaFake @@ -658,7 +662,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[4] +pio=system.iobus.master[3] [system.tsunami.fake_uart2] type=IsaFake @@ -674,7 +678,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[5] +pio=system.iobus.master[4] [system.tsunami.fake_uart3] type=IsaFake @@ -690,7 +694,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[6] +pio=system.iobus.master[5] [system.tsunami.fake_uart4] type=IsaFake @@ -706,7 +710,7 @@ ret_data8=255 system=system update_data=false warn_access= -pio=system.iobus.port[7] +pio=system.iobus.master[6] [system.tsunami.fb] type=BadDevice @@ -714,7 +718,7 @@ devicename=FrameBuffer pio_addr=8804615848912 pio_latency=1000 system=system -pio=system.iobus.port[22] +pio=system.iobus.master[21] [system.tsunami.ide] type=IdeController @@ -768,9 +772,9 @@ pci_func=0 pio_latency=1000 platform=system.tsunami system=system -config=system.iobus.port[27] -dma=system.iobus.port[28] -pio=system.iobus.port[26] +config=system.iobus.master[26] +dma=system.iobus.slave[1] +pio=system.iobus.master[25] [system.tsunami.io] type=TsunamiIO @@ -781,7 +785,7 @@ system=system time=Thu Jan 1 00:00:00 2009 tsunami=system.tsunami year_is_bcd=false -pio=system.iobus.port[23] +pio=system.iobus.master[22] [system.tsunami.pchip] type=TsunamiPChip @@ -789,7 +793,7 @@ pio_addr=8802535473152 pio_latency=1000 system=system tsunami=system.tsunami -pio=system.iobus.port[2] +pio=system.iobus.master[1] [system.tsunami.pciconfig] type=PciConfigAll @@ -807,5 +811,5 @@ pio_latency=1000 platform=system.tsunami system=system terminal=system.terminal -pio=system.iobus.port[24] +pio=system.iobus.master[23] diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simout b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simout index e3d6e41ac..7b3033c70 100755 --- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simout +++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simout @@ -1,11 +1,12 @@ gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Feb 11 2012 13:05:17 -gem5 started Feb 11 2012 13:09:47 -gem5 executing on zizzer -command line: build/ALPHA/gem5.fast -d build/ALPHA/tests/fast/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing -re tests/run.py build/ALPHA/tests/fast/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing +gem5 compiled May 8 2012 15:36:31 +gem5 started May 8 2012 15:37:07 +gem5 executing on piton +command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing -re tests/run.py build/ALPHA/tests/opt/quick/fs/10.linux-boot/alpha/linux/tsunami-simple-timing Global frequency set at 1000000000000 ticks per second info: kernel located at: /dist/m5/system/binaries/vmlinux + 0: system.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009 info: Entering event queue @ 0. Starting simulation... Exiting @ tick 1915548867000 because m5_exit instruction encountered diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stats.txt b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stats.txt index 713b264a4..d0852c317 100644 --- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stats.txt +++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stats.txt @@ -4,11 +4,11 @@ sim_seconds 1.915549 # Nu sim_ticks 1915548867000 # Number of ticks simulated final_tick 1915548867000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 1998214 # Simulator instruction rate (inst/s) -host_op_rate 1998212 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 68184353129 # Simulator tick rate (ticks/s) -host_mem_usage 288188 # Number of bytes of host memory used -host_seconds 28.09 # Real time elapsed on the host +host_inst_rate 646342 # Simulator instruction rate (inst/s) +host_op_rate 646342 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 22054916762 # Simulator tick rate (ticks/s) +host_mem_usage 292620 # Number of bytes of host memory used +host_seconds 86.85 # Real time elapsed on the host sim_insts 56137087 # Number of instructions simulated sim_ops 56137087 # Number of ops (including micro ops) simulated system.physmem.bytes_read 29663360 # Number of bytes read from this memory @@ -110,8 +110,8 @@ system.l2c.blocked_cycles::no_mshrs 0 # nu system.l2c.blocked_cycles::no_targets 0 # number of cycles access was blocked system.l2c.blocked::no_mshrs 0 # number of cycles access was blocked system.l2c.blocked::no_targets 0 # number of cycles access was blocked -system.l2c.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.l2c.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.l2c.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.l2c.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.l2c.fast_writes 0 # number of fast writes performed system.l2c.cache_copies 0 # number of cache copies performed system.l2c.writebacks::writebacks 116650 # number of writebacks @@ -214,7 +214,7 @@ system.iocache.blocked_cycles::no_targets 0 # n system.iocache.blocked::no_mshrs 10476 # number of cycles access was blocked system.iocache.blocked::no_targets 0 # number of cycles access was blocked system.iocache.avg_blocked_cycles::no_mshrs 6166.863307 # average number of cycles each access was blocked -system.iocache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.iocache.fast_writes 0 # number of fast writes performed system.iocache.cache_copies 0 # number of cache copies performed system.iocache.writebacks::writebacks 41512 # number of writebacks @@ -399,30 +399,30 @@ system.tsunami.ethernet.descDMAWrites 0 # Nu system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA system.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA system.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU -system.tsunami.ethernet.coalescedSwi no_value # average number of Swi's coalesced into each post +system.tsunami.ethernet.coalescedSwi nan # average number of Swi's coalesced into each post system.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR system.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU -system.tsunami.ethernet.coalescedRxIdle no_value # average number of RxIdle's coalesced into each post +system.tsunami.ethernet.coalescedRxIdle nan # average number of RxIdle's coalesced into each post system.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR system.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU -system.tsunami.ethernet.coalescedRxOk no_value # average number of RxOk's coalesced into each post +system.tsunami.ethernet.coalescedRxOk nan # average number of RxOk's coalesced into each post system.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR system.tsunami.ethernet.postedRxDesc 0 # number of RxDesc interrupts posted to CPU -system.tsunami.ethernet.coalescedRxDesc no_value # average number of RxDesc's coalesced into each post +system.tsunami.ethernet.coalescedRxDesc nan # average number of RxDesc's coalesced into each post system.tsunami.ethernet.totalRxDesc 0 # total number of RxDesc written to ISR system.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU -system.tsunami.ethernet.coalescedTxOk no_value # average number of TxOk's coalesced into each post +system.tsunami.ethernet.coalescedTxOk nan # average number of TxOk's coalesced into each post system.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR system.tsunami.ethernet.postedTxIdle 0 # number of TxIdle interrupts posted to CPU -system.tsunami.ethernet.coalescedTxIdle no_value # average number of TxIdle's coalesced into each post +system.tsunami.ethernet.coalescedTxIdle nan # average number of TxIdle's coalesced into each post system.tsunami.ethernet.totalTxIdle 0 # total number of TxIdle written to ISR system.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU -system.tsunami.ethernet.coalescedTxDesc no_value # average number of TxDesc's coalesced into each post +system.tsunami.ethernet.coalescedTxDesc nan # average number of TxDesc's coalesced into each post system.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR system.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU -system.tsunami.ethernet.coalescedRxOrn no_value # average number of RxOrn's coalesced into each post +system.tsunami.ethernet.coalescedRxOrn nan # average number of RxOrn's coalesced into each post system.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR -system.tsunami.ethernet.coalescedTotal no_value # average number of interrupts coalesced into each post +system.tsunami.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU system.tsunami.ethernet.droppedPackets 0 # number of packets dropped system.cpu.icache.replacements 927683 # number of replacements @@ -468,8 +468,8 @@ system.cpu.icache.blocked_cycles::no_mshrs 0 # system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.cpu.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu.icache.fast_writes 0 # number of fast writes performed system.cpu.icache.cache_copies 0 # number of cache copies performed system.cpu.icache.writebacks::writebacks 85 # number of writebacks @@ -560,8 +560,8 @@ system.cpu.dcache.blocked_cycles::no_mshrs 0 # system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu.dcache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked -system.cpu.dcache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked +system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu.dcache.fast_writes 0 # number of fast writes performed system.cpu.dcache.cache_copies 0 # number of cache copies performed system.cpu.dcache.writebacks::writebacks 826586 # number of writebacks |