diff options
author | Nilay Vaish <nilay@cs.wisc.edu> | 2015-09-15 08:14:09 -0500 |
---|---|---|
committer | Nilay Vaish <nilay@cs.wisc.edu> | 2015-09-15 08:14:09 -0500 |
commit | 0d6a6dfd7b500aff7e91a22c9bb7211e1807b90e (patch) | |
tree | 45d559d0511bdca749a08a2f42eeafdcf25739cf /tests/quick/fs/10.linux-boot/ref/alpha | |
parent | 3de9def6c1ad38d6a5068b07512cbefffafcb758 (diff) | |
download | gem5-0d6a6dfd7b500aff7e91a22c9bb7211e1807b90e.tar.xz |
stats: updates due to recent changesets including d0934b57735a
Diffstat (limited to 'tests/quick/fs/10.linux-boot/ref/alpha')
6 files changed, 42 insertions, 62 deletions
diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini index 78cb13dcc..b567a20c2 100644 --- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini +++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini @@ -98,7 +98,7 @@ dcache_port=system.cpu0.dcache.cpu_side icache_port=system.cpu0.icache.cpu_side [system.cpu0.dcache] -type=BaseCache +type=Cache children=tags addr_ranges=0:18446744073709551615 assoc=4 @@ -107,7 +107,7 @@ demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 -is_top_level=true +is_read_only=false max_miss_count=0 mshrs=4 prefetch_on_access=false @@ -118,7 +118,6 @@ size=32768 system=system tags=system.cpu0.dcache.tags tgts_per_mshr=20 -two_queue=false write_buffers=8 cpu_side=system.cpu0.dcache_port mem_side=system.toL2Bus.slave[1] @@ -139,7 +138,7 @@ eventq_index=0 size=64 [system.cpu0.icache] -type=BaseCache +type=Cache children=tags addr_ranges=0:18446744073709551615 assoc=1 @@ -148,7 +147,7 @@ demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 -is_top_level=true +is_read_only=true max_miss_count=0 mshrs=4 prefetch_on_access=false @@ -159,7 +158,6 @@ size=32768 system=system tags=system.cpu0.icache.tags tgts_per_mshr=20 -two_queue=false write_buffers=8 cpu_side=system.cpu0.icache_port mem_side=system.toL2Bus.slave[0] @@ -230,7 +228,7 @@ dcache_port=system.cpu1.dcache.cpu_side icache_port=system.cpu1.icache.cpu_side [system.cpu1.dcache] -type=BaseCache +type=Cache children=tags addr_ranges=0:18446744073709551615 assoc=4 @@ -239,7 +237,7 @@ demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 -is_top_level=true +is_read_only=false max_miss_count=0 mshrs=4 prefetch_on_access=false @@ -250,7 +248,6 @@ size=32768 system=system tags=system.cpu1.dcache.tags tgts_per_mshr=20 -two_queue=false write_buffers=8 cpu_side=system.cpu1.dcache_port mem_side=system.toL2Bus.slave[3] @@ -271,7 +268,7 @@ eventq_index=0 size=64 [system.cpu1.icache] -type=BaseCache +type=Cache children=tags addr_ranges=0:18446744073709551615 assoc=1 @@ -280,7 +277,7 @@ demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 -is_top_level=true +is_read_only=true max_miss_count=0 mshrs=4 prefetch_on_access=false @@ -291,7 +288,6 @@ size=32768 system=system tags=system.cpu1.icache.tags tgts_per_mshr=20 -two_queue=false write_buffers=8 cpu_side=system.cpu1.icache_port mem_side=system.toL2Bus.slave[2] @@ -405,7 +401,7 @@ master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_ slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma [system.iocache] -type=BaseCache +type=Cache children=tags addr_ranges=0:134217727 assoc=8 @@ -414,7 +410,7 @@ demand_mshr_reserve=1 eventq_index=0 forward_snoops=false hit_latency=50 -is_top_level=true +is_read_only=false max_miss_count=0 mshrs=20 prefetch_on_access=false @@ -425,7 +421,6 @@ size=1024 system=system tags=system.iocache.tags tgts_per_mshr=12 -two_queue=false write_buffers=8 cpu_side=system.iobus.master[29] mem_side=system.membus.slave[2] @@ -441,7 +436,7 @@ sequential_access=false size=1024 [system.l2c] -type=BaseCache +type=Cache children=tags addr_ranges=0:18446744073709551615 assoc=8 @@ -450,7 +445,7 @@ demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 -is_top_level=false +is_read_only=false max_miss_count=0 mshrs=20 prefetch_on_access=false @@ -461,7 +456,6 @@ size=4194304 system=system tags=system.l2c.tags tgts_per_mshr=12 -two_queue=false write_buffers=8 cpu_side=system.toL2Bus.master[0] mem_side=system.membus.slave[1] diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini index 0b689db35..8a8f59ba6 100644 --- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini +++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini @@ -98,7 +98,7 @@ dcache_port=system.cpu.dcache.cpu_side icache_port=system.cpu.icache.cpu_side [system.cpu.dcache] -type=BaseCache +type=Cache children=tags addr_ranges=0:18446744073709551615 assoc=4 @@ -107,7 +107,7 @@ demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 -is_top_level=true +is_read_only=false max_miss_count=0 mshrs=4 prefetch_on_access=false @@ -118,7 +118,6 @@ size=32768 system=system tags=system.cpu.dcache.tags tgts_per_mshr=20 -two_queue=false write_buffers=8 cpu_side=system.cpu.dcache_port mem_side=system.cpu.toL2Bus.slave[1] @@ -139,7 +138,7 @@ eventq_index=0 size=64 [system.cpu.icache] -type=BaseCache +type=Cache children=tags addr_ranges=0:18446744073709551615 assoc=1 @@ -148,7 +147,7 @@ demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 -is_top_level=true +is_read_only=true max_miss_count=0 mshrs=4 prefetch_on_access=false @@ -159,7 +158,6 @@ size=32768 system=system tags=system.cpu.icache.tags tgts_per_mshr=20 -two_queue=false write_buffers=8 cpu_side=system.cpu.icache_port mem_side=system.cpu.toL2Bus.slave[0] @@ -189,7 +187,7 @@ eventq_index=0 size=48 [system.cpu.l2cache] -type=BaseCache +type=Cache children=tags addr_ranges=0:18446744073709551615 assoc=8 @@ -198,7 +196,7 @@ demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 -is_top_level=false +is_read_only=false max_miss_count=0 mshrs=20 prefetch_on_access=false @@ -209,7 +207,6 @@ size=4194304 system=system tags=system.cpu.l2cache.tags tgts_per_mshr=12 -two_queue=false write_buffers=8 cpu_side=system.cpu.toL2Bus.master[0] mem_side=system.membus.slave[1] @@ -324,7 +321,7 @@ master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_ slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma [system.iocache] -type=BaseCache +type=Cache children=tags addr_ranges=0:134217727 assoc=8 @@ -333,7 +330,7 @@ demand_mshr_reserve=1 eventq_index=0 forward_snoops=false hit_latency=50 -is_top_level=true +is_read_only=false max_miss_count=0 mshrs=20 prefetch_on_access=false @@ -344,7 +341,6 @@ size=1024 system=system tags=system.iocache.tags tgts_per_mshr=12 -two_queue=false write_buffers=8 cpu_side=system.iobus.master[29] mem_side=system.membus.slave[2] diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini index 6dd8362e8..e1d35dff5 100644 --- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini +++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini @@ -94,7 +94,7 @@ dcache_port=system.cpu0.dcache.cpu_side icache_port=system.cpu0.icache.cpu_side [system.cpu0.dcache] -type=BaseCache +type=Cache children=tags addr_ranges=0:18446744073709551615 assoc=4 @@ -103,7 +103,7 @@ demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 -is_top_level=true +is_read_only=false max_miss_count=0 mshrs=4 prefetch_on_access=false @@ -114,7 +114,6 @@ size=32768 system=system tags=system.cpu0.dcache.tags tgts_per_mshr=20 -two_queue=false write_buffers=8 cpu_side=system.cpu0.dcache_port mem_side=system.toL2Bus.slave[1] @@ -135,7 +134,7 @@ eventq_index=0 size=64 [system.cpu0.icache] -type=BaseCache +type=Cache children=tags addr_ranges=0:18446744073709551615 assoc=1 @@ -144,7 +143,7 @@ demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 -is_top_level=true +is_read_only=true max_miss_count=0 mshrs=4 prefetch_on_access=false @@ -155,7 +154,6 @@ size=32768 system=system tags=system.cpu0.icache.tags tgts_per_mshr=20 -two_queue=false write_buffers=8 cpu_side=system.cpu0.icache_port mem_side=system.toL2Bus.slave[0] @@ -222,7 +220,7 @@ dcache_port=system.cpu1.dcache.cpu_side icache_port=system.cpu1.icache.cpu_side [system.cpu1.dcache] -type=BaseCache +type=Cache children=tags addr_ranges=0:18446744073709551615 assoc=4 @@ -231,7 +229,7 @@ demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 -is_top_level=true +is_read_only=false max_miss_count=0 mshrs=4 prefetch_on_access=false @@ -242,7 +240,6 @@ size=32768 system=system tags=system.cpu1.dcache.tags tgts_per_mshr=20 -two_queue=false write_buffers=8 cpu_side=system.cpu1.dcache_port mem_side=system.toL2Bus.slave[3] @@ -263,7 +260,7 @@ eventq_index=0 size=64 [system.cpu1.icache] -type=BaseCache +type=Cache children=tags addr_ranges=0:18446744073709551615 assoc=1 @@ -272,7 +269,7 @@ demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 -is_top_level=true +is_read_only=true max_miss_count=0 mshrs=4 prefetch_on_access=false @@ -283,7 +280,6 @@ size=32768 system=system tags=system.cpu1.icache.tags tgts_per_mshr=20 -two_queue=false write_buffers=8 cpu_side=system.cpu1.icache_port mem_side=system.toL2Bus.slave[2] @@ -397,7 +393,7 @@ master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_ slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma [system.iocache] -type=BaseCache +type=Cache children=tags addr_ranges=0:134217727 assoc=8 @@ -406,7 +402,7 @@ demand_mshr_reserve=1 eventq_index=0 forward_snoops=false hit_latency=50 -is_top_level=true +is_read_only=false max_miss_count=0 mshrs=20 prefetch_on_access=false @@ -417,7 +413,6 @@ size=1024 system=system tags=system.iocache.tags tgts_per_mshr=12 -two_queue=false write_buffers=8 cpu_side=system.iobus.master[29] mem_side=system.membus.slave[2] @@ -433,7 +428,7 @@ sequential_access=false size=1024 [system.l2c] -type=BaseCache +type=Cache children=tags addr_ranges=0:18446744073709551615 assoc=8 @@ -442,7 +437,7 @@ demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 -is_top_level=false +is_read_only=false max_miss_count=0 mshrs=20 prefetch_on_access=false @@ -453,7 +448,6 @@ size=4194304 system=system tags=system.l2c.tags tgts_per_mshr=12 -two_queue=false write_buffers=8 cpu_side=system.toL2Bus.master[0] mem_side=system.membus.slave[1] diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/system.terminal b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/system.terminal index 9e87f65da..8176c3d31 100644 --- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/system.terminal +++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/system.terminal @@ -27,7 +27,7 @@ M5 console: m5AlphaAccess @ 0xFFFFFD0200000000
memcluster 1, usage 0, start 392, end 16384
freeing pages 1069:16384
reserving pages 1069:1070 -
4096K Bcache detected; load hit latency 38 cycles, load miss latency 148 cycles +
4096K Bcache detected; load hit latency 38 cycles, load miss latency 160 cycles
SMP: 2 CPUs probed -- cpu_present_mask = 3
Built 1 zonelists
Kernel command line: root=/dev/hda1 console=ttyS0 diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini index 586901b21..191ca5cbb 100644 --- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini +++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini @@ -94,7 +94,7 @@ dcache_port=system.cpu.dcache.cpu_side icache_port=system.cpu.icache.cpu_side [system.cpu.dcache] -type=BaseCache +type=Cache children=tags addr_ranges=0:18446744073709551615 assoc=4 @@ -103,7 +103,7 @@ demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 -is_top_level=true +is_read_only=false max_miss_count=0 mshrs=4 prefetch_on_access=false @@ -114,7 +114,6 @@ size=32768 system=system tags=system.cpu.dcache.tags tgts_per_mshr=20 -two_queue=false write_buffers=8 cpu_side=system.cpu.dcache_port mem_side=system.cpu.toL2Bus.slave[1] @@ -135,7 +134,7 @@ eventq_index=0 size=64 [system.cpu.icache] -type=BaseCache +type=Cache children=tags addr_ranges=0:18446744073709551615 assoc=1 @@ -144,7 +143,7 @@ demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=2 -is_top_level=true +is_read_only=true max_miss_count=0 mshrs=4 prefetch_on_access=false @@ -155,7 +154,6 @@ size=32768 system=system tags=system.cpu.icache.tags tgts_per_mshr=20 -two_queue=false write_buffers=8 cpu_side=system.cpu.icache_port mem_side=system.cpu.toL2Bus.slave[0] @@ -185,7 +183,7 @@ eventq_index=0 size=48 [system.cpu.l2cache] -type=BaseCache +type=Cache children=tags addr_ranges=0:18446744073709551615 assoc=8 @@ -194,7 +192,7 @@ demand_mshr_reserve=1 eventq_index=0 forward_snoops=true hit_latency=20 -is_top_level=false +is_read_only=false max_miss_count=0 mshrs=20 prefetch_on_access=false @@ -205,7 +203,6 @@ size=4194304 system=system tags=system.cpu.l2cache.tags tgts_per_mshr=12 -two_queue=false write_buffers=8 cpu_side=system.cpu.toL2Bus.master[0] mem_side=system.membus.slave[1] @@ -320,7 +317,7 @@ master=system.tsunami.cchip.pio system.tsunami.pchip.pio system.tsunami.fake_sm_ slave=system.bridge.master system.tsunami.ide.dma system.tsunami.ethernet.dma [system.iocache] -type=BaseCache +type=Cache children=tags addr_ranges=0:134217727 assoc=8 @@ -329,7 +326,7 @@ demand_mshr_reserve=1 eventq_index=0 forward_snoops=false hit_latency=50 -is_top_level=true +is_read_only=false max_miss_count=0 mshrs=20 prefetch_on_access=false @@ -340,7 +337,6 @@ size=1024 system=system tags=system.iocache.tags tgts_per_mshr=12 -two_queue=false write_buffers=8 cpu_side=system.iobus.master[29] mem_side=system.membus.slave[2] diff --git a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/system.terminal b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/system.terminal index d6ca9b555..64d8e02a2 100644 --- a/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/system.terminal +++ b/tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/system.terminal @@ -24,7 +24,7 @@ M5 console: m5AlphaAccess @ 0xFFFFFD0200000000
memcluster 1, usage 0, start 392, end 16384
freeing pages 1069:16384
reserving pages 1069:1070 -
4096K Bcache detected; load hit latency 38 cycles, load miss latency 148 cycles +
4096K Bcache detected; load hit latency 38 cycles, load miss latency 160 cycles
SMP: 1 CPUs probed -- cpu_present_mask = 1
Built 1 zonelists
Kernel command line: root=/dev/hda1 console=ttyS0 |