stats: Update stats to reflect use of SimpleDRAM

This patch bumps the stats to match the use of SimpleDRAM instead of
SimpleMemory in all inorder and O3 regressions, and also all
full-system regressions. A number of performance-related stats change,
and a whole bunch of stats are added for the memory controller.

1 files changed, 271 insertions, 113 deletions

diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/stats.txt b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/stats.txt
index 206441d13..ccb9a5402 100644
--- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/stats.txt
+++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/stats.txt
@@ -4,11 +4,11 @@ sim_seconds                                  2.332810                       # Nu
 sim_ticks                                2332810264000                       # Number of ticks simulated
 final_tick                               2332810264000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                1681370                       # Simulator instruction rate (inst/s)
-host_op_rate                                  2162138                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                            64929680145                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 380112                       # Number of bytes of host memory used
-host_seconds                                    35.93                       # Real time elapsed on the host
+host_inst_rate                                1184768                       # Simulator instruction rate (inst/s)
+host_op_rate                                  1523538                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                            45752340761                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 382236                       # Number of bytes of host memory used
+host_seconds                                    50.99                       # Real time elapsed on the host
 sim_insts                                    60408639                       # Number of instructions simulated
 sim_ops                                      77681819                       # Number of ops (including micro ops) simulated
 system.physmem.bytes_read::realview.clcd    111673344                       # Number of bytes read from this memory
@@ -49,6 +49,164 @@ system.physmem.bw_total::cpu.itb.walker            82                       # To
 system.physmem.bw_total::cpu.inst              302262                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::cpu.data             5181496                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::total               54942169                       # Total bandwidth to/from this memory (bytes/s)
+system.physmem.readReqs                             0                       # Total number of read requests seen
+system.physmem.writeReqs                            0                       # Total number of write requests seen
+system.physmem.cpureqs                              0                       # Reqs generatd by CPU via cache - shady
+system.physmem.bytesRead                            0                       # Total number of bytes read from memory
+system.physmem.bytesWritten                         0                       # Total number of bytes written to memory
+system.physmem.bytesConsumedRd                      0                       # bytesRead derated as per pkt->getSize()
+system.physmem.bytesConsumedWr                      0                       # bytesWritten derated as per pkt->getSize()
+system.physmem.servicedByWrQ                        0                       # Number of read reqs serviced by write Q
+system.physmem.neitherReadNorWrite                  0                       # Reqs where no action is needed
+system.physmem.perBankRdReqs::0                     0                       # Track reads on a per bank basis
+system.physmem.perBankRdReqs::1                     0                       # Track reads on a per bank basis
+system.physmem.perBankRdReqs::2                     0                       # Track reads on a per bank basis
+system.physmem.perBankRdReqs::3                     0                       # Track reads on a per bank basis
+system.physmem.perBankRdReqs::4                     0                       # Track reads on a per bank basis
+system.physmem.perBankRdReqs::5                     0                       # Track reads on a per bank basis
+system.physmem.perBankRdReqs::6                     0                       # Track reads on a per bank basis
+system.physmem.perBankRdReqs::7                     0                       # Track reads on a per bank basis
+system.physmem.perBankRdReqs::8                     0                       # Track reads on a per bank basis
+system.physmem.perBankRdReqs::9                     0                       # Track reads on a per bank basis
+system.physmem.perBankRdReqs::10                    0                       # Track reads on a per bank basis
+system.physmem.perBankRdReqs::11                    0                       # Track reads on a per bank basis
+system.physmem.perBankRdReqs::12                    0                       # Track reads on a per bank basis
+system.physmem.perBankRdReqs::13                    0                       # Track reads on a per bank basis
+system.physmem.perBankRdReqs::14                    0                       # Track reads on a per bank basis
+system.physmem.perBankRdReqs::15                    0                       # Track reads on a per bank basis
+system.physmem.perBankWrReqs::0                     0                       # Track writes on a per bank basis
+system.physmem.perBankWrReqs::1                     0                       # Track writes on a per bank basis
+system.physmem.perBankWrReqs::2                     0                       # Track writes on a per bank basis
+system.physmem.perBankWrReqs::3                     0                       # Track writes on a per bank basis
+system.physmem.perBankWrReqs::4                     0                       # Track writes on a per bank basis
+system.physmem.perBankWrReqs::5                     0                       # Track writes on a per bank basis
+system.physmem.perBankWrReqs::6                     0                       # Track writes on a per bank basis
+system.physmem.perBankWrReqs::7                     0                       # Track writes on a per bank basis
+system.physmem.perBankWrReqs::8                     0                       # Track writes on a per bank basis
+system.physmem.perBankWrReqs::9                     0                       # Track writes on a per bank basis
+system.physmem.perBankWrReqs::10                    0                       # Track writes on a per bank basis
+system.physmem.perBankWrReqs::11                    0                       # Track writes on a per bank basis
+system.physmem.perBankWrReqs::12                    0                       # Track writes on a per bank basis
+system.physmem.perBankWrReqs::13                    0                       # Track writes on a per bank basis
+system.physmem.perBankWrReqs::14                    0                       # Track writes on a per bank basis
+system.physmem.perBankWrReqs::15                    0                       # Track writes on a per bank basis
+system.physmem.numRdRetry                           0                       # Number of times rd buffer was full causing retry
+system.physmem.numWrRetry                           0                       # Number of times wr buffer was full causing retry
+system.physmem.totGap                               0                       # Total gap between requests
+system.physmem.readPktSize::0                       0                       # Categorize read packet sizes
+system.physmem.readPktSize::1                       0                       # Categorize read packet sizes
+system.physmem.readPktSize::2                       0                       # Categorize read packet sizes
+system.physmem.readPktSize::3                       0                       # Categorize read packet sizes
+system.physmem.readPktSize::4                       0                       # Categorize read packet sizes
+system.physmem.readPktSize::5                       0                       # Categorize read packet sizes
+system.physmem.readPktSize::6                       0                       # Categorize read packet sizes
+system.physmem.readPktSize::7                       0                       # Categorize read packet sizes
+system.physmem.readPktSize::8                       0                       # Categorize read packet sizes
+system.physmem.writePktSize::0                      0                       # categorize write packet sizes
+system.physmem.writePktSize::1                      0                       # categorize write packet sizes
+system.physmem.writePktSize::2                      0                       # categorize write packet sizes
+system.physmem.writePktSize::3                      0                       # categorize write packet sizes
+system.physmem.writePktSize::4                      0                       # categorize write packet sizes
+system.physmem.writePktSize::5                      0                       # categorize write packet sizes
+system.physmem.writePktSize::6                      0                       # categorize write packet sizes
+system.physmem.writePktSize::7                      0                       # categorize write packet sizes
+system.physmem.writePktSize::8                      0                       # categorize write packet sizes
+system.physmem.neitherpktsize::0                    0                       # categorize neither packet sizes
+system.physmem.neitherpktsize::1                    0                       # categorize neither packet sizes
+system.physmem.neitherpktsize::2                    0                       # categorize neither packet sizes
+system.physmem.neitherpktsize::3                    0                       # categorize neither packet sizes
+system.physmem.neitherpktsize::4                    0                       # categorize neither packet sizes
+system.physmem.neitherpktsize::5                    0                       # categorize neither packet sizes
+system.physmem.neitherpktsize::6                    0                       # categorize neither packet sizes
+system.physmem.neitherpktsize::7                    0                       # categorize neither packet sizes
+system.physmem.neitherpktsize::8                    0                       # categorize neither packet sizes
+system.physmem.rdQLenPdf::0                         0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::1                         0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::2                         0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::3                         0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::4                         0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::5                         0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::6                         0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::7                         0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::8                         0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::9                         0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::10                        0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::11                        0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::12                        0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::13                        0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::14                        0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::15                        0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::16                        0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::17                        0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::18                        0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::19                        0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::20                        0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::21                        0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::22                        0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::23                        0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::24                        0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::25                        0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::26                        0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::27                        0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::28                        0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::29                        0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::30                        0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::31                        0                       # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::32                        0                       # What read queue length does an incoming req see
+system.physmem.wrQLenPdf::0                         0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::1                         0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::2                         0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::3                         0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::4                         0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::5                         0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::6                         0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::7                         0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::8                         0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::9                         0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::10                        0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::11                        0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::12                        0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::13                        0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::14                        0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::15                        0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::16                        0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::17                        0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::18                        0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::19                        0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::20                        0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::21                        0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::22                        0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::23                        0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::24                        0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::25                        0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::26                        0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::27                        0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::28                        0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::29                        0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::30                        0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::31                        0                       # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::32                        0                       # What write queue length does an incoming req see
+system.physmem.totQLat                              0                       # Total cycles spent in queuing delays
+system.physmem.totMemAccLat                         0                       # Sum of mem lat for all requests
+system.physmem.totBusLat                            0                       # Total cycles spent in databus access
+system.physmem.totBankLat                           0                       # Total cycles spent in bank access
+system.physmem.avgQLat                            nan                       # Average queueing delay per request
+system.physmem.avgBankLat                         nan                       # Average bank access latency per request
+system.physmem.avgBusLat                          nan                       # Average bus latency per request
+system.physmem.avgMemAccLat                       nan                       # Average memory access latency
+system.physmem.avgRdBW                           0.00                       # Average achieved read bandwidth in MB/s
+system.physmem.avgWrBW                           0.00                       # Average achieved write bandwidth in MB/s
+system.physmem.avgConsumedRdBW                   0.00                       # Average consumed read bandwidth in MB/s
+system.physmem.avgConsumedWrBW                   0.00                       # Average consumed write bandwidth in MB/s
+system.physmem.peakBW                        16000.00                       # Theoretical peak bandwidth in MB/s
+system.physmem.busUtil                           0.00                       # Data bus utilization in percentage
+system.physmem.avgRdQLen                         0.00                       # Average read queue length over time
+system.physmem.avgWrQLen                         0.00                       # Average write queue length over time
+system.physmem.readRowHits                          0                       # Number of row buffer hits during reads
+system.physmem.writeRowHits                         0                       # Number of row buffer hits during writes
+system.physmem.readRowHitRate                     nan                       # Row buffer hit rate for reads
+system.physmem.writeRowHitRate                    nan                       # Row buffer hit rate for writes
+system.physmem.avgGap                             nan                       # Average gap between requests
 system.realview.nvmem.bytes_read::cpu.inst           20                       # Number of bytes read from this memory
 system.realview.nvmem.bytes_read::total            20                       # Number of bytes read from this memory
 system.realview.nvmem.bytes_inst_read::cpu.inst           20                       # Number of instructions bytes read from this memory
@@ -61,114 +219,6 @@ system.realview.nvmem.bw_inst_read::cpu.inst            9
 system.realview.nvmem.bw_inst_read::total            9                       # Instruction read bandwidth from this memory (bytes/s)
 system.realview.nvmem.bw_total::cpu.inst            9                       # Total bandwidth to/from this memory (bytes/s)
 system.realview.nvmem.bw_total::total               9                       # Total bandwidth to/from this memory (bytes/s)
-system.cpu.l2cache.replacements                         62243                       # number of replacements
-system.cpu.l2cache.tagsinuse                     50007.272909                       # Cycle average of tags in use
-system.cpu.l2cache.total_refs                         1669922                       # Total number of references to valid blocks.
-system.cpu.l2cache.sampled_refs                        127628                       # Sample count of references to valid blocks.
-system.cpu.l2cache.avg_refs                         13.084292                       # Average number of references to valid blocks.
-system.cpu.l2cache.warmup_cycle                  2316901489000                       # Cycle when the warmup percentage was hit.
-system.cpu.l2cache.occ_blocks::writebacks        36899.582990                       # Average occupied blocks per requestor
-system.cpu.l2cache.occ_blocks::cpu.dtb.walker        2.960148                       # Average occupied blocks per requestor
-system.cpu.l2cache.occ_blocks::cpu.itb.walker        0.993931                       # Average occupied blocks per requestor
-system.cpu.l2cache.occ_blocks::cpu.inst           7014.720482                       # Average occupied blocks per requestor
-system.cpu.l2cache.occ_blocks::cpu.data           6089.015357                       # Average occupied blocks per requestor
-system.cpu.l2cache.occ_percent::writebacks           0.563043                       # Average percentage of cache occupancy
-system.cpu.l2cache.occ_percent::cpu.dtb.walker       0.000045                       # Average percentage of cache occupancy
-system.cpu.l2cache.occ_percent::cpu.itb.walker       0.000015                       # Average percentage of cache occupancy
-system.cpu.l2cache.occ_percent::cpu.inst             0.107036                       # Average percentage of cache occupancy
-system.cpu.l2cache.occ_percent::cpu.data             0.092911                       # Average percentage of cache occupancy
-system.cpu.l2cache.occ_percent::total                0.763050                       # Average percentage of cache occupancy
-system.cpu.l2cache.ReadReq_hits::cpu.dtb.walker          7507                       # number of ReadReq hits
-system.cpu.l2cache.ReadReq_hits::cpu.itb.walker          3129                       # number of ReadReq hits
-system.cpu.l2cache.ReadReq_hits::cpu.inst              838871                       # number of ReadReq hits
-system.cpu.l2cache.ReadReq_hits::cpu.data              366771                       # number of ReadReq hits
-system.cpu.l2cache.ReadReq_hits::total                1216278                       # number of ReadReq hits
-system.cpu.l2cache.Writeback_hits::writebacks          592643                       # number of Writeback hits
-system.cpu.l2cache.Writeback_hits::total               592643                       # number of Writeback hits
-system.cpu.l2cache.UpgradeReq_hits::cpu.data               26                       # number of UpgradeReq hits
-system.cpu.l2cache.UpgradeReq_hits::total                  26                       # number of UpgradeReq hits
-system.cpu.l2cache.ReadExReq_hits::cpu.data            113739                       # number of ReadExReq hits
-system.cpu.l2cache.ReadExReq_hits::total               113739                       # number of ReadExReq hits
-system.cpu.l2cache.demand_hits::cpu.dtb.walker           7507                       # number of demand (read+write) hits
-system.cpu.l2cache.demand_hits::cpu.itb.walker           3129                       # number of demand (read+write) hits
-system.cpu.l2cache.demand_hits::cpu.inst               838871                       # number of demand (read+write) hits
-system.cpu.l2cache.demand_hits::cpu.data               480510                       # number of demand (read+write) hits
-system.cpu.l2cache.demand_hits::total                 1330017                       # number of demand (read+write) hits
-system.cpu.l2cache.overall_hits::cpu.dtb.walker          7507                       # number of overall hits
-system.cpu.l2cache.overall_hits::cpu.itb.walker          3129                       # number of overall hits
-system.cpu.l2cache.overall_hits::cpu.inst              838871                       # number of overall hits
-system.cpu.l2cache.overall_hits::cpu.data              480510                       # number of overall hits
-system.cpu.l2cache.overall_hits::total                1330017                       # number of overall hits
-system.cpu.l2cache.ReadReq_misses::cpu.dtb.walker            5                       # number of ReadReq misses
-system.cpu.l2cache.ReadReq_misses::cpu.itb.walker            3                       # number of ReadReq misses
-system.cpu.l2cache.ReadReq_misses::cpu.inst             10604                       # number of ReadReq misses
-system.cpu.l2cache.ReadReq_misses::cpu.data              9871                       # number of ReadReq misses
-system.cpu.l2cache.ReadReq_misses::total                20483                       # number of ReadReq misses
-system.cpu.l2cache.UpgradeReq_misses::cpu.data           2919                       # number of UpgradeReq misses
-system.cpu.l2cache.UpgradeReq_misses::total              2919                       # number of UpgradeReq misses
-system.cpu.l2cache.ReadExReq_misses::cpu.data          133468                       # number of ReadExReq misses
-system.cpu.l2cache.ReadExReq_misses::total             133468                       # number of ReadExReq misses
-system.cpu.l2cache.demand_misses::cpu.dtb.walker            5                       # number of demand (read+write) misses
-system.cpu.l2cache.demand_misses::cpu.itb.walker            3                       # number of demand (read+write) misses
-system.cpu.l2cache.demand_misses::cpu.inst              10604                       # number of demand (read+write) misses
-system.cpu.l2cache.demand_misses::cpu.data             143339                       # number of demand (read+write) misses
-system.cpu.l2cache.demand_misses::total                153951                       # number of demand (read+write) misses
-system.cpu.l2cache.overall_misses::cpu.dtb.walker            5                       # number of overall misses
-system.cpu.l2cache.overall_misses::cpu.itb.walker            3                       # number of overall misses
-system.cpu.l2cache.overall_misses::cpu.inst             10604                       # number of overall misses
-system.cpu.l2cache.overall_misses::cpu.data            143339                       # number of overall misses
-system.cpu.l2cache.overall_misses::total               153951                       # number of overall misses
-system.cpu.l2cache.ReadReq_accesses::cpu.dtb.walker         7512                       # number of ReadReq accesses(hits+misses)
-system.cpu.l2cache.ReadReq_accesses::cpu.itb.walker         3132                       # number of ReadReq accesses(hits+misses)
-system.cpu.l2cache.ReadReq_accesses::cpu.inst          849475                       # number of ReadReq accesses(hits+misses)
-system.cpu.l2cache.ReadReq_accesses::cpu.data          376642                       # number of ReadReq accesses(hits+misses)
-system.cpu.l2cache.ReadReq_accesses::total            1236761                       # number of ReadReq accesses(hits+misses)
-system.cpu.l2cache.Writeback_accesses::writebacks       592643                       # number of Writeback accesses(hits+misses)
-system.cpu.l2cache.Writeback_accesses::total           592643                       # number of Writeback accesses(hits+misses)
-system.cpu.l2cache.UpgradeReq_accesses::cpu.data         2945                       # number of UpgradeReq accesses(hits+misses)
-system.cpu.l2cache.UpgradeReq_accesses::total            2945                       # number of UpgradeReq accesses(hits+misses)
-system.cpu.l2cache.ReadExReq_accesses::cpu.data        247207                       # number of ReadExReq accesses(hits+misses)
-system.cpu.l2cache.ReadExReq_accesses::total           247207                       # number of ReadExReq accesses(hits+misses)
-system.cpu.l2cache.demand_accesses::cpu.dtb.walker         7512                       # number of demand (read+write) accesses
-system.cpu.l2cache.demand_accesses::cpu.itb.walker         3132                       # number of demand (read+write) accesses
-system.cpu.l2cache.demand_accesses::cpu.inst           849475                       # number of demand (read+write) accesses
-system.cpu.l2cache.demand_accesses::cpu.data           623849                       # number of demand (read+write) accesses
-system.cpu.l2cache.demand_accesses::total             1483968                       # number of demand (read+write) accesses
-system.cpu.l2cache.overall_accesses::cpu.dtb.walker         7512                       # number of overall (read+write) accesses
-system.cpu.l2cache.overall_accesses::cpu.itb.walker         3132                       # number of overall (read+write) accesses
-system.cpu.l2cache.overall_accesses::cpu.inst          849475                       # number of overall (read+write) accesses
-system.cpu.l2cache.overall_accesses::cpu.data          623849                       # number of overall (read+write) accesses
-system.cpu.l2cache.overall_accesses::total            1483968                       # number of overall (read+write) accesses
-system.cpu.l2cache.ReadReq_miss_rate::cpu.dtb.walker     0.000666                       # miss rate for ReadReq accesses
-system.cpu.l2cache.ReadReq_miss_rate::cpu.itb.walker     0.000958                       # miss rate for ReadReq accesses
-system.cpu.l2cache.ReadReq_miss_rate::cpu.inst       0.012483                       # miss rate for ReadReq accesses
-system.cpu.l2cache.ReadReq_miss_rate::cpu.data       0.026208                       # miss rate for ReadReq accesses
-system.cpu.l2cache.ReadReq_miss_rate::total          0.016562                       # miss rate for ReadReq accesses
-system.cpu.l2cache.UpgradeReq_miss_rate::cpu.data     0.991171                       # miss rate for UpgradeReq accesses
-system.cpu.l2cache.UpgradeReq_miss_rate::total       0.991171                       # miss rate for UpgradeReq accesses
-system.cpu.l2cache.ReadExReq_miss_rate::cpu.data     0.539904                       # miss rate for ReadExReq accesses
-system.cpu.l2cache.ReadExReq_miss_rate::total        0.539904                       # miss rate for ReadExReq accesses
-system.cpu.l2cache.demand_miss_rate::cpu.dtb.walker     0.000666                       # miss rate for demand accesses
-system.cpu.l2cache.demand_miss_rate::cpu.itb.walker     0.000958                       # miss rate for demand accesses
-system.cpu.l2cache.demand_miss_rate::cpu.inst        0.012483                       # miss rate for demand accesses
-system.cpu.l2cache.demand_miss_rate::cpu.data        0.229766                       # miss rate for demand accesses
-system.cpu.l2cache.demand_miss_rate::total           0.103743                       # miss rate for demand accesses
-system.cpu.l2cache.overall_miss_rate::cpu.dtb.walker     0.000666                       # miss rate for overall accesses
-system.cpu.l2cache.overall_miss_rate::cpu.itb.walker     0.000958                       # miss rate for overall accesses
-system.cpu.l2cache.overall_miss_rate::cpu.inst       0.012483                       # miss rate for overall accesses
-system.cpu.l2cache.overall_miss_rate::cpu.data       0.229766                       # miss rate for overall accesses
-system.cpu.l2cache.overall_miss_rate::total          0.103743                       # miss rate for overall accesses
-system.cpu.l2cache.blocked_cycles::no_mshrs                 0                       # number of cycles access was blocked
-system.cpu.l2cache.blocked_cycles::no_targets               0                       # number of cycles access was blocked
-system.cpu.l2cache.blocked::no_mshrs                        0                       # number of cycles access was blocked
-system.cpu.l2cache.blocked::no_targets                      0                       # number of cycles access was blocked
-system.cpu.l2cache.avg_blocked_cycles::no_mshrs           nan                       # average number of cycles each access was blocked
-system.cpu.l2cache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
-system.cpu.l2cache.fast_writes                              0                       # number of fast writes performed
-system.cpu.l2cache.cache_copies                             0                       # number of cache copies performed
-system.cpu.l2cache.writebacks::writebacks               57863                       # number of writebacks
-system.cpu.l2cache.writebacks::total                    57863                       # number of writebacks
-system.cpu.l2cache.no_allocate_misses                       0                       # Number of misses that were no-allocate
 system.cf0.dma_read_full_pages                      0                       # Number of full page size DMA reads (not PRD).
 system.cf0.dma_read_bytes                           0                       # Number of bytes transfered via DMA reads (not PRD).
 system.cf0.dma_read_txs                             0                       # Number of DMA read transactions (not PRD).
@@ -347,6 +397,114 @@ system.cpu.dcache.cache_copies                      0                       # nu
 system.cpu.dcache.writebacks::writebacks       592643                       # number of writebacks
 system.cpu.dcache.writebacks::total            592643                       # number of writebacks
 system.cpu.dcache.no_allocate_misses                0                       # Number of misses that were no-allocate
+system.cpu.l2cache.replacements                 62243                       # number of replacements
+system.cpu.l2cache.tagsinuse             50007.272909                       # Cycle average of tags in use
+system.cpu.l2cache.total_refs                 1669922                       # Total number of references to valid blocks.
+system.cpu.l2cache.sampled_refs                127628                       # Sample count of references to valid blocks.
+system.cpu.l2cache.avg_refs                 13.084292                       # Average number of references to valid blocks.
+system.cpu.l2cache.warmup_cycle          2316901489000                       # Cycle when the warmup percentage was hit.
+system.cpu.l2cache.occ_blocks::writebacks 36899.582990                       # Average occupied blocks per requestor
+system.cpu.l2cache.occ_blocks::cpu.dtb.walker     2.960148                       # Average occupied blocks per requestor
+system.cpu.l2cache.occ_blocks::cpu.itb.walker     0.993931                       # Average occupied blocks per requestor
+system.cpu.l2cache.occ_blocks::cpu.inst   7014.720482                       # Average occupied blocks per requestor
+system.cpu.l2cache.occ_blocks::cpu.data   6089.015357                       # Average occupied blocks per requestor
+system.cpu.l2cache.occ_percent::writebacks     0.563043                       # Average percentage of cache occupancy
+system.cpu.l2cache.occ_percent::cpu.dtb.walker     0.000045                       # Average percentage of cache occupancy
+system.cpu.l2cache.occ_percent::cpu.itb.walker     0.000015                       # Average percentage of cache occupancy
+system.cpu.l2cache.occ_percent::cpu.inst     0.107036                       # Average percentage of cache occupancy
+system.cpu.l2cache.occ_percent::cpu.data     0.092911                       # Average percentage of cache occupancy
+system.cpu.l2cache.occ_percent::total        0.763050                       # Average percentage of cache occupancy
+system.cpu.l2cache.ReadReq_hits::cpu.dtb.walker         7507                       # number of ReadReq hits
+system.cpu.l2cache.ReadReq_hits::cpu.itb.walker         3129                       # number of ReadReq hits
+system.cpu.l2cache.ReadReq_hits::cpu.inst       838871                       # number of ReadReq hits
+system.cpu.l2cache.ReadReq_hits::cpu.data       366771                       # number of ReadReq hits
+system.cpu.l2cache.ReadReq_hits::total        1216278                       # number of ReadReq hits
+system.cpu.l2cache.Writeback_hits::writebacks       592643                       # number of Writeback hits
+system.cpu.l2cache.Writeback_hits::total       592643                       # number of Writeback hits
+system.cpu.l2cache.UpgradeReq_hits::cpu.data           26                       # number of UpgradeReq hits
+system.cpu.l2cache.UpgradeReq_hits::total           26                       # number of UpgradeReq hits
+system.cpu.l2cache.ReadExReq_hits::cpu.data       113739                       # number of ReadExReq hits
+system.cpu.l2cache.ReadExReq_hits::total       113739                       # number of ReadExReq hits
+system.cpu.l2cache.demand_hits::cpu.dtb.walker         7507                       # number of demand (read+write) hits
+system.cpu.l2cache.demand_hits::cpu.itb.walker         3129                       # number of demand (read+write) hits
+system.cpu.l2cache.demand_hits::cpu.inst       838871                       # number of demand (read+write) hits
+system.cpu.l2cache.demand_hits::cpu.data       480510                       # number of demand (read+write) hits
+system.cpu.l2cache.demand_hits::total         1330017                       # number of demand (read+write) hits
+system.cpu.l2cache.overall_hits::cpu.dtb.walker         7507                       # number of overall hits
+system.cpu.l2cache.overall_hits::cpu.itb.walker         3129                       # number of overall hits
+system.cpu.l2cache.overall_hits::cpu.inst       838871                       # number of overall hits
+system.cpu.l2cache.overall_hits::cpu.data       480510                       # number of overall hits
+system.cpu.l2cache.overall_hits::total        1330017                       # number of overall hits
+system.cpu.l2cache.ReadReq_misses::cpu.dtb.walker            5                       # number of ReadReq misses
+system.cpu.l2cache.ReadReq_misses::cpu.itb.walker            3                       # number of ReadReq misses
+system.cpu.l2cache.ReadReq_misses::cpu.inst        10604                       # number of ReadReq misses
+system.cpu.l2cache.ReadReq_misses::cpu.data         9871                       # number of ReadReq misses
+system.cpu.l2cache.ReadReq_misses::total        20483                       # number of ReadReq misses
+system.cpu.l2cache.UpgradeReq_misses::cpu.data         2919                       # number of UpgradeReq misses
+system.cpu.l2cache.UpgradeReq_misses::total         2919                       # number of UpgradeReq misses
+system.cpu.l2cache.ReadExReq_misses::cpu.data       133468                       # number of ReadExReq misses
+system.cpu.l2cache.ReadExReq_misses::total       133468                       # number of ReadExReq misses
+system.cpu.l2cache.demand_misses::cpu.dtb.walker            5                       # number of demand (read+write) misses
+system.cpu.l2cache.demand_misses::cpu.itb.walker            3                       # number of demand (read+write) misses
+system.cpu.l2cache.demand_misses::cpu.inst        10604                       # number of demand (read+write) misses
+system.cpu.l2cache.demand_misses::cpu.data       143339                       # number of demand (read+write) misses
+system.cpu.l2cache.demand_misses::total        153951                       # number of demand (read+write) misses
+system.cpu.l2cache.overall_misses::cpu.dtb.walker            5                       # number of overall misses
+system.cpu.l2cache.overall_misses::cpu.itb.walker            3                       # number of overall misses
+system.cpu.l2cache.overall_misses::cpu.inst        10604                       # number of overall misses
+system.cpu.l2cache.overall_misses::cpu.data       143339                       # number of overall misses
+system.cpu.l2cache.overall_misses::total       153951                       # number of overall misses
+system.cpu.l2cache.ReadReq_accesses::cpu.dtb.walker         7512                       # number of ReadReq accesses(hits+misses)
+system.cpu.l2cache.ReadReq_accesses::cpu.itb.walker         3132                       # number of ReadReq accesses(hits+misses)
+system.cpu.l2cache.ReadReq_accesses::cpu.inst       849475                       # number of ReadReq accesses(hits+misses)
+system.cpu.l2cache.ReadReq_accesses::cpu.data       376642                       # number of ReadReq accesses(hits+misses)
+system.cpu.l2cache.ReadReq_accesses::total      1236761                       # number of ReadReq accesses(hits+misses)
+system.cpu.l2cache.Writeback_accesses::writebacks       592643                       # number of Writeback accesses(hits+misses)
+system.cpu.l2cache.Writeback_accesses::total       592643                       # number of Writeback accesses(hits+misses)
+system.cpu.l2cache.UpgradeReq_accesses::cpu.data         2945                       # number of UpgradeReq accesses(hits+misses)
+system.cpu.l2cache.UpgradeReq_accesses::total         2945                       # number of UpgradeReq accesses(hits+misses)
+system.cpu.l2cache.ReadExReq_accesses::cpu.data       247207                       # number of ReadExReq accesses(hits+misses)
+system.cpu.l2cache.ReadExReq_accesses::total       247207                       # number of ReadExReq accesses(hits+misses)
+system.cpu.l2cache.demand_accesses::cpu.dtb.walker         7512                       # number of demand (read+write) accesses
+system.cpu.l2cache.demand_accesses::cpu.itb.walker         3132                       # number of demand (read+write) accesses
+system.cpu.l2cache.demand_accesses::cpu.inst       849475                       # number of demand (read+write) accesses
+system.cpu.l2cache.demand_accesses::cpu.data       623849                       # number of demand (read+write) accesses
+system.cpu.l2cache.demand_accesses::total      1483968                       # number of demand (read+write) accesses
+system.cpu.l2cache.overall_accesses::cpu.dtb.walker         7512                       # number of overall (read+write) accesses
+system.cpu.l2cache.overall_accesses::cpu.itb.walker         3132                       # number of overall (read+write) accesses
+system.cpu.l2cache.overall_accesses::cpu.inst       849475                       # number of overall (read+write) accesses
+system.cpu.l2cache.overall_accesses::cpu.data       623849                       # number of overall (read+write) accesses
+system.cpu.l2cache.overall_accesses::total      1483968                       # number of overall (read+write) accesses
+system.cpu.l2cache.ReadReq_miss_rate::cpu.dtb.walker     0.000666                       # miss rate for ReadReq accesses
+system.cpu.l2cache.ReadReq_miss_rate::cpu.itb.walker     0.000958                       # miss rate for ReadReq accesses
+system.cpu.l2cache.ReadReq_miss_rate::cpu.inst     0.012483                       # miss rate for ReadReq accesses
+system.cpu.l2cache.ReadReq_miss_rate::cpu.data     0.026208                       # miss rate for ReadReq accesses
+system.cpu.l2cache.ReadReq_miss_rate::total     0.016562                       # miss rate for ReadReq accesses
+system.cpu.l2cache.UpgradeReq_miss_rate::cpu.data     0.991171                       # miss rate for UpgradeReq accesses
+system.cpu.l2cache.UpgradeReq_miss_rate::total     0.991171                       # miss rate for UpgradeReq accesses
+system.cpu.l2cache.ReadExReq_miss_rate::cpu.data     0.539904                       # miss rate for ReadExReq accesses
+system.cpu.l2cache.ReadExReq_miss_rate::total     0.539904                       # miss rate for ReadExReq accesses
+system.cpu.l2cache.demand_miss_rate::cpu.dtb.walker     0.000666                       # miss rate for demand accesses
+system.cpu.l2cache.demand_miss_rate::cpu.itb.walker     0.000958                       # miss rate for demand accesses
+system.cpu.l2cache.demand_miss_rate::cpu.inst     0.012483                       # miss rate for demand accesses
+system.cpu.l2cache.demand_miss_rate::cpu.data     0.229766                       # miss rate for demand accesses
+system.cpu.l2cache.demand_miss_rate::total     0.103743                       # miss rate for demand accesses
+system.cpu.l2cache.overall_miss_rate::cpu.dtb.walker     0.000666                       # miss rate for overall accesses
+system.cpu.l2cache.overall_miss_rate::cpu.itb.walker     0.000958                       # miss rate for overall accesses
+system.cpu.l2cache.overall_miss_rate::cpu.inst     0.012483                       # miss rate for overall accesses
+system.cpu.l2cache.overall_miss_rate::cpu.data     0.229766                       # miss rate for overall accesses
+system.cpu.l2cache.overall_miss_rate::total     0.103743                       # miss rate for overall accesses
+system.cpu.l2cache.blocked_cycles::no_mshrs            0                       # number of cycles access was blocked
+system.cpu.l2cache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
+system.cpu.l2cache.blocked::no_mshrs                0                       # number of cycles access was blocked
+system.cpu.l2cache.blocked::no_targets              0                       # number of cycles access was blocked
+system.cpu.l2cache.avg_blocked_cycles::no_mshrs          nan                       # average number of cycles each access was blocked
+system.cpu.l2cache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
+system.cpu.l2cache.fast_writes                      0                       # number of fast writes performed
+system.cpu.l2cache.cache_copies                     0                       # number of cache copies performed
+system.cpu.l2cache.writebacks::writebacks        57863                       # number of writebacks
+system.cpu.l2cache.writebacks::total            57863                       # number of writebacks
+system.cpu.l2cache.no_allocate_misses               0                       # Number of misses that were no-allocate
 system.iocache.replacements                         0                       # number of replacements
 system.iocache.tagsinuse                            0                       # Cycle average of tags in use
 system.iocache.total_refs                           0                       # Total number of references to valid blocks.