stats: update stats for cache occupancy and clock domain changes

4 files changed, 52 insertions, 16 deletions

diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/config.ini b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/config.ini
index 196c32809..ab338ac30 100644
--- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/config.ini
+++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/config.ini
@@ -12,7 +12,7 @@ time_sync_spin_threshold=100000000
 type=LinuxArmSystem
 children=bridge cf0 clk_domain cpu cpu_clk_domain intrctrl iobus iocache membus physmem realview terminal vncserver voltage_domain
 atags_addr=256
-boot_loader=/scratch/nilay/GEM5/system/binaries/boot.arm
+boot_loader=/dist/binaries/boot.arm
 boot_osflags=earlyprintk console=ttyAMA0 lpj=19988480 norandmaps rw loglevel=8 mem=128MB root=/dev/sda1
 cache_line_size=64
 clk_domain=system.clk_domain
@@ -23,7 +23,7 @@ eventq_index=0
 flags_addr=268435504
 gic_cpu_addr=520093952
 init_param=0
-kernel=/scratch/nilay/GEM5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
+kernel=/dist/binaries/vmlinux.arm.smp.fb.2.6.38.8
 load_addr_mask=268435455
 machine_type=RealView_PBX
 mem_mode=atomic
@@ -75,7 +75,7 @@ table_size=65536
 [system.cf0.image.child]
 type=RawDiskImage
 eventq_index=0
-image_file=/scratch/nilay/GEM5/system/disks/linux-arm-ael.img
+image_file=/dist/disks/linux-arm-ael.img
 read_only=true
 
 [system.clk_domain]
@@ -137,6 +137,7 @@ mshrs=4
 prefetch_on_access=false
 prefetcher=Null
 response_latency=2
+sequential_access=false
 size=32768
 system=system
 tags=system.cpu.dcache.tags
@@ -153,6 +154,7 @@ block_size=64
 clk_domain=system.cpu_clk_domain
 eventq_index=0
 hit_latency=2
+sequential_access=false
 size=32768
 
 [system.cpu.dtb]
@@ -185,6 +187,7 @@ mshrs=4
 prefetch_on_access=false
 prefetcher=Null
 response_latency=2
+sequential_access=false
 size=32768
 system=system
 tags=system.cpu.icache.tags
@@ -201,6 +204,7 @@ block_size=64
 clk_domain=system.cpu_clk_domain
 eventq_index=0
 hit_latency=2
+sequential_access=false
 size=32768
 
 [system.cpu.interrupts]
@@ -255,6 +259,7 @@ mshrs=20
 prefetch_on_access=false
 prefetcher=Null
 response_latency=20
+sequential_access=false
 size=4194304
 system=system
 tags=system.cpu.l2cache.tags
@@ -271,6 +276,7 @@ block_size=64
 clk_domain=system.cpu_clk_domain
 eventq_index=0
 hit_latency=20
+sequential_access=false
 size=4194304
 
 [system.cpu.toL2Bus]
@@ -324,6 +330,7 @@ mshrs=20
 prefetch_on_access=false
 prefetcher=Null
 response_latency=50
+sequential_access=false
 size=1024
 system=system
 tags=system.iocache.tags
@@ -340,6 +347,7 @@ block_size=64
 clk_domain=system.clk_domain
 eventq_index=0
 hit_latency=50
+sequential_access=false
 size=1024
 
 [system.membus]
diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/simerr b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/simerr
index eda827fb8..41742298b 100755
--- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/simerr
+++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/simerr
@@ -1,7 +1,6 @@
 warn: Sockets disabled, not accepting vnc client connections
 warn: Sockets disabled, not accepting terminal connections
 warn: Sockets disabled, not accepting gdb connections
-warn: DTB file specified, but no device tree support in kernel
 warn: The clidr register always reports 0 caches.
 warn: clidr LoUIS field of 0b001 to match current ARM implementations.
 warn: The csselr register isn't implemented.
@@ -14,4 +13,3 @@ warn: 	instruction 'mcr icimvau' unimplemented
 warn: LCD dual screen mode not supported
 warn: 	instruction 'mcr icialluis' unimplemented
 warn: 	instruction 'mcr bpiallis' unimplemented
-hack: be nice to actually delete the event here
diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/simout b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/simout
index 0ff7b53a5..8105d53fc 100755
--- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/simout
+++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/simout
@@ -1,14 +1,12 @@
-Redirecting stdout to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic/simout
-Redirecting stderr to build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Sep 22 2013 07:58:15
-gem5 started Sep 22 2013 08:30:49
-gem5 executing on zizzer
+gem5 compiled Jan 22 2014 17:24:06
+gem5 started Jan 22 2014 17:30:43
+gem5 executing on u200540-lin
 command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic -re tests/run.py build/ARM/tests/opt/quick/fs/10.linux-boot/arm/linux/realview-simple-atomic
 Global frequency set at 1000000000000 ticks per second
-info: kernel located at: /dist/m5/system/binaries/vmlinux.arm.smp.fb.2.6.38.8
+info: kernel located at: /dist/binaries/vmlinux.arm.smp.fb.2.6.38.8
 info: Using bootloader at address 0x80000000
 info: Entering event queue @ 0.  Starting simulation...
 Exiting @ tick 2332810264000 because m5_exit instruction encountered
diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/stats.txt b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/stats.txt
index cb6c51df2..0b833a71d 100644
--- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/stats.txt
+++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/stats.txt
@@ -4,13 +4,15 @@ sim_seconds                                  2.332810                       # Nu
 sim_ticks                                2332810264000                       # Number of ticks simulated
 final_tick                               2332810264000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 993135                       # Simulator instruction rate (inst/s)
-host_op_rate                                  1277110                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                            38352024586                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 443324                       # Number of bytes of host memory used
-host_seconds                                    60.83                       # Real time elapsed on the host
+host_inst_rate                                1656319                       # Simulator instruction rate (inst/s)
+host_op_rate                                  2129924                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                            63962280307                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 398176                       # Number of bytes of host memory used
+host_seconds                                    36.47                       # Real time elapsed on the host
 sim_insts                                    60408639                       # Number of instructions simulated
 sim_ops                                      77681819                       # Number of ops (including micro ops) simulated
+system.voltage_domain.voltage                       1                       # Voltage in Volts
+system.clk_domain.clock                          1000                       # Clock period in ticks
 system.physmem.bytes_read::realview.clcd    111673344                       # Number of bytes read from this memory
 system.physmem.bytes_read::cpu.dtb.walker          320                       # Number of bytes read from this memory
 system.physmem.bytes_read::cpu.itb.walker          192                       # Number of bytes read from this memory
@@ -72,6 +74,7 @@ system.cf0.dma_write_bytes                          0                       # Nu
 system.cf0.dma_write_txs                            0                       # Number of DMA write transactions.
 system.iobus.throughput                      48895252                       # Throughput (bytes/s)
 system.iobus.data_through_bus               114063346                       # Total data (bytes)
+system.cpu_clk_domain.clock                       500                       # Clock period in ticks
 system.cpu.dtb.inst_hits                            0                       # ITB inst hits
 system.cpu.dtb.inst_misses                          0                       # ITB inst misses
 system.cpu.dtb.read_hits                     14971214                       # DTB read hits
@@ -147,6 +150,14 @@ system.cpu.icache.tags.warmup_cycle        5709383000                       # Cy
 system.cpu.icache.tags.occ_blocks::cpu.inst   511.678593                       # Average occupied blocks per requestor
 system.cpu.icache.tags.occ_percent::cpu.inst     0.999372                       # Average percentage of cache occupancy
 system.cpu.icache.tags.occ_percent::total     0.999372                       # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_task_id_blocks::1024          512                       # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::0          177                       # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::1           78                       # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::2          255                       # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::3            2                       # Occupied blocks per task id
+system.cpu.icache.tags.occ_task_id_percent::1024            1                       # Percentage of cache occupancy per task id
+system.cpu.icache.tags.tag_accesses          62285702                       # Number of tag accesses
+system.cpu.icache.tags.data_accesses         62285702                       # Number of data accesses
 system.cpu.icache.ReadReq_hits::cpu.inst     60583498                       # number of ReadReq hits
 system.cpu.icache.ReadReq_hits::total        60583498                       # number of ReadReq hits
 system.cpu.icache.demand_hits::cpu.inst      60583498                       # number of demand (read+write) hits
@@ -197,6 +208,18 @@ system.cpu.l2cache.tags.occ_percent::cpu.itb.walker     0.000015
 system.cpu.l2cache.tags.occ_percent::cpu.inst     0.107036                       # Average percentage of cache occupancy
 system.cpu.l2cache.tags.occ_percent::cpu.data     0.092911                       # Average percentage of cache occupancy
 system.cpu.l2cache.tags.occ_percent::total     0.763050                       # Average percentage of cache occupancy
+system.cpu.l2cache.tags.occ_task_id_blocks::1023            5                       # Occupied blocks per task id
+system.cpu.l2cache.tags.occ_task_id_blocks::1024        65380                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1023::4            5                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::0           40                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::1          176                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::2         3589                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::3         9187                       # Occupied blocks per task id
+system.cpu.l2cache.tags.age_task_id_blocks_1024::4        52388                       # Occupied blocks per task id
+system.cpu.l2cache.tags.occ_task_id_percent::1023     0.000076                       # Percentage of cache occupancy per task id
+system.cpu.l2cache.tags.occ_task_id_percent::1024     0.997620                       # Percentage of cache occupancy per task id
+system.cpu.l2cache.tags.tag_accesses         17035899                       # Number of tag accesses
+system.cpu.l2cache.tags.data_accesses        17035899                       # Number of data accesses
 system.cpu.l2cache.ReadReq_hits::cpu.dtb.walker         7507                       # number of ReadReq hits
 system.cpu.l2cache.ReadReq_hits::cpu.itb.walker         3129                       # number of ReadReq hits
 system.cpu.l2cache.ReadReq_hits::cpu.inst       838871                       # number of ReadReq hits
@@ -297,6 +320,13 @@ system.cpu.dcache.tags.warmup_cycle          21763000                       # Cy
 system.cpu.dcache.tags.occ_blocks::cpu.data   511.997031                       # Average occupied blocks per requestor
 system.cpu.dcache.tags.occ_percent::cpu.data     0.999994                       # Average percentage of cache occupancy
 system.cpu.dcache.tags.occ_percent::total     0.999994                       # Average percentage of cache occupancy
+system.cpu.dcache.tags.occ_task_id_blocks::1024          512                       # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::0          278                       # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::1          208                       # Occupied blocks per task id
+system.cpu.dcache.tags.age_task_id_blocks_1024::2           26                       # Occupied blocks per task id
+system.cpu.dcache.tags.occ_task_id_percent::1024            1                       # Percentage of cache occupancy per task id
+system.cpu.dcache.tags.tag_accesses          97632617                       # Number of tag accesses
+system.cpu.dcache.tags.data_accesses         97632617                       # Number of data accesses
 system.cpu.dcache.ReadReq_hits::cpu.data     13180066                       # number of ReadReq hits
 system.cpu.dcache.ReadReq_hits::total        13180066                       # number of ReadReq hits
 system.cpu.dcache.WriteReq_hits::cpu.data      9962072                       # number of WriteReq hits
@@ -361,6 +391,8 @@ system.iocache.tags.total_refs                      0                       # To
 system.iocache.tags.sampled_refs                    0                       # Sample count of references to valid blocks.
 system.iocache.tags.avg_refs                      nan                       # Average number of references to valid blocks.
 system.iocache.tags.warmup_cycle                    0                       # Cycle when the warmup percentage was hit.
+system.iocache.tags.tag_accesses                    0                       # Number of tag accesses
+system.iocache.tags.data_accesses                   0                       # Number of data accesses
 system.iocache.blocked_cycles::no_mshrs             0                       # number of cycles access was blocked
 system.iocache.blocked_cycles::no_targets            0                       # number of cycles access was blocked
 system.iocache.blocked::no_mshrs                    0                       # number of cycles access was blocked