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author | Ali Saidi <Ali.Saidi@ARM.com> | 2014-10-29 23:18:29 -0500 |
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committer | Ali Saidi <Ali.Saidi@ARM.com> | 2014-10-29 23:18:29 -0500 |
commit | 93c0307d418e08db609818f19f5d2b02d45e7465 (patch) | |
tree | 1f72a6617fb4a74d904a933bc48136fa0760bd19 /tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/simerr | |
parent | f2db2a96d181f796e6e475121f10230b9d1d007f (diff) | |
download | gem5-93c0307d418e08db609818f19f5d2b02d45e7465.tar.xz |
tests: Update regressions for the new kernels and various preceeding fixes.
Diffstat (limited to 'tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/simerr')
-rwxr-xr-x | tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/simerr | 35 |
1 files changed, 31 insertions, 4 deletions
diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/simerr b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/simerr index 9dee17aa2..887c3abd5 100755 --- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/simerr +++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/simerr @@ -1,13 +1,40 @@ +warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes) warn: Sockets disabled, not accepting vnc client connections warn: Sockets disabled, not accepting terminal connections warn: Sockets disabled, not accepting gdb connections +warn: Existing EnergyCtrl, but no enabled DVFSHandler found. +warn: Not doing anything for miscreg ACTLR +warn: Not doing anything for write of miscreg ACTLR warn: The clidr register always reports 0 caches. warn: clidr LoUIS field of 0b001 to match current ARM implementations. warn: The csselr register isn't implemented. -warn: The ccsidr register isn't implemented and always reads as 0. +warn: instruction 'mcr dccmvau' unimplemented +warn: instruction 'mcr icimvau' unimplemented warn: instruction 'mcr bpiallis' unimplemented warn: instruction 'mcr icialluis' unimplemented warn: instruction 'mcr dccimvac' unimplemented -warn: instruction 'mcr dccmvau' unimplemented -warn: instruction 'mcr icimvau' unimplemented -warn: LCD dual screen mode not supported +warn: Tried to read RealView I/O at offset 0x60 that doesn't exist +warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist +warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist +warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist +warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist +warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist +warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist +warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist +warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist +warn: Tried to write RVIO at offset 0xa8 (data 0) that doesn't exist +warn: Not doing anything for miscreg ACTLR +warn: Not doing anything for write of miscreg ACTLR +warn: instruction 'mcr bpiall' unimplemented +warn: CP14 unimplemented crn[1], opc1[0], crm[3], opc2[4] +warn: CP14 unimplemented crn[1], opc1[0], crm[0], opc2[4] +warn: CP14 unimplemented crn[0], opc1[0], crm[7], opc2[0] +warn: Returning zero for read from miscreg pmcr +warn: Ignoring write to miscreg pmcntenclr +warn: Ignoring write to miscreg pmintenclr +warn: Ignoring write to miscreg pmovsr +warn: Ignoring write to miscreg pmcr +warn: Ignoring write to miscreg pmcntenclr +warn: Ignoring write to miscreg pmintenclr +warn: Ignoring write to miscreg pmovsr +warn: Ignoring write to miscreg pmcr |