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authorAndreas Hansson <andreas.hansson@arm.com>2014-09-03 07:42:59 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2014-09-03 07:42:59 -0400
commita217eba078b17c51f6a74c9237584f066ef78bf1 (patch)
treee566cbeb3520341dbdf6ecb0d3932a31d4e156fe /tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing
parentdb430698bfd4d77a49e11031bb65444552891f37 (diff)
downloadgem5-a217eba078b17c51f6a74c9237584f066ef78bf1.tar.xz
stats: Update stats for CPU and cache changes
This patch updates the stats to reflect the fixes and changes to the CPU (mainly the o3), and the caches.
Diffstat (limited to 'tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing')
-rw-r--r--tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/stats.txt1465
1 files changed, 745 insertions, 720 deletions
diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/stats.txt b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/stats.txt
index 41f066b07..563f1978d 100644
--- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/stats.txt
+++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/stats.txt
@@ -1,146 +1,134 @@
---------- Begin Simulation Statistics ----------
-sim_seconds 2.616230 # Number of seconds simulated
-sim_ticks 2616229847000 # Number of ticks simulated
-final_tick 2616229847000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_seconds 2.614581 # Number of seconds simulated
+sim_ticks 2614581252500 # Number of ticks simulated
+final_tick 2614581252500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 375445 # Simulator instruction rate (inst/s)
-host_op_rate 477768 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 16316419265 # Simulator tick rate (ticks/s)
-host_mem_usage 464828 # Number of bytes of host memory used
-host_seconds 160.34 # Real time elapsed on the host
-sim_insts 60200042 # Number of instructions simulated
-sim_ops 76606857 # Number of ops (including micro ops) simulated
+host_inst_rate 331710 # Simulator instruction rate (inst/s)
+host_op_rate 396174 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 14409825510 # Simulator tick rate (ticks/s)
+host_mem_usage 433940 # Number of bytes of host memory used
+host_seconds 181.44 # Real time elapsed on the host
+sim_insts 60186875 # Number of instructions simulated
+sim_ops 71883476 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
system.clk_domain.clock 1000 # Clock period in ticks
-system.realview.nvmem.bytes_read::cpu.inst 20 # Number of bytes read from this memory
-system.realview.nvmem.bytes_read::total 20 # Number of bytes read from this memory
-system.realview.nvmem.bytes_inst_read::cpu.inst 20 # Number of instructions bytes read from this memory
-system.realview.nvmem.bytes_inst_read::total 20 # Number of instructions bytes read from this memory
-system.realview.nvmem.num_reads::cpu.inst 5 # Number of read requests responded to by this memory
-system.realview.nvmem.num_reads::total 5 # Number of read requests responded to by this memory
-system.realview.nvmem.bw_read::cpu.inst 8 # Total read bandwidth from this memory (bytes/s)
-system.realview.nvmem.bw_read::total 8 # Total read bandwidth from this memory (bytes/s)
-system.realview.nvmem.bw_inst_read::cpu.inst 8 # Instruction read bandwidth from this memory (bytes/s)
-system.realview.nvmem.bw_inst_read::total 8 # Instruction read bandwidth from this memory (bytes/s)
-system.realview.nvmem.bw_total::cpu.inst 8 # Total bandwidth to/from this memory (bytes/s)
-system.realview.nvmem.bw_total::total 8 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bytes_read::realview.clcd 122683392 # Number of bytes read from this memory
system.physmem.bytes_read::cpu.dtb.walker 320 # Number of bytes read from this memory
system.physmem.bytes_read::cpu.itb.walker 128 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu.inst 703560 # Number of bytes read from this memory
-system.physmem.bytes_read::cpu.data 9089944 # Number of bytes read from this memory
-system.physmem.bytes_read::total 132477344 # Number of bytes read from this memory
-system.physmem.bytes_inst_read::cpu.inst 703560 # Number of instructions bytes read from this memory
-system.physmem.bytes_inst_read::total 703560 # Number of instructions bytes read from this memory
-system.physmem.bytes_written::writebacks 3706304 # Number of bytes written to this memory
+system.physmem.bytes_read::cpu.inst 704520 # Number of bytes read from this memory
+system.physmem.bytes_read::cpu.data 9109080 # Number of bytes read from this memory
+system.physmem.bytes_read::total 132497440 # Number of bytes read from this memory
+system.physmem.bytes_inst_read::cpu.inst 704520 # Number of instructions bytes read from this memory
+system.physmem.bytes_inst_read::total 704520 # Number of instructions bytes read from this memory
+system.physmem.bytes_written::writebacks 3720512 # Number of bytes written to this memory
system.physmem.bytes_written::cpu.data 3016072 # Number of bytes written to this memory
-system.physmem.bytes_written::total 6722376 # Number of bytes written to this memory
+system.physmem.bytes_written::total 6736584 # Number of bytes written to this memory
system.physmem.num_reads::realview.clcd 15335424 # Number of read requests responded to by this memory
system.physmem.num_reads::cpu.dtb.walker 5 # Number of read requests responded to by this memory
system.physmem.num_reads::cpu.itb.walker 2 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu.inst 17205 # Number of read requests responded to by this memory
-system.physmem.num_reads::cpu.data 142066 # Number of read requests responded to by this memory
-system.physmem.num_reads::total 15494702 # Number of read requests responded to by this memory
-system.physmem.num_writes::writebacks 57911 # Number of write requests responded to by this memory
+system.physmem.num_reads::cpu.inst 17220 # Number of read requests responded to by this memory
+system.physmem.num_reads::cpu.data 142355 # Number of read requests responded to by this memory
+system.physmem.num_reads::total 15495006 # Number of read requests responded to by this memory
+system.physmem.num_writes::writebacks 58133 # Number of write requests responded to by this memory
system.physmem.num_writes::cpu.data 754018 # Number of write requests responded to by this memory
-system.physmem.num_writes::total 811929 # Number of write requests responded to by this memory
-system.physmem.bw_read::realview.clcd 46893201 # Total read bandwidth from this memory (bytes/s)
+system.physmem.num_writes::total 812151 # Number of write requests responded to by this memory
+system.physmem.bw_read::realview.clcd 46922769 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::cpu.dtb.walker 122 # Total read bandwidth from this memory (bytes/s)
system.physmem.bw_read::cpu.itb.walker 49 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.inst 268921 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::cpu.data 3474444 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_read::total 50636737 # Total read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::cpu.inst 268921 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_inst_read::total 268921 # Instruction read bandwidth from this memory (bytes/s)
-system.physmem.bw_write::writebacks 1416658 # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_write::cpu.data 1152831 # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_write::total 2569490 # Write bandwidth from this memory (bytes/s)
-system.physmem.bw_total::writebacks 1416658 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::realview.clcd 46893201 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_read::cpu.inst 269458 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::cpu.data 3483954 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_read::total 50676352 # Total read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::cpu.inst 269458 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_inst_read::total 269458 # Instruction read bandwidth from this memory (bytes/s)
+system.physmem.bw_write::writebacks 1422986 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_write::cpu.data 1153558 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_write::total 2576544 # Write bandwidth from this memory (bytes/s)
+system.physmem.bw_total::writebacks 1422986 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::realview.clcd 46922769 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.dtb.walker 122 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.itb.walker 49 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.inst 268921 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::cpu.data 4627275 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.bw_total::total 53206227 # Total bandwidth to/from this memory (bytes/s)
-system.physmem.readReqs 15494702 # Number of read requests accepted
-system.physmem.writeReqs 811929 # Number of write requests accepted
-system.physmem.readBursts 15494702 # Number of DRAM read bursts, including those serviced by the write queue
-system.physmem.writeBursts 811929 # Number of DRAM write bursts, including those merged in the write queue
-system.physmem.bytesReadDRAM 991533248 # Total number of bytes read from DRAM
-system.physmem.bytesReadWrQ 127680 # Total number of bytes read from write queue
-system.physmem.bytesWritten 6729728 # Total number of bytes written to DRAM
-system.physmem.bytesReadSys 132477344 # Total read bytes from the system interface side
-system.physmem.bytesWrittenSys 6722376 # Total written bytes from the system interface side
-system.physmem.servicedByWrQ 1995 # Number of DRAM read bursts serviced by the write queue
-system.physmem.mergedWrBursts 706751 # Number of DRAM write bursts merged with an existing one
-system.physmem.neitherReadNorWriteReqs 4516 # Number of requests that are neither read nor write
-system.physmem.perBankRdBursts::0 967982 # Per bank write bursts
-system.physmem.perBankRdBursts::1 967715 # Per bank write bursts
-system.physmem.perBankRdBursts::2 967669 # Per bank write bursts
-system.physmem.perBankRdBursts::3 967754 # Per bank write bursts
-system.physmem.perBankRdBursts::4 974564 # Per bank write bursts
-system.physmem.perBankRdBursts::5 968184 # Per bank write bursts
-system.physmem.perBankRdBursts::6 967779 # Per bank write bursts
-system.physmem.perBankRdBursts::7 967692 # Per bank write bursts
-system.physmem.perBankRdBursts::8 968544 # Per bank write bursts
-system.physmem.perBankRdBursts::9 968137 # Per bank write bursts
-system.physmem.perBankRdBursts::10 967949 # Per bank write bursts
-system.physmem.perBankRdBursts::11 967746 # Per bank write bursts
-system.physmem.perBankRdBursts::12 967851 # Per bank write bursts
-system.physmem.perBankRdBursts::13 967741 # Per bank write bursts
-system.physmem.perBankRdBursts::14 967800 # Per bank write bursts
-system.physmem.perBankRdBursts::15 967600 # Per bank write bursts
-system.physmem.perBankWrBursts::0 6503 # Per bank write bursts
-system.physmem.perBankWrBursts::1 6305 # Per bank write bursts
-system.physmem.perBankWrBursts::2 6309 # Per bank write bursts
-system.physmem.perBankWrBursts::3 6231 # Per bank write bursts
-system.physmem.perBankWrBursts::4 6800 # Per bank write bursts
-system.physmem.perBankWrBursts::5 6982 # Per bank write bursts
-system.physmem.perBankWrBursts::6 6786 # Per bank write bursts
-system.physmem.perBankWrBursts::7 6777 # Per bank write bursts
-system.physmem.perBankWrBursts::8 7080 # Per bank write bursts
-system.physmem.perBankWrBursts::9 6733 # Per bank write bursts
-system.physmem.perBankWrBursts::10 6548 # Per bank write bursts
-system.physmem.perBankWrBursts::11 6441 # Per bank write bursts
-system.physmem.perBankWrBursts::12 6486 # Per bank write bursts
-system.physmem.perBankWrBursts::13 6281 # Per bank write bursts
-system.physmem.perBankWrBursts::14 6425 # Per bank write bursts
-system.physmem.perBankWrBursts::15 6465 # Per bank write bursts
+system.physmem.bw_total::cpu.inst 269458 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::cpu.data 4637512 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.bw_total::total 53252896 # Total bandwidth to/from this memory (bytes/s)
+system.physmem.readReqs 15495006 # Number of read requests accepted
+system.physmem.writeReqs 812151 # Number of write requests accepted
+system.physmem.readBursts 15495006 # Number of DRAM read bursts, including those serviced by the write queue
+system.physmem.writeBursts 812151 # Number of DRAM write bursts, including those merged in the write queue
+system.physmem.bytesReadDRAM 991553920 # Total number of bytes read from DRAM
+system.physmem.bytesReadWrQ 126464 # Total number of bytes read from write queue
+system.physmem.bytesWritten 6744512 # Total number of bytes written to DRAM
+system.physmem.bytesReadSys 132497440 # Total read bytes from the system interface side
+system.physmem.bytesWrittenSys 6736584 # Total written bytes from the system interface side
+system.physmem.servicedByWrQ 1976 # Number of DRAM read bursts serviced by the write queue
+system.physmem.mergedWrBursts 706747 # Number of DRAM write bursts merged with an existing one
+system.physmem.neitherReadNorWriteReqs 4511 # Number of requests that are neither read nor write
+system.physmem.perBankRdBursts::0 968147 # Per bank write bursts
+system.physmem.perBankRdBursts::1 967810 # Per bank write bursts
+system.physmem.perBankRdBursts::2 967673 # Per bank write bursts
+system.physmem.perBankRdBursts::3 967915 # Per bank write bursts
+system.physmem.perBankRdBursts::4 974375 # Per bank write bursts
+system.physmem.perBankRdBursts::5 968054 # Per bank write bursts
+system.physmem.perBankRdBursts::6 967653 # Per bank write bursts
+system.physmem.perBankRdBursts::7 967480 # Per bank write bursts
+system.physmem.perBankRdBursts::8 968459 # Per bank write bursts
+system.physmem.perBankRdBursts::9 968209 # Per bank write bursts
+system.physmem.perBankRdBursts::10 967967 # Per bank write bursts
+system.physmem.perBankRdBursts::11 967960 # Per bank write bursts
+system.physmem.perBankRdBursts::12 967929 # Per bank write bursts
+system.physmem.perBankRdBursts::13 967878 # Per bank write bursts
+system.physmem.perBankRdBursts::14 967953 # Per bank write bursts
+system.physmem.perBankRdBursts::15 967568 # Per bank write bursts
+system.physmem.perBankWrBursts::0 6652 # Per bank write bursts
+system.physmem.perBankWrBursts::1 6388 # Per bank write bursts
+system.physmem.perBankWrBursts::2 6319 # Per bank write bursts
+system.physmem.perBankWrBursts::3 6364 # Per bank write bursts
+system.physmem.perBankWrBursts::4 6622 # Per bank write bursts
+system.physmem.perBankWrBursts::5 6858 # Per bank write bursts
+system.physmem.perBankWrBursts::6 6646 # Per bank write bursts
+system.physmem.perBankWrBursts::7 6573 # Per bank write bursts
+system.physmem.perBankWrBursts::8 7007 # Per bank write bursts
+system.physmem.perBankWrBursts::9 6769 # Per bank write bursts
+system.physmem.perBankWrBursts::10 6571 # Per bank write bursts
+system.physmem.perBankWrBursts::11 6647 # Per bank write bursts
+system.physmem.perBankWrBursts::12 6565 # Per bank write bursts
+system.physmem.perBankWrBursts::13 6381 # Per bank write bursts
+system.physmem.perBankWrBursts::14 6555 # Per bank write bursts
+system.physmem.perBankWrBursts::15 6466 # Per bank write bursts
system.physmem.numRdRetry 0 # Number of times read queue was full causing retry
system.physmem.numWrRetry 0 # Number of times write queue was full causing retry
-system.physmem.totGap 2616225486000 # Total gap between requests
+system.physmem.totGap 2614576987500 # Total gap between requests
system.physmem.readPktSize::0 0 # Read request sizes (log2)
system.physmem.readPktSize::1 0 # Read request sizes (log2)
-system.physmem.readPktSize::2 6664 # Read request sizes (log2)
-system.physmem.readPktSize::3 15335424 # Read request sizes (log2)
+system.physmem.readPktSize::2 6644 # Read request sizes (log2)
+system.physmem.readPktSize::3 15335434 # Read request sizes (log2)
system.physmem.readPktSize::4 0 # Read request sizes (log2)
system.physmem.readPktSize::5 0 # Read request sizes (log2)
-system.physmem.readPktSize::6 152614 # Read request sizes (log2)
+system.physmem.readPktSize::6 152928 # Read request sizes (log2)
system.physmem.writePktSize::0 0 # Write request sizes (log2)
system.physmem.writePktSize::1 0 # Write request sizes (log2)
system.physmem.writePktSize::2 754018 # Write request sizes (log2)
system.physmem.writePktSize::3 0 # Write request sizes (log2)
system.physmem.writePktSize::4 0 # Write request sizes (log2)
system.physmem.writePktSize::5 0 # Write request sizes (log2)
-system.physmem.writePktSize::6 57911 # Write request sizes (log2)
-system.physmem.rdQLenPdf::0 1126567 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::1 970563 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::2 976518 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::3 1090618 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::4 986596 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::5 1051326 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::6 2724005 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::7 2632042 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::8 3421723 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::9 136210 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::10 113171 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::11 104737 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::12 101252 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::13 19730 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::14 18895 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::15 18668 # What read queue length does an incoming req see
-system.physmem.rdQLenPdf::16 86 # What read queue length does an incoming req see
+system.physmem.writePktSize::6 58133 # Write request sizes (log2)
+system.physmem.rdQLenPdf::0 1126497 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::1 970808 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::2 976433 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::3 1092616 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::4 986699 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::5 1053397 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::6 2722203 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::7 2628336 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::8 3415970 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::9 138177 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::10 115073 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::11 106569 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::12 103082 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::13 19658 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::14 18818 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::15 18605 # What read queue length does an incoming req see
+system.physmem.rdQLenPdf::16 89 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::17 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::18 0 # What read queue length does an incoming req see
system.physmem.rdQLenPdf::19 0 # What read queue length does an incoming req see
@@ -171,24 +159,24 @@ system.physmem.wrQLenPdf::11 1 # Wh
system.physmem.wrQLenPdf::12 1 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::13 1 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::14 1 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::15 3804 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::16 3835 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::17 6081 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::18 6095 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::19 6100 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::20 6096 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::21 6099 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::22 6095 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::23 6098 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::24 6095 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::25 6095 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::26 6095 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::27 6101 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::28 6096 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::29 6095 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::30 6094 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::31 6095 # What write queue length does an incoming req see
-system.physmem.wrQLenPdf::32 6094 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::15 3716 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::16 3737 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::17 6110 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::18 6121 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::19 6124 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::20 6122 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::21 6122 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::22 6122 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::23 6123 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::24 6121 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::25 6120 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::26 6124 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::27 6124 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::28 6121 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::29 6120 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::30 6121 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::31 6120 # What write queue length does an incoming req see
+system.physmem.wrQLenPdf::32 6121 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::33 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::34 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::35 0 # What write queue length does an incoming req see
@@ -220,124 +208,136 @@ system.physmem.wrQLenPdf::60 0 # Wh
system.physmem.wrQLenPdf::61 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::62 0 # What write queue length does an incoming req see
system.physmem.wrQLenPdf::63 0 # What write queue length does an incoming req see
-system.physmem.bytesPerActivate::samples 1027354 # Bytes accessed per row activation
-system.physmem.bytesPerActivate::mean 971.683544 # Bytes accessed per row activation
-system.physmem.bytesPerActivate::gmean 905.447521 # Bytes accessed per row activation
-system.physmem.bytesPerActivate::stdev 204.224200 # Bytes accessed per row activation
-system.physmem.bytesPerActivate::0-127 22943 2.23% 2.23% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::128-255 22460 2.19% 4.42% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::256-383 8461 0.82% 5.24% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::384-511 2563 0.25% 5.49% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::512-639 2504 0.24% 5.74% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::640-767 1783 0.17% 5.91% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::768-895 8706 0.85% 6.76% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::896-1023 969 0.09% 6.85% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::1024-1151 956965 93.15% 100.00% # Bytes accessed per row activation
-system.physmem.bytesPerActivate::total 1027354 # Bytes accessed per row activation
-system.physmem.rdPerTurnAround::samples 6094 # Reads before turning the bus around for writes
-system.physmem.rdPerTurnAround::mean 2542.286675 # Reads before turning the bus around for writes
-system.physmem.rdPerTurnAround::stdev 118884.715097 # Reads before turning the bus around for writes
-system.physmem.rdPerTurnAround::0-524287 6090 99.93% 99.93% # Reads before turning the bus around for writes
-system.physmem.rdPerTurnAround::524288-1.04858e+06 2 0.03% 99.97% # Reads before turning the bus around for writes
-system.physmem.rdPerTurnAround::2.09715e+06-2.62144e+06 1 0.02% 99.98% # Reads before turning the bus around for writes
+system.physmem.bytesPerActivate::samples 1027240 # Bytes accessed per row activation
+system.physmem.bytesPerActivate::mean 971.825895 # Bytes accessed per row activation
+system.physmem.bytesPerActivate::gmean 905.842120 # Bytes accessed per row activation
+system.physmem.bytesPerActivate::stdev 203.903622 # Bytes accessed per row activation
+system.physmem.bytesPerActivate::0-127 22776 2.22% 2.22% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::128-255 22448 2.19% 4.40% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::256-383 8450 0.82% 5.23% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::384-511 2555 0.25% 5.47% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::512-639 2575 0.25% 5.72% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::640-767 1819 0.18% 5.90% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::768-895 8664 0.84% 6.74% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::896-1023 942 0.09% 6.84% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::1024-1151 957011 93.16% 100.00% # Bytes accessed per row activation
+system.physmem.bytesPerActivate::total 1027240 # Bytes accessed per row activation
+system.physmem.rdPerTurnAround::samples 6120 # Reads before turning the bus around for writes
+system.physmem.rdPerTurnAround::mean 2531.539869 # Reads before turning the bus around for writes
+system.physmem.rdPerTurnAround::stdev 116318.280129 # Reads before turning the bus around for writes
+system.physmem.rdPerTurnAround::0-524287 6115 99.92% 99.92% # Reads before turning the bus around for writes
+system.physmem.rdPerTurnAround::524288-1.04858e+06 3 0.05% 99.97% # Reads before turning the bus around for writes
+system.physmem.rdPerTurnAround::1.04858e+06-1.57286e+06 1 0.02% 99.98% # Reads before turning the bus around for writes
system.physmem.rdPerTurnAround::8.38861e+06-8.9129e+06 1 0.02% 100.00% # Reads before turning the bus around for writes
-system.physmem.rdPerTurnAround::total 6094 # Reads before turning the bus around for writes
-system.physmem.wrPerTurnAround::samples 6094 # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::mean 17.255005 # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::gmean 17.227328 # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::stdev 0.967528 # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::16 2261 37.10% 37.10% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::17 29 0.48% 37.58% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::18 3794 62.26% 99.84% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::19 9 0.15% 99.98% # Writes before turning the bus around for reads
+system.physmem.rdPerTurnAround::total 6120 # Reads before turning the bus around for writes
+system.physmem.wrPerTurnAround::samples 6120 # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::mean 17.219444 # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::gmean 17.191199 # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::stdev 0.977796 # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::16 2386 38.99% 38.99% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::17 19 0.31% 39.30% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::18 3702 60.49% 99.79% # Writes before turning the bus around for reads
+system.physmem.wrPerTurnAround::19 12 0.20% 99.98% # Writes before turning the bus around for reads
system.physmem.wrPerTurnAround::20 1 0.02% 100.00% # Writes before turning the bus around for reads
-system.physmem.wrPerTurnAround::total 6094 # Writes before turning the bus around for reads
-system.physmem.totQLat 400062590250 # Total ticks spent queuing
-system.physmem.totMemAccLat 690550846500 # Total ticks spent from burst creation until serviced by the DRAM
-system.physmem.totBusLat 77463535000 # Total ticks spent in databus transfers
-system.physmem.avgQLat 25822.64 # Average queueing delay per DRAM burst
+system.physmem.wrPerTurnAround::total 6120 # Writes before turning the bus around for reads
+system.physmem.totQLat 400457727500 # Total ticks spent queuing
+system.physmem.totMemAccLat 690952040000 # Total ticks spent from burst creation until serviced by the DRAM
+system.physmem.totBusLat 77465150000 # Total ticks spent in databus transfers
+system.physmem.avgQLat 25847.61 # Average queueing delay per DRAM burst
system.physmem.avgBusLat 5000.00 # Average bus latency per DRAM burst
-system.physmem.avgMemAccLat 44572.64 # Average memory access latency per DRAM burst
-system.physmem.avgRdBW 378.99 # Average DRAM read bandwidth in MiByte/s
-system.physmem.avgWrBW 2.57 # Average achieved write bandwidth in MiByte/s
-system.physmem.avgRdBWSys 50.64 # Average system read bandwidth in MiByte/s
-system.physmem.avgWrBWSys 2.57 # Average system write bandwidth in MiByte/s
+system.physmem.avgMemAccLat 44597.61 # Average memory access latency per DRAM burst
+system.physmem.avgRdBW 379.24 # Average DRAM read bandwidth in MiByte/s
+system.physmem.avgWrBW 2.58 # Average achieved write bandwidth in MiByte/s
+system.physmem.avgRdBWSys 50.68 # Average system read bandwidth in MiByte/s
+system.physmem.avgWrBWSys 2.58 # Average system write bandwidth in MiByte/s
system.physmem.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s
system.physmem.busUtil 2.98 # Data bus utilization in percentage
system.physmem.busUtilRead 2.96 # Data bus utilization in percentage for reads
system.physmem.busUtilWrite 0.02 # Data bus utilization in percentage for writes
-system.physmem.avgRdQLen 6.59 # Average read queue length when enqueuing
-system.physmem.avgWrQLen 24.10 # Average write queue length when enqueuing
-system.physmem.readRowHits 14482119 # Number of row buffer hits during reads
-system.physmem.writeRowHits 88386 # Number of row buffer hits during writes
+system.physmem.avgRdQLen 6.67 # Average read queue length when enqueuing
+system.physmem.avgWrQLen 26.38 # Average write queue length when enqueuing
+system.physmem.readRowHits 14482583 # Number of row buffer hits during reads
+system.physmem.writeRowHits 88590 # Number of row buffer hits during writes
system.physmem.readRowHitRate 93.48 # Row buffer hit rate for reads
-system.physmem.writeRowHitRate 84.03 # Row buffer hit rate for writes
-system.physmem.avgGap 160439.36 # Average gap between requests
+system.physmem.writeRowHitRate 84.05 # Row buffer hit rate for writes
+system.physmem.avgGap 160333.10 # Average gap between requests
system.physmem.pageHitRate 93.41 # Row buffer hit rate, read and write combined
-system.physmem.memoryStateTime::IDLE 2245273695250 # Time in different power states
-system.physmem.memoryStateTime::REF 87361560000 # Time in different power states
+system.physmem.memoryStateTime::IDLE 2239817846000 # Time in different power states
+system.physmem.memoryStateTime::REF 87306440000 # Time in different power states
system.physmem.memoryStateTime::PRE_PDN 0 # Time in different power states
-system.physmem.memoryStateTime::ACT 283591722250 # Time in different power states
+system.physmem.memoryStateTime::ACT 287452006500 # Time in different power states
system.physmem.memoryStateTime::ACT_PDN 0 # Time in different power states
-system.membus.throughput 54122917 # Throughput (bytes/s)
-system.membus.trans_dist::ReadReq 16546592 # Transaction distribution
-system.membus.trans_dist::ReadResp 16546592 # Transaction distribution
-system.membus.trans_dist::WriteReq 763385 # Transaction distribution
-system.membus.trans_dist::WriteResp 763385 # Transaction distribution
-system.membus.trans_dist::Writeback 57911 # Transaction distribution
-system.membus.trans_dist::UpgradeReq 4516 # Transaction distribution
-system.membus.trans_dist::UpgradeResp 4516 # Transaction distribution
-system.membus.trans_dist::ReadExReq 132219 # Transaction distribution
-system.membus.trans_dist::ReadExResp 132219 # Transaction distribution
-system.membus.pkt_count_system.cpu.l2cache.mem_side::system.bridge.slave 2383090 # Packet count per connected master and slave (bytes)
+system.realview.nvmem.bytes_read::cpu.inst 20 # Number of bytes read from this memory
+system.realview.nvmem.bytes_read::total 20 # Number of bytes read from this memory
+system.realview.nvmem.bytes_inst_read::cpu.inst 20 # Number of instructions bytes read from this memory
+system.realview.nvmem.bytes_inst_read::total 20 # Number of instructions bytes read from this memory
+system.realview.nvmem.num_reads::cpu.inst 5 # Number of read requests responded to by this memory
+system.realview.nvmem.num_reads::total 5 # Number of read requests responded to by this memory
+system.realview.nvmem.bw_read::cpu.inst 8 # Total read bandwidth from this memory (bytes/s)
+system.realview.nvmem.bw_read::total 8 # Total read bandwidth from this memory (bytes/s)
+system.realview.nvmem.bw_inst_read::cpu.inst 8 # Instruction read bandwidth from this memory (bytes/s)
+system.realview.nvmem.bw_inst_read::total 8 # Instruction read bandwidth from this memory (bytes/s)
+system.realview.nvmem.bw_total::cpu.inst 8 # Total bandwidth to/from this memory (bytes/s)
+system.realview.nvmem.bw_total::total 8 # Total bandwidth to/from this memory (bytes/s)
+system.membus.throughput 54170150 # Throughput (bytes/s)
+system.membus.trans_dist::ReadReq 16546653 # Transaction distribution
+system.membus.trans_dist::ReadResp 16546653 # Transaction distribution
+system.membus.trans_dist::WriteReq 763381 # Transaction distribution
+system.membus.trans_dist::WriteResp 763381 # Transaction distribution
+system.membus.trans_dist::Writeback 58133 # Transaction distribution
+system.membus.trans_dist::UpgradeReq 4511 # Transaction distribution
+system.membus.trans_dist::UpgradeResp 4511 # Transaction distribution
+system.membus.trans_dist::ReadExReq 132457 # Transaction distribution
+system.membus.trans_dist::ReadExResp 132457 # Transaction distribution
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.bridge.slave 2383082 # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.cpu.l2cache.mem_side::system.realview.nvmem.port 10 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count_system.cpu.l2cache.mem_side::system.realview.gic.pio 3850 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.realview.gic.pio 3840 # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.cpu.l2cache.mem_side::system.realview.a9scu.pio 2 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 1893535 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count_system.cpu.l2cache.mem_side::total 4280487 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 1894355 # Packet count per connected master and slave (bytes)
+system.membus.pkt_count_system.cpu.l2cache.mem_side::total 4281289 # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 30670848 # Packet count per connected master and slave (bytes)
system.membus.pkt_count_system.iocache.mem_side::total 30670848 # Packet count per connected master and slave (bytes)
-system.membus.pkt_count::total 34951335 # Packet count per connected master and slave (bytes)
-system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.bridge.slave 2390546 # Cumulative packet size per connected master and slave (bytes)
+system.membus.pkt_count::total 34952137 # Packet count per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.bridge.slave 2390530 # Cumulative packet size per connected master and slave (bytes)
system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.realview.nvmem.port 20 # Cumulative packet size per connected master and slave (bytes)
-system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.realview.gic.pio 7700 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.realview.gic.pio 7680 # Cumulative packet size per connected master and slave (bytes)
system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.realview.a9scu.pio 4 # Cumulative packet size per connected master and slave (bytes)
-system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 16516328 # Cumulative packet size per connected master and slave (bytes)
-system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::total 18914598 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 16550632 # Cumulative packet size per connected master and slave (bytes)
+system.membus.tot_pkt_size_system.cpu.l2cache.mem_side::total 18948866 # Cumulative packet size per connected master and slave (bytes)
system.membus.tot_pkt_size_system.iocache.mem_side::system.physmem.port 122683392 # Cumulative packet size per connected master and slave (bytes)
system.membus.tot_pkt_size_system.iocache.mem_side::total 122683392 # Cumulative packet size per connected master and slave (bytes)
-system.membus.tot_pkt_size::total 141597990 # Cumulative packet size per connected master and slave (bytes)
-system.membus.data_through_bus 141597990 # Total data (bytes)
+system.membus.tot_pkt_size::total 141632258 # Cumulative packet size per connected master and slave (bytes)
+system.membus.data_through_bus 141632258 # Total data (bytes)
system.membus.snoop_data_through_bus 0 # Total snoop data (bytes)
-system.membus.reqLayer0.occupancy 1206224000 # Layer occupancy (ticks)
+system.membus.reqLayer0.occupancy 1207280500 # Layer occupancy (ticks)
system.membus.reqLayer0.utilization 0.0 # Layer utilization (%)
system.membus.reqLayer1.occupancy 5000 # Layer occupancy (ticks)
system.membus.reqLayer1.utilization 0.0 # Layer utilization (%)
-system.membus.reqLayer2.occupancy 3616500 # Layer occupancy (ticks)
+system.membus.reqLayer2.occupancy 3534000 # Layer occupancy (ticks)
system.membus.reqLayer2.utilization 0.0 # Layer utilization (%)
system.membus.reqLayer4.occupancy 1000 # Layer occupancy (ticks)
system.membus.reqLayer4.utilization 0.0 # Layer utilization (%)
-system.membus.reqLayer6.occupancy 17911182500 # Layer occupancy (ticks)
+system.membus.reqLayer6.occupancy 17916889500 # Layer occupancy (ticks)
system.membus.reqLayer6.utilization 0.7 # Layer utilization (%)
-system.membus.respLayer1.occupancy 4951111812 # Layer occupancy (ticks)
+system.membus.respLayer1.occupancy 4952195664 # Layer occupancy (ticks)
system.membus.respLayer1.utilization 0.2 # Layer utilization (%)
-system.membus.respLayer2.occupancy 37928474750 # Layer occupancy (ticks)
-system.membus.respLayer2.utilization 1.4 # Layer utilization (%)
+system.membus.respLayer2.occupancy 37921268500 # Layer occupancy (ticks)
+system.membus.respLayer2.utilization 1.5 # Layer utilization (%)
system.cf0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
system.cf0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
system.cf0.dma_read_txs 0 # Number of DMA read transactions (not PRD).
system.cf0.dma_write_full_pages 0 # Number of full page size DMA writes.
system.cf0.dma_write_bytes 0 # Number of bytes transfered via DMA writes.
system.cf0.dma_write_txs 0 # Number of DMA write transactions.
-system.iobus.throughput 47806938 # Throughput (bytes/s)
-system.iobus.trans_dist::ReadReq 16518786 # Transaction distribution
-system.iobus.trans_dist::ReadResp 16518786 # Transaction distribution
-system.iobus.trans_dist::WriteReq 8183 # Transaction distribution
-system.iobus.trans_dist::WriteResp 8183 # Transaction distribution
+system.iobus.throughput 47837076 # Throughput (bytes/s)
+system.iobus.trans_dist::ReadReq 16518783 # Transaction distribution
+system.iobus.trans_dist::ReadResp 16518783 # Transaction distribution
+system.iobus.trans_dist::WriteReq 8182 # Transaction distribution
+system.iobus.trans_dist::WriteResp 8182 # Transaction distribution
system.iobus.pkt_count_system.bridge.master::system.realview.uart.pio 30038 # Packet count per connected master and slave (bytes)
-system.iobus.pkt_count_system.bridge.master::system.realview.realview_io.pio 7946 # Packet count per connected master and slave (bytes)
-system.iobus.pkt_count_system.bridge.master::system.realview.timer0.pio 534 # Packet count per connected master and slave (bytes)
-system.iobus.pkt_count_system.bridge.master::system.realview.timer1.pio 1042 # Packet count per connected master and slave (bytes)
+system.iobus.pkt_count_system.bridge.master::system.realview.realview_io.pio 7942 # Packet count per connected master and slave (bytes)
+system.iobus.pkt_count_system.bridge.master::system.realview.timer0.pio 532 # Packet count per connected master and slave (bytes)
+system.iobus.pkt_count_system.bridge.master::system.realview.timer1.pio 1040 # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.bridge.master::system.realview.clcd.pio 36 # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.bridge.master::system.realview.kmi0.pio 124 # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.bridge.master::system.realview.kmi1.pio 746 # Packet count per connected master and slave (bytes)
@@ -357,14 +357,14 @@ system.iobus.pkt_count_system.bridge.master::system.realview.sci_fake.pio
system.iobus.pkt_count_system.bridge.master::system.realview.aaci_fake.pio 16 # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.bridge.master::system.realview.mmc_fake.pio 16 # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.bridge.master::system.realview.rtc.pio 16 # Packet count per connected master and slave (bytes)
-system.iobus.pkt_count_system.bridge.master::total 2383090 # Packet count per connected master and slave (bytes)
+system.iobus.pkt_count_system.bridge.master::total 2383082 # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.realview.clcd.dma::system.iocache.cpu_side 30670848 # Packet count per connected master and slave (bytes)
system.iobus.pkt_count_system.realview.clcd.dma::total 30670848 # Packet count per connected master and slave (bytes)
-system.iobus.pkt_count::total 33053938 # Packet count per connected master and slave (bytes)
+system.iobus.pkt_count::total 33053930 # Packet count per connected master and slave (bytes)
system.iobus.tot_pkt_size_system.bridge.master::system.realview.uart.pio 39333 # Cumulative packet size per connected master and slave (bytes)
-system.iobus.tot_pkt_size_system.bridge.master::system.realview.realview_io.pio 15892 # Cumulative packet size per connected master and slave (bytes)
-system.iobus.tot_pkt_size_system.bridge.master::system.realview.timer0.pio 1068 # Cumulative packet size per connected master and slave (bytes)
-system.iobus.tot_pkt_size_system.bridge.master::system.realview.timer1.pio 2084 # Cumulative packet size per connected master and slave (bytes)
+system.iobus.tot_pkt_size_system.bridge.master::system.realview.realview_io.pio 15884 # Cumulative packet size per connected master and slave (bytes)
+system.iobus.tot_pkt_size_system.bridge.master::system.realview.timer0.pio 1064 # Cumulative packet size per connected master and slave (bytes)
+system.iobus.tot_pkt_size_system.bridge.master::system.realview.timer1.pio 2080 # Cumulative packet size per connected master and slave (bytes)
system.iobus.tot_pkt_size_system.bridge.master::system.realview.clcd.pio 72 # Cumulative packet size per connected master and slave (bytes)
system.iobus.tot_pkt_size_system.bridge.master::system.realview.kmi0.pio 86 # Cumulative packet size per connected master and slave (bytes)
system.iobus.tot_pkt_size_system.bridge.master::system.realview.kmi1.pio 397 # Cumulative packet size per connected master and slave (bytes)
@@ -384,18 +384,18 @@ system.iobus.tot_pkt_size_system.bridge.master::system.realview.sci_fake.pio
system.iobus.tot_pkt_size_system.bridge.master::system.realview.aaci_fake.pio 32 # Cumulative packet size per connected master and slave (bytes)
system.iobus.tot_pkt_size_system.bridge.master::system.realview.mmc_fake.pio 32 # Cumulative packet size per connected master and slave (bytes)
system.iobus.tot_pkt_size_system.bridge.master::system.realview.rtc.pio 32 # Cumulative packet size per connected master and slave (bytes)
-system.iobus.tot_pkt_size_system.bridge.master::total 2390546 # Cumulative packet size per connected master and slave (bytes)
+system.iobus.tot_pkt_size_system.bridge.master::total 2390530 # Cumulative packet size per connected master and slave (bytes)
system.iobus.tot_pkt_size_system.realview.clcd.dma::system.iocache.cpu_side 122683392 # Cumulative packet size per connected master and slave (bytes)
system.iobus.tot_pkt_size_system.realview.clcd.dma::total 122683392 # Cumulative packet size per connected master and slave (bytes)
-system.iobus.tot_pkt_size::total 125073938 # Cumulative packet size per connected master and slave (bytes)
-system.iobus.data_through_bus 125073938 # Total data (bytes)
+system.iobus.tot_pkt_size::total 125073922 # Cumulative packet size per connected master and slave (bytes)
+system.iobus.data_through_bus 125073922 # Total data (bytes)
system.iobus.reqLayer0.occupancy 21111000 # Layer occupancy (ticks)
system.iobus.reqLayer0.utilization 0.0 # Layer utilization (%)
-system.iobus.reqLayer1.occupancy 3978000 # Layer occupancy (ticks)
+system.iobus.reqLayer1.occupancy 3976000 # Layer occupancy (ticks)
system.iobus.reqLayer1.utilization 0.0 # Layer utilization (%)
-system.iobus.reqLayer2.occupancy 534000 # Layer occupancy (ticks)
+system.iobus.reqLayer2.occupancy 532000 # Layer occupancy (ticks)
system.iobus.reqLayer2.utilization 0.0 # Layer utilization (%)
-system.iobus.reqLayer3.occupancy 527000 # Layer occupancy (ticks)
+system.iobus.reqLayer3.occupancy 526000 # Layer occupancy (ticks)
system.iobus.reqLayer3.utilization 0.0 # Layer utilization (%)
system.iobus.reqLayer4.occupancy 27000 # Layer occupancy (ticks)
system.iobus.reqLayer4.utilization 0.0 # Layer utilization (%)
@@ -437,9 +437,9 @@ system.iobus.reqLayer23.occupancy 8000 # La
system.iobus.reqLayer23.utilization 0.0 # Layer utilization (%)
system.iobus.reqLayer25.occupancy 15335424000 # Layer occupancy (ticks)
system.iobus.reqLayer25.utilization 0.6 # Layer utilization (%)
-system.iobus.respLayer0.occupancy 2374907000 # Layer occupancy (ticks)
+system.iobus.respLayer0.occupancy 2374900000 # Layer occupancy (ticks)
system.iobus.respLayer0.utilization 0.1 # Layer utilization (%)
-system.iobus.respLayer1.occupancy 38686102250 # Layer occupancy (ticks)
+system.iobus.respLayer1.occupancy 38692913500 # Layer occupancy (ticks)
system.iobus.respLayer1.utilization 1.5 # Layer utilization (%)
system.cpu_clk_domain.clock 500 # Clock period in ticks
system.cpu.dstage2_mmu.stage2_tlb.inst_hits 0 # ITB inst hits
@@ -465,25 +465,25 @@ system.cpu.dstage2_mmu.stage2_tlb.misses 0 # DT
system.cpu.dstage2_mmu.stage2_tlb.accesses 0 # DTB accesses
system.cpu.dtb.inst_hits 0 # ITB inst hits
system.cpu.dtb.inst_misses 0 # ITB inst misses
-system.cpu.dtb.read_hits 14996190 # DTB read hits
-system.cpu.dtb.read_misses 7339 # DTB read misses
-system.cpu.dtb.write_hits 11230344 # DTB write hits
-system.cpu.dtb.write_misses 2214 # DTB write misses
+system.cpu.dtb.read_hits 13160128 # DTB read hits
+system.cpu.dtb.read_misses 7329 # DTB read misses
+system.cpu.dtb.write_hits 11227968 # DTB write hits
+system.cpu.dtb.write_misses 2212 # DTB write misses
system.cpu.dtb.flush_tlb 2 # Number of times complete TLB was flushed
system.cpu.dtb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA
system.cpu.dtb.flush_tlb_mva_asid 1439 # Number of times TLB was flushed by MVA & ASID
system.cpu.dtb.flush_tlb_asid 63 # Number of times TLB was flushed by ASID
-system.cpu.dtb.flush_entries 3405 # Number of entries that have been flushed from TLB
+system.cpu.dtb.flush_entries 3401 # Number of entries that have been flushed from TLB
system.cpu.dtb.align_faults 0 # Number of TLB faults due to alignment restrictions
-system.cpu.dtb.prefetch_faults 192 # Number of TLB faults due to prefetch
+system.cpu.dtb.prefetch_faults 189 # Number of TLB faults due to prefetch
system.cpu.dtb.domain_faults 0 # Number of TLB faults due to domain restrictions
system.cpu.dtb.perms_faults 452 # Number of TLB faults due to permissions restrictions
-system.cpu.dtb.read_accesses 15003529 # DTB read accesses
-system.cpu.dtb.write_accesses 11232558 # DTB write accesses
+system.cpu.dtb.read_accesses 13167457 # DTB read accesses
+system.cpu.dtb.write_accesses 11230180 # DTB write accesses
system.cpu.dtb.inst_accesses 0 # ITB inst accesses
-system.cpu.dtb.hits 26226534 # DTB hits
-system.cpu.dtb.misses 9553 # DTB misses
-system.cpu.dtb.accesses 26236087 # DTB accesses
+system.cpu.dtb.hits 24388096 # DTB hits
+system.cpu.dtb.misses 9541 # DTB misses
+system.cpu.dtb.accesses 24397637 # DTB accesses
system.cpu.istage2_mmu.stage2_tlb.inst_hits 0 # ITB inst hits
system.cpu.istage2_mmu.stage2_tlb.inst_misses 0 # ITB inst misses
system.cpu.istage2_mmu.stage2_tlb.read_hits 0 # DTB read hits
@@ -505,7 +505,7 @@ system.cpu.istage2_mmu.stage2_tlb.inst_accesses 0
system.cpu.istage2_mmu.stage2_tlb.hits 0 # DTB hits
system.cpu.istage2_mmu.stage2_tlb.misses 0 # DTB misses
system.cpu.istage2_mmu.stage2_tlb.accesses 0 # DTB accesses
-system.cpu.itb.inst_hits 61493913 # ITB inst hits
+system.cpu.itb.inst_hits 61480692 # ITB inst hits
system.cpu.itb.inst_misses 4471 # ITB inst misses
system.cpu.itb.read_hits 0 # DTB read hits
system.cpu.itb.read_misses 0 # DTB read misses
@@ -522,123 +522,125 @@ system.cpu.itb.domain_faults 0 # Nu
system.cpu.itb.perms_faults 0 # Number of TLB faults due to permissions restrictions
system.cpu.itb.read_accesses 0 # DTB read accesses
system.cpu.itb.write_accesses 0 # DTB write accesses
-system.cpu.itb.inst_accesses 61498384 # ITB inst accesses
-system.cpu.itb.hits 61493913 # DTB hits
+system.cpu.itb.inst_accesses 61485163 # ITB inst accesses
+system.cpu.itb.hits 61480692 # DTB hits
system.cpu.itb.misses 4471 # DTB misses
-system.cpu.itb.accesses 61498384 # DTB accesses
-system.cpu.numCycles 5232459694 # number of cpu cycles simulated
+system.cpu.itb.accesses 61485163 # DTB accesses
+system.cpu.numCycles 5229162505 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
-system.cpu.committedInsts 60200042 # Number of instructions committed
-system.cpu.committedOps 76606857 # Number of ops (including micro ops) committed
-system.cpu.num_int_alu_accesses 69208585 # Number of integer alu accesses
+system.cpu.committedInsts 60186875 # Number of instructions committed
+system.cpu.committedOps 71883476 # Number of ops (including micro ops) committed
+system.cpu.num_int_alu_accesses 64248071 # Number of integer alu accesses
system.cpu.num_fp_alu_accesses 10269 # Number of float alu accesses
-system.cpu.num_func_calls 2140468 # number of times a function call or return occured
-system.cpu.num_conditional_control_insts 7948679 # number of instructions that are conditional controls
-system.cpu.num_int_insts 69208585 # number of integer instructions
+system.cpu.num_func_calls 2139776 # number of times a function call or return occured
+system.cpu.num_conditional_control_insts 7549008 # number of instructions that are conditional controls
+system.cpu.num_int_insts 64248071 # number of integer instructions
system.cpu.num_fp_insts 10269 # number of float instructions
-system.cpu.num_int_register_reads 401368270 # number of times the integer registers were read
-system.cpu.num_int_register_writes 74518872 # number of times the integer registers were written
+system.cpu.num_int_register_reads 116109819 # number of times the integer registers were read
+system.cpu.num_int_register_writes 42862791 # number of times the integer registers were written
system.cpu.num_fp_register_reads 7493 # number of times the floating registers were read
system.cpu.num_fp_register_writes 2780 # number of times the floating registers were written
-system.cpu.num_mem_refs 27394017 # number of memory refs
-system.cpu.num_load_insts 15660224 # Number of load instructions
-system.cpu.num_store_insts 11733793 # Number of store instructions
-system.cpu.num_idle_cycles 4581582300.610249 # Number of idle cycles
-system.cpu.num_busy_cycles 650877393.389751 # Number of busy cycles
-system.cpu.not_idle_fraction 0.124392 # Percentage of non-idle cycles
-system.cpu.idle_fraction 0.875608 # Percentage of idle cycles
-system.cpu.Branches 10308802 # Number of branches fetched
+system.cpu.num_cc_register_reads 257767219 # number of times the CC registers were read
+system.cpu.num_cc_register_writes 28995131 # number of times the CC registers were written
+system.cpu.num_mem_refs 25244051 # number of memory refs
+system.cpu.num_load_insts 13512687 # Number of load instructions
+system.cpu.num_store_insts 11731364 # Number of store instructions
+system.cpu.num_idle_cycles 4584182254.578246 # Number of idle cycles
+system.cpu.num_busy_cycles 644980250.421753 # Number of busy cycles
+system.cpu.not_idle_fraction 0.123343 # Percentage of non-idle cycles
+system.cpu.idle_fraction 0.876657 # Percentage of idle cycles
+system.cpu.Branches 10306559 # Number of branches fetched
system.cpu.op_class::No_OpClass 28518 0.04% 0.04% # Class of executed instruction
-system.cpu.op_class::IntAlu 50389316 64.68% 64.72% # Class of executed instruction
-system.cpu.op_class::IntMult 87585 0.11% 64.83% # Class of executed instruction
-system.cpu.op_class::IntDiv 0 0.00% 64.83% # Class of executed instruction
-system.cpu.op_class::FloatAdd 0 0.00% 64.83% # Class of executed instruction
-system.cpu.op_class::FloatCmp 0 0.00% 64.83% # Class of executed instruction
-system.cpu.op_class::FloatCvt 0 0.00% 64.83% # Class of executed instruction
-system.cpu.op_class::FloatMult 0 0.00% 64.83% # Class of executed instruction
-system.cpu.op_class::FloatDiv 0 0.00% 64.83% # Class of executed instruction
-system.cpu.op_class::FloatSqrt 0 0.00% 64.83% # Class of executed instruction
-system.cpu.op_class::SimdAdd 0 0.00% 64.83% # Class of executed instruction
-system.cpu.op_class::SimdAddAcc 0 0.00% 64.83% # Class of executed instruction
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-system.cpu.op_class::SimdMisc 0 0.00% 64.83% # Class of executed instruction
-system.cpu.op_class::SimdMult 0 0.00% 64.83% # Class of executed instruction
-system.cpu.op_class::SimdMultAcc 0 0.00% 64.83% # Class of executed instruction
-system.cpu.op_class::SimdShift 0 0.00% 64.83% # Class of executed instruction
-system.cpu.op_class::SimdShiftAcc 0 0.00% 64.83% # Class of executed instruction
-system.cpu.op_class::SimdSqrt 0 0.00% 64.83% # Class of executed instruction
-system.cpu.op_class::SimdFloatAdd 0 0.00% 64.83% # Class of executed instruction
-system.cpu.op_class::SimdFloatAlu 0 0.00% 64.83% # Class of executed instruction
-system.cpu.op_class::SimdFloatCmp 0 0.00% 64.83% # Class of executed instruction
-system.cpu.op_class::SimdFloatCvt 0 0.00% 64.83% # Class of executed instruction
-system.cpu.op_class::SimdFloatDiv 0 0.00% 64.83% # Class of executed instruction
-system.cpu.op_class::SimdFloatMisc 2109 0.00% 64.84% # Class of executed instruction
-system.cpu.op_class::SimdFloatMult 0 0.00% 64.84% # Class of executed instruction
-system.cpu.op_class::SimdFloatMultAcc 0 0.00% 64.84% # Class of executed instruction
-system.cpu.op_class::SimdFloatSqrt 0 0.00% 64.84% # Class of executed instruction
-system.cpu.op_class::MemRead 15660224 20.10% 84.94% # Class of executed instruction
-system.cpu.op_class::MemWrite 11733793 15.06% 100.00% # Class of executed instruction
+system.cpu.op_class::IntAlu 47576706 65.23% 65.27% # Class of executed instruction
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+system.cpu.op_class::SimdAddAcc 0 0.00% 65.39% # Class of executed instruction
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+system.cpu.op_class::SimdMultAcc 0 0.00% 65.39% # Class of executed instruction
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system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
-system.cpu.op_class::total 77901545 # Class of executed instruction
+system.cpu.op_class::total 72938935 # Class of executed instruction
system.cpu.kern.inst.arm 0 # number of arm instructions executed
-system.cpu.kern.inst.quiesce 83017 # number of quiesce instructions executed
-system.cpu.icache.tags.replacements 856351 # number of replacements
-system.cpu.icache.tags.tagsinuse 510.866135 # Cycle average of tags in use
-system.cpu.icache.tags.total_refs 60637050 # Total number of references to valid blocks.
-system.cpu.icache.tags.sampled_refs 856863 # Sample count of references to valid blocks.
-system.cpu.icache.tags.avg_refs 70.766330 # Average number of references to valid blocks.
-system.cpu.icache.tags.warmup_cycle 20005377250 # Cycle when the warmup percentage was hit.
-system.cpu.icache.tags.occ_blocks::cpu.inst 510.866135 # Average occupied blocks per requestor
-system.cpu.icache.tags.occ_percent::cpu.inst 0.997785 # Average percentage of cache occupancy
-system.cpu.icache.tags.occ_percent::total 0.997785 # Average percentage of cache occupancy
+system.cpu.kern.inst.quiesce 83001 # number of quiesce instructions executed
+system.cpu.icache.tags.replacements 855859 # number of replacements
+system.cpu.icache.tags.tagsinuse 510.877209 # Cycle average of tags in use
+system.cpu.icache.tags.total_refs 60624321 # Total number of references to valid blocks.
+system.cpu.icache.tags.sampled_refs 856371 # Sample count of references to valid blocks.
+system.cpu.icache.tags.avg_refs 70.792123 # Average number of references to valid blocks.
+system.cpu.icache.tags.warmup_cycle 19627747250 # Cycle when the warmup percentage was hit.
+system.cpu.icache.tags.occ_blocks::cpu.inst 510.877209 # Average occupied blocks per requestor
+system.cpu.icache.tags.occ_percent::cpu.inst 0.997807 # Average percentage of cache occupancy
+system.cpu.icache.tags.occ_percent::total 0.997807 # Average percentage of cache occupancy
system.cpu.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id
-system.cpu.icache.tags.age_task_id_blocks_1024::0 44 # Occupied blocks per task id
-system.cpu.icache.tags.age_task_id_blocks_1024::1 193 # Occupied blocks per task id
-system.cpu.icache.tags.age_task_id_blocks_1024::2 269 # Occupied blocks per task id
-system.cpu.icache.tags.age_task_id_blocks_1024::3 6 # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::0 45 # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::1 194 # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::2 266 # Occupied blocks per task id
+system.cpu.icache.tags.age_task_id_blocks_1024::3 7 # Occupied blocks per task id
system.cpu.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id
-system.cpu.icache.tags.tag_accesses 62350776 # Number of tag accesses
-system.cpu.icache.tags.data_accesses 62350776 # Number of data accesses
-system.cpu.icache.ReadReq_hits::cpu.inst 60637050 # number of ReadReq hits
-system.cpu.icache.ReadReq_hits::total 60637050 # number of ReadReq hits
-system.cpu.icache.demand_hits::cpu.inst 60637050 # number of demand (read+write) hits
-system.cpu.icache.demand_hits::total 60637050 # number of demand (read+write) hits
-system.cpu.icache.overall_hits::cpu.inst 60637050 # number of overall hits
-system.cpu.icache.overall_hits::total 60637050 # number of overall hits
-system.cpu.icache.ReadReq_misses::cpu.inst 856863 # number of ReadReq misses
-system.cpu.icache.ReadReq_misses::total 856863 # number of ReadReq misses
-system.cpu.icache.demand_misses::cpu.inst 856863 # number of demand (read+write) misses
-system.cpu.icache.demand_misses::total 856863 # number of demand (read+write) misses
-system.cpu.icache.overall_misses::cpu.inst 856863 # number of overall misses
-system.cpu.icache.overall_misses::total 856863 # number of overall misses
-system.cpu.icache.ReadReq_miss_latency::cpu.inst 11766560750 # number of ReadReq miss cycles
-system.cpu.icache.ReadReq_miss_latency::total 11766560750 # number of ReadReq miss cycles
-system.cpu.icache.demand_miss_latency::cpu.inst 11766560750 # number of demand (read+write) miss cycles
-system.cpu.icache.demand_miss_latency::total 11766560750 # number of demand (read+write) miss cycles
-system.cpu.icache.overall_miss_latency::cpu.inst 11766560750 # number of overall miss cycles
-system.cpu.icache.overall_miss_latency::total 11766560750 # number of overall miss cycles
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-system.cpu.icache.ReadReq_accesses::total 61493913 # number of ReadReq accesses(hits+misses)
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-system.cpu.icache.ReadReq_avg_miss_latency::total 13732.137751 # average ReadReq miss latency
-system.cpu.icache.demand_avg_miss_latency::cpu.inst 13732.137751 # average overall miss latency
-system.cpu.icache.demand_avg_miss_latency::total 13732.137751 # average overall miss latency
-system.cpu.icache.overall_avg_miss_latency::cpu.inst 13732.137751 # average overall miss latency
-system.cpu.icache.overall_avg_miss_latency::total 13732.137751 # average overall miss latency
+system.cpu.icache.tags.tag_accesses 62337063 # Number of tag accesses
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+system.cpu.icache.overall_miss_rate::total 0.013929 # miss rate for overall accesses
+system.cpu.icache.ReadReq_avg_miss_latency::cpu.inst 13736.983153 # average ReadReq miss latency
+system.cpu.icache.ReadReq_avg_miss_latency::total 13736.983153 # average ReadReq miss latency
+system.cpu.icache.demand_avg_miss_latency::cpu.inst 13736.983153 # average overall miss latency
+system.cpu.icache.demand_avg_miss_latency::total 13736.983153 # average overall miss latency
+system.cpu.icache.overall_avg_miss_latency::cpu.inst 13736.983153 # average overall miss latency
+system.cpu.icache.overall_avg_miss_latency::total 13736.983153 # average overall miss latency
system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked
system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked
@@ -647,186 +649,186 @@ system.cpu.icache.avg_blocked_cycles::no_mshrs nan
system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu.icache.fast_writes 0 # number of fast writes performed
system.cpu.icache.cache_copies 0 # number of cache copies performed
-system.cpu.icache.ReadReq_mshr_misses::cpu.inst 856863 # number of ReadReq MSHR misses
-system.cpu.icache.ReadReq_mshr_misses::total 856863 # number of ReadReq MSHR misses
-system.cpu.icache.demand_mshr_misses::cpu.inst 856863 # number of demand (read+write) MSHR misses
-system.cpu.icache.demand_mshr_misses::total 856863 # number of demand (read+write) MSHR misses
-system.cpu.icache.overall_mshr_misses::cpu.inst 856863 # number of overall MSHR misses
-system.cpu.icache.overall_mshr_misses::total 856863 # number of overall MSHR misses
-system.cpu.icache.ReadReq_mshr_miss_latency::cpu.inst 10048829250 # number of ReadReq MSHR miss cycles
-system.cpu.icache.ReadReq_mshr_miss_latency::total 10048829250 # number of ReadReq MSHR miss cycles
-system.cpu.icache.demand_mshr_miss_latency::cpu.inst 10048829250 # number of demand (read+write) MSHR miss cycles
-system.cpu.icache.demand_mshr_miss_latency::total 10048829250 # number of demand (read+write) MSHR miss cycles
-system.cpu.icache.overall_mshr_miss_latency::cpu.inst 10048829250 # number of overall MSHR miss cycles
-system.cpu.icache.overall_mshr_miss_latency::total 10048829250 # number of overall MSHR miss cycles
-system.cpu.icache.ReadReq_mshr_uncacheable_latency::cpu.inst 441046000 # number of ReadReq MSHR uncacheable cycles
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@@ -930,143 +932,166 @@ system.cpu.l2cache.overall_avg_mshr_uncacheable_latency::cpu.inst inf
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+system.cpu.dcache.LoadLockedReq_mshr_misses::cpu.data 11207 # number of LoadLockedReq MSHR misses
+system.cpu.dcache.LoadLockedReq_mshr_misses::total 11207 # number of LoadLockedReq MSHR misses
+system.cpu.dcache.demand_mshr_misses::cpu.data 544590 # number of demand (read+write) MSHR misses
+system.cpu.dcache.demand_mshr_misses::total 544590 # number of demand (read+write) MSHR misses
+system.cpu.dcache.overall_mshr_misses::cpu.data 618069 # number of overall MSHR misses
+system.cpu.dcache.overall_mshr_misses::total 618069 # number of overall MSHR misses
+system.cpu.dcache.ReadReq_mshr_miss_latency::cpu.data 3445567250 # number of ReadReq MSHR miss cycles
+system.cpu.dcache.ReadReq_mshr_miss_latency::total 3445567250 # number of ReadReq MSHR miss cycles
+system.cpu.dcache.WriteReq_mshr_miss_latency::cpu.data 10763005489 # number of WriteReq MSHR miss cycles
+system.cpu.dcache.WriteReq_mshr_miss_latency::total 10763005489 # number of WriteReq MSHR miss cycles
+system.cpu.dcache.SoftPFReq_mshr_miss_latency::cpu.data 1228271500 # number of SoftPFReq MSHR miss cycles
+system.cpu.dcache.SoftPFReq_mshr_miss_latency::total 1228271500 # number of SoftPFReq MSHR miss cycles
+system.cpu.dcache.LoadLockedReq_mshr_miss_latency::cpu.data 132710000 # number of LoadLockedReq MSHR miss cycles
+system.cpu.dcache.LoadLockedReq_mshr_miss_latency::total 132710000 # number of LoadLockedReq MSHR miss cycles
+system.cpu.dcache.demand_mshr_miss_latency::cpu.data 14208572739 # number of demand (read+write) MSHR miss cycles
+system.cpu.dcache.demand_mshr_miss_latency::total 14208572739 # number of demand (read+write) MSHR miss cycles
+system.cpu.dcache.overall_mshr_miss_latency::cpu.data 15436844239 # number of overall MSHR miss cycles
+system.cpu.dcache.overall_mshr_miss_latency::total 15436844239 # number of overall MSHR miss cycles
+system.cpu.dcache.ReadReq_mshr_uncacheable_latency::cpu.data 182058544250 # number of ReadReq MSHR uncacheable cycles
+system.cpu.dcache.ReadReq_mshr_uncacheable_latency::total 182058544250 # number of ReadReq MSHR uncacheable cycles
+system.cpu.dcache.WriteReq_mshr_uncacheable_latency::cpu.data 26242551425 # number of WriteReq MSHR uncacheable cycles
+system.cpu.dcache.WriteReq_mshr_uncacheable_latency::total 26242551425 # number of WriteReq MSHR uncacheable cycles
+system.cpu.dcache.overall_mshr_uncacheable_latency::cpu.data 208301095675 # number of overall MSHR uncacheable cycles
+system.cpu.dcache.overall_mshr_uncacheable_latency::total 208301095675 # number of overall MSHR uncacheable cycles
+system.cpu.dcache.ReadReq_mshr_miss_rate::cpu.data 0.025479 # mshr miss rate for ReadReq accesses
+system.cpu.dcache.ReadReq_mshr_miss_rate::total 0.025479 # mshr miss rate for ReadReq accesses
+system.cpu.dcache.WriteReq_mshr_miss_rate::cpu.data 0.024505 # mshr miss rate for WriteReq accesses
+system.cpu.dcache.WriteReq_mshr_miss_rate::total 0.024505 # mshr miss rate for WriteReq accesses
+system.cpu.dcache.SoftPFReq_mshr_miss_rate::cpu.data 0.398565 # mshr miss rate for SoftPFReq accesses
+system.cpu.dcache.SoftPFReq_mshr_miss_rate::total 0.398565 # mshr miss rate for SoftPFReq accesses
+system.cpu.dcache.LoadLockedReq_mshr_miss_rate::cpu.data 0.045251 # mshr miss rate for LoadLockedReq accesses
+system.cpu.dcache.LoadLockedReq_mshr_miss_rate::total 0.045251 # mshr miss rate for LoadLockedReq accesses
+system.cpu.dcache.demand_mshr_miss_rate::cpu.data 0.025022 # mshr miss rate for demand accesses
+system.cpu.dcache.demand_mshr_miss_rate::total 0.025022 # mshr miss rate for demand accesses
+system.cpu.dcache.overall_mshr_miss_rate::cpu.data 0.028159 # mshr miss rate for overall accesses
+system.cpu.dcache.overall_mshr_miss_rate::total 0.028159 # mshr miss rate for overall accesses
+system.cpu.dcache.ReadReq_avg_mshr_miss_latency::cpu.data 11714.476471 # average ReadReq mshr miss latency
+system.cpu.dcache.ReadReq_avg_mshr_miss_latency::total 11714.476471 # average ReadReq mshr miss latency
+system.cpu.dcache.WriteReq_avg_mshr_miss_latency::cpu.data 42972.780149 # average WriteReq mshr miss latency
+system.cpu.dcache.WriteReq_avg_mshr_miss_latency::total 42972.780149 # average WriteReq mshr miss latency
+system.cpu.dcache.SoftPFReq_avg_mshr_miss_latency::cpu.data 16715.952857 # average SoftPFReq mshr miss latency
+system.cpu.dcache.SoftPFReq_avg_mshr_miss_latency::total 16715.952857 # average SoftPFReq mshr miss latency
+system.cpu.dcache.LoadLockedReq_avg_mshr_miss_latency::cpu.data 11841.706077 # average LoadLockedReq mshr miss latency
+system.cpu.dcache.LoadLockedReq_avg_mshr_miss_latency::total 11841.706077 # average LoadLockedReq mshr miss latency
+system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 26090.403311 # average overall mshr miss latency
+system.cpu.dcache.demand_avg_mshr_miss_latency::total 26090.403311 # average overall mshr miss latency
+system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 24975.923787 # average overall mshr miss latency
+system.cpu.dcache.overall_avg_mshr_miss_latency::total 24975.923787 # average overall mshr miss latency
system.cpu.dcache.ReadReq_avg_mshr_uncacheable_latency::cpu.data inf # average ReadReq mshr uncacheable latency
system.cpu.dcache.ReadReq_avg_mshr_uncacheable_latency::total inf # average ReadReq mshr uncacheable latency
system.cpu.dcache.WriteReq_avg_mshr_uncacheable_latency::cpu.data inf # average WriteReq mshr uncacheable latency
@@ -1074,37 +1099,37 @@ system.cpu.dcache.WriteReq_avg_mshr_uncacheable_latency::total inf
system.cpu.dcache.overall_avg_mshr_uncacheable_latency::cpu.data inf # average overall mshr uncacheable latency
system.cpu.dcache.overall_avg_mshr_uncacheable_latency::total inf # average overall mshr uncacheable latency
system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate
-system.cpu.toL2Bus.throughput 52982138 # Throughput (bytes/s)
-system.cpu.toL2Bus.trans_dist::ReadReq 2454896 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::ReadResp 2454896 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::WriteReq 763385 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::WriteResp 763385 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::Writeback 595396 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::UpgradeReq 2928 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::UpgradeResp 2928 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::ReadExReq 247229 # Transaction distribution
-system.cpu.toL2Bus.trans_dist::ReadExResp 247229 # Transaction distribution
-system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1725354 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 5749970 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.itb.walker.dma::system.cpu.l2cache.cpu_side 12465 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count_system.cpu.dtb.walker.dma::system.cpu.l2cache.cpu_side 27449 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.pkt_count::total 7515238 # Packet count per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 54761180 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 83637066 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.itb.walker.dma::system.cpu.l2cache.cpu_side 14156 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size_system.cpu.dtb.walker.dma::system.cpu.l2cache.cpu_side 34872 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.tot_pkt_size::total 138447274 # Cumulative packet size per connected master and slave (bytes)
-system.cpu.toL2Bus.data_through_bus 138447274 # Total data (bytes)
-system.cpu.toL2Bus.snoop_data_through_bus 166176 # Total snoop data (bytes)
-system.cpu.toL2Bus.reqLayer0.occupancy 3009006000 # Layer occupancy (ticks)
+system.cpu.toL2Bus.throughput 52981595 # Throughput (bytes/s)
+system.cpu.toL2Bus.trans_dist::ReadReq 2453579 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::ReadResp 2453579 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::WriteReq 763381 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::WriteResp 763381 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::Writeback 594981 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::UpgradeReq 2922 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::UpgradeResp 2922 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::ReadExReq 247539 # Transaction distribution
+system.cpu.toL2Bus.trans_dist::ReadExResp 247539 # Transaction distribution
+system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 1724389 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 5748549 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.itb.walker.dma::system.cpu.l2cache.cpu_side 12041 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count_system.cpu.dtb.walker.dma::system.cpu.l2cache.cpu_side 26252 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.pkt_count::total 7511231 # Packet count per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 54730908 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 83579878 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.itb.walker.dma::system.cpu.l2cache.cpu_side 12460 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size_system.cpu.dtb.walker.dma::system.cpu.l2cache.cpu_side 30172 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.tot_pkt_size::total 138353418 # Cumulative packet size per connected master and slave (bytes)
+system.cpu.toL2Bus.data_through_bus 138353418 # Total data (bytes)
+system.cpu.toL2Bus.snoop_data_through_bus 171268 # Total snoop data (bytes)
+system.cpu.toL2Bus.reqLayer0.occupancy 3007873000 # Layer occupancy (ticks)
system.cpu.toL2Bus.reqLayer0.utilization 0.1 # Layer utilization (%)
-system.cpu.toL2Bus.respLayer0.occupancy 1295477750 # Layer occupancy (ticks)
+system.cpu.toL2Bus.respLayer0.occupancy 1294746250 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer0.utilization 0.0 # Layer utilization (%)
-system.cpu.toL2Bus.respLayer1.occupancy 2533767938 # Layer occupancy (ticks)
+system.cpu.toL2Bus.respLayer1.occupancy 2533153086 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer1.utilization 0.1 # Layer utilization (%)
system.cpu.toL2Bus.respLayer2.occupancy 8926000 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer2.utilization 0.0 # Layer utilization (%)
-system.cpu.toL2Bus.respLayer3.occupancy 18731500 # Layer occupancy (ticks)
+system.cpu.toL2Bus.respLayer3.occupancy 18709500 # Layer occupancy (ticks)
system.cpu.toL2Bus.respLayer3.utilization 0.0 # Layer utilization (%)
system.iocache.tags.replacements 0 # number of replacements
system.iocache.tags.tagsinuse 0 # Cycle average of tags in use
@@ -1122,10 +1147,10 @@ system.iocache.avg_blocked_cycles::no_mshrs nan #
system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.iocache.fast_writes 0 # number of fast writes performed
system.iocache.cache_copies 0 # number of cache copies performed
-system.iocache.ReadReq_mshr_uncacheable_latency::realview.clcd 1759698189250 # number of ReadReq MSHR uncacheable cycles
-system.iocache.ReadReq_mshr_uncacheable_latency::total 1759698189250 # number of ReadReq MSHR uncacheable cycles
-system.iocache.overall_mshr_uncacheable_latency::realview.clcd 1759698189250 # number of overall MSHR uncacheable cycles
-system.iocache.overall_mshr_uncacheable_latency::total 1759698189250 # number of overall MSHR uncacheable cycles
+system.iocache.ReadReq_mshr_uncacheable_latency::realview.clcd 1760059764500 # number of ReadReq MSHR uncacheable cycles
+system.iocache.ReadReq_mshr_uncacheable_latency::total 1760059764500 # number of ReadReq MSHR uncacheable cycles
+system.iocache.overall_mshr_uncacheable_latency::realview.clcd 1760059764500 # number of overall MSHR uncacheable cycles
+system.iocache.overall_mshr_uncacheable_latency::total 1760059764500 # number of overall MSHR uncacheable cycles
system.iocache.ReadReq_avg_mshr_uncacheable_latency::realview.clcd inf # average ReadReq mshr uncacheable latency
system.iocache.ReadReq_avg_mshr_uncacheable_latency::total inf # average ReadReq mshr uncacheable latency
system.iocache.overall_avg_mshr_uncacheable_latency::realview.clcd inf # average overall mshr uncacheable latency