diff options
| author | Andreas Hansson <andreas.hansson@arm.com> | 2016-02-10 04:08:27 -0500 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2016-02-10 04:08:27 -0500 |
| commit | c6cede244b431c167ac0213d89ad2bd7a0abbd96 (patch) | |
| tree | fb0e63d4172746d5b1a8edeb859f7ee68cfe13a6 /tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt | |
| parent | 83a5977481d55916b200740cf03748a20777bdf1 (diff) | |
| download | gem5-c6cede244b431c167ac0213d89ad2bd7a0abbd96.tar.xz | |
stats: Update stats to reflect changes to cache and crossbar
Diffstat (limited to 'tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt')
| -rw-r--r-- | tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt | 562 |
1 files changed, 281 insertions, 281 deletions
diff --git a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt index ed0884673..926ea5f21 100644 --- a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt +++ b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt @@ -1,16 +1,16 @@ ---------- Begin Simulation Statistics ---------- sim_seconds 5.112152 # Number of seconds simulated -sim_ticks 5112152301500 # Number of ticks simulated -final_tick 5112152301500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) +sim_ticks 5112151729000 # Number of ticks simulated +final_tick 5112151729000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 646932 # Simulator instruction rate (inst/s) -host_op_rate 1324411 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 16530551683 # Simulator tick rate (ticks/s) -host_mem_usage 604676 # Number of bytes of host memory used -host_seconds 309.26 # Real time elapsed on the host -sim_insts 200066731 # Number of instructions simulated -sim_ops 409580371 # Number of ops (including micro ops) simulated +host_inst_rate 1266983 # Simulator instruction rate (inst/s) +host_op_rate 2593792 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 32374197845 # Simulator tick rate (ticks/s) +host_mem_usage 659352 # Number of bytes of host memory used +host_seconds 157.91 # Real time elapsed on the host +sim_insts 200067055 # Number of instructions simulated +sim_ops 409581065 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts system.clk_domain.clock 1000 # Clock period in ticks system.physmem.bytes_read::cpu.dtb.walker 64 # Number of bytes read from this memory @@ -21,16 +21,16 @@ system.physmem.bytes_read::pc.south_bridge.ide 28352 system.physmem.bytes_read::total 11490752 # Number of bytes read from this memory system.physmem.bytes_inst_read::cpu.inst 846912 # Number of instructions bytes read from this memory system.physmem.bytes_inst_read::total 846912 # Number of instructions bytes read from this memory -system.physmem.bytes_written::writebacks 9270016 # Number of bytes written to this memory -system.physmem.bytes_written::total 9270016 # Number of bytes written to this memory +system.physmem.bytes_written::writebacks 9269888 # Number of bytes written to this memory +system.physmem.bytes_written::total 9269888 # Number of bytes written to this memory system.physmem.num_reads::cpu.dtb.walker 1 # Number of read requests responded to by this memory system.physmem.num_reads::cpu.itb.walker 5 # Number of read requests responded to by this memory system.physmem.num_reads::cpu.inst 13233 # Number of read requests responded to by this memory system.physmem.num_reads::cpu.data 165861 # Number of read requests responded to by this memory system.physmem.num_reads::pc.south_bridge.ide 443 # Number of read requests responded to by this memory system.physmem.num_reads::total 179543 # Number of read requests responded to by this memory -system.physmem.num_writes::writebacks 144844 # Number of write requests responded to by this memory -system.physmem.num_writes::total 144844 # Number of write requests responded to by this memory +system.physmem.num_writes::writebacks 144842 # Number of write requests responded to by this memory +system.physmem.num_writes::total 144842 # Number of write requests responded to by this memory system.physmem.bw_read::cpu.dtb.walker 13 # Total read bandwidth from this memory (bytes/s) system.physmem.bw_read::cpu.itb.walker 63 # Total read bandwidth from this memory (bytes/s) system.physmem.bw_read::cpu.inst 165666 # Total read bandwidth from this memory (bytes/s) @@ -39,48 +39,48 @@ system.physmem.bw_read::pc.south_bridge.ide 5546 # system.physmem.bw_read::total 2247733 # Total read bandwidth from this memory (bytes/s) system.physmem.bw_inst_read::cpu.inst 165666 # Instruction read bandwidth from this memory (bytes/s) system.physmem.bw_inst_read::total 165666 # Instruction read bandwidth from this memory (bytes/s) -system.physmem.bw_write::writebacks 1813329 # Write bandwidth from this memory (bytes/s) -system.physmem.bw_write::total 1813329 # Write bandwidth from this memory (bytes/s) -system.physmem.bw_total::writebacks 1813329 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_write::writebacks 1813305 # Write bandwidth from this memory (bytes/s) +system.physmem.bw_write::total 1813305 # Write bandwidth from this memory (bytes/s) +system.physmem.bw_total::writebacks 1813305 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu.dtb.walker 13 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu.itb.walker 63 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu.inst 165666 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu.data 2076445 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::pc.south_bridge.ide 5546 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::total 4061062 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::total 4061038 # Total bandwidth to/from this memory (bytes/s) system.cpu_clk_domain.clock 500 # Clock period in ticks system.cpu.apic_clk_domain.clock 8000 # Clock period in ticks -system.cpu.numCycles 10224308568 # number of cpu cycles simulated +system.cpu.numCycles 10224307424 # number of cpu cycles simulated system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed system.cpu.kern.inst.arm 0 # number of arm instructions executed system.cpu.kern.inst.quiesce 0 # number of quiesce instructions executed -system.cpu.committedInsts 200066731 # Number of instructions committed -system.cpu.committedOps 409580371 # Number of ops (including micro ops) committed -system.cpu.num_int_alu_accesses 374583495 # Number of integer alu accesses +system.cpu.committedInsts 200067055 # Number of instructions committed +system.cpu.committedOps 409581065 # Number of ops (including micro ops) committed +system.cpu.num_int_alu_accesses 374584177 # Number of integer alu accesses system.cpu.num_fp_alu_accesses 48 # Number of float alu accesses -system.cpu.num_func_calls 2308877 # number of times a function call or return occured -system.cpu.num_conditional_control_insts 40001070 # number of instructions that are conditional controls -system.cpu.num_int_insts 374583495 # number of integer instructions +system.cpu.num_func_calls 2308905 # number of times a function call or return occured +system.cpu.num_conditional_control_insts 40001120 # number of instructions that are conditional controls +system.cpu.num_int_insts 374584177 # number of integer instructions system.cpu.num_fp_insts 48 # number of float instructions -system.cpu.num_int_register_reads 682689563 # number of times the integer registers were read -system.cpu.num_int_register_writes 323557658 # number of times the integer registers were written +system.cpu.num_int_register_reads 682690924 # number of times the integer registers were read +system.cpu.num_int_register_writes 323558192 # number of times the integer registers were written system.cpu.num_fp_register_reads 48 # number of times the floating registers were read system.cpu.num_fp_register_writes 0 # number of times the floating registers were written -system.cpu.num_cc_register_reads 233837318 # number of times the CC registers were read -system.cpu.num_cc_register_writes 157316420 # number of times the CC registers were written -system.cpu.num_mem_refs 35667022 # number of memory refs -system.cpu.num_load_insts 27243255 # Number of load instructions -system.cpu.num_store_insts 8423767 # Number of store instructions -system.cpu.num_idle_cycles 9770324721.656570 # Number of idle cycles -system.cpu.num_busy_cycles 453983846.343430 # Number of busy cycles +system.cpu.num_cc_register_reads 233837631 # number of times the CC registers were read +system.cpu.num_cc_register_writes 157316591 # number of times the CC registers were written +system.cpu.num_mem_refs 35667176 # number of memory refs +system.cpu.num_load_insts 27243343 # Number of load instructions +system.cpu.num_store_insts 8423833 # Number of store instructions +system.cpu.num_idle_cycles 9770322790.617842 # Number of idle cycles +system.cpu.num_busy_cycles 453984633.382158 # Number of busy cycles system.cpu.not_idle_fraction 0.044402 # Percentage of non-idle cycles system.cpu.idle_fraction 0.955598 # Percentage of idle cycles -system.cpu.Branches 43152159 # Number of branches fetched -system.cpu.op_class::No_OpClass 172754 0.04% 0.04% # Class of executed instruction -system.cpu.op_class::IntAlu 373476545 91.18% 91.23% # Class of executed instruction -system.cpu.op_class::IntMult 144577 0.04% 91.26% # Class of executed instruction -system.cpu.op_class::IntDiv 123078 0.03% 91.29% # Class of executed instruction +system.cpu.Branches 43152262 # Number of branches fetched +system.cpu.op_class::No_OpClass 172765 0.04% 0.04% # Class of executed instruction +system.cpu.op_class::IntAlu 373477070 91.18% 91.23% # Class of executed instruction +system.cpu.op_class::IntMult 144574 0.04% 91.26% # Class of executed instruction +system.cpu.op_class::IntDiv 123086 0.03% 91.29% # Class of executed instruction system.cpu.op_class::FloatAdd 0 0.00% 91.29% # Class of executed instruction system.cpu.op_class::FloatCmp 0 0.00% 91.29% # Class of executed instruction system.cpu.op_class::FloatCvt 16 0.00% 91.29% # Class of executed instruction @@ -107,16 +107,16 @@ system.cpu.op_class::SimdFloatMisc 0 0.00% 91.29% # Cl system.cpu.op_class::SimdFloatMult 0 0.00% 91.29% # Class of executed instruction system.cpu.op_class::SimdFloatMultAcc 0 0.00% 91.29% # Class of executed instruction system.cpu.op_class::SimdFloatSqrt 0 0.00% 91.29% # Class of executed instruction -system.cpu.op_class::MemRead 27240665 6.65% 97.94% # Class of executed instruction -system.cpu.op_class::MemWrite 8423767 2.06% 100.00% # Class of executed instruction +system.cpu.op_class::MemRead 27240752 6.65% 97.94% # Class of executed instruction +system.cpu.op_class::MemWrite 8423833 2.06% 100.00% # Class of executed instruction system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction -system.cpu.op_class::total 409581402 # Class of executed instruction -system.cpu.dcache.tags.replacements 1621902 # number of replacements +system.cpu.op_class::total 409582096 # Class of executed instruction +system.cpu.dcache.tags.replacements 1621909 # number of replacements system.cpu.dcache.tags.tagsinuse 511.999425 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 20181182 # Total number of references to valid blocks. -system.cpu.dcache.tags.sampled_refs 1622414 # Sample count of references to valid blocks. -system.cpu.dcache.tags.avg_refs 12.438984 # Average number of references to valid blocks. +system.cpu.dcache.tags.total_refs 20181333 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 1622421 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 12.439024 # Average number of references to valid blocks. system.cpu.dcache.tags.warmup_cycle 7549500 # Cycle when the warmup percentage was hit. system.cpu.dcache.tags.occ_blocks::cpu.data 511.999425 # Average occupied blocks per requestor system.cpu.dcache.tags.occ_percent::cpu.data 0.999999 # Average percentage of cache occupancy @@ -126,48 +126,48 @@ system.cpu.dcache.tags.age_task_id_blocks_1024::0 282 system.cpu.dcache.tags.age_task_id_blocks_1024::1 202 # Occupied blocks per task id system.cpu.dcache.tags.age_task_id_blocks_1024::2 28 # Occupied blocks per task id system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id -system.cpu.dcache.tags.tag_accesses 88836888 # Number of tag accesses -system.cpu.dcache.tags.data_accesses 88836888 # Number of data accesses -system.cpu.dcache.ReadReq_hits::cpu.data 12023339 # number of ReadReq hits -system.cpu.dcache.ReadReq_hits::total 12023339 # number of ReadReq hits -system.cpu.dcache.WriteReq_hits::cpu.data 8096662 # number of WriteReq hits -system.cpu.dcache.WriteReq_hits::total 8096662 # number of WriteReq hits -system.cpu.dcache.SoftPFReq_hits::cpu.data 58900 # number of SoftPFReq hits -system.cpu.dcache.SoftPFReq_hits::total 58900 # number of SoftPFReq hits -system.cpu.dcache.demand_hits::cpu.data 20120001 # number of demand (read+write) hits -system.cpu.dcache.demand_hits::total 20120001 # number of demand (read+write) hits -system.cpu.dcache.overall_hits::cpu.data 20178901 # number of overall hits -system.cpu.dcache.overall_hits::total 20178901 # number of overall hits -system.cpu.dcache.ReadReq_misses::cpu.data 905249 # number of ReadReq misses -system.cpu.dcache.ReadReq_misses::total 905249 # number of ReadReq misses -system.cpu.dcache.WriteReq_misses::cpu.data 316707 # number of WriteReq misses -system.cpu.dcache.WriteReq_misses::total 316707 # number of WriteReq misses -system.cpu.dcache.SoftPFReq_misses::cpu.data 402757 # number of SoftPFReq misses -system.cpu.dcache.SoftPFReq_misses::total 402757 # number of SoftPFReq misses -system.cpu.dcache.demand_misses::cpu.data 1221956 # number of demand (read+write) misses -system.cpu.dcache.demand_misses::total 1221956 # number of demand (read+write) misses -system.cpu.dcache.overall_misses::cpu.data 1624713 # number of overall misses -system.cpu.dcache.overall_misses::total 1624713 # number of overall misses -system.cpu.dcache.ReadReq_accesses::cpu.data 12928588 # number of ReadReq accesses(hits+misses) -system.cpu.dcache.ReadReq_accesses::total 12928588 # number of ReadReq accesses(hits+misses) -system.cpu.dcache.WriteReq_accesses::cpu.data 8413369 # number of WriteReq accesses(hits+misses) -system.cpu.dcache.WriteReq_accesses::total 8413369 # number of WriteReq accesses(hits+misses) +system.cpu.dcache.tags.tag_accesses 88837527 # Number of tag accesses +system.cpu.dcache.tags.data_accesses 88837527 # Number of data accesses +system.cpu.dcache.ReadReq_hits::cpu.data 12023410 # number of ReadReq hits +system.cpu.dcache.ReadReq_hits::total 12023410 # number of ReadReq hits +system.cpu.dcache.WriteReq_hits::cpu.data 8096819 # number of WriteReq hits +system.cpu.dcache.WriteReq_hits::total 8096819 # number of WriteReq hits +system.cpu.dcache.SoftPFReq_hits::cpu.data 58904 # number of SoftPFReq hits +system.cpu.dcache.SoftPFReq_hits::total 58904 # number of SoftPFReq hits +system.cpu.dcache.demand_hits::cpu.data 20120229 # number of demand (read+write) hits +system.cpu.dcache.demand_hits::total 20120229 # number of demand (read+write) hits +system.cpu.dcache.overall_hits::cpu.data 20179133 # number of overall hits +system.cpu.dcache.overall_hits::total 20179133 # number of overall hits +system.cpu.dcache.ReadReq_misses::cpu.data 905268 # number of ReadReq misses +system.cpu.dcache.ReadReq_misses::total 905268 # number of ReadReq misses +system.cpu.dcache.WriteReq_misses::cpu.data 316618 # number of WriteReq misses +system.cpu.dcache.WriteReq_misses::total 316618 # number of WriteReq misses +system.cpu.dcache.SoftPFReq_misses::cpu.data 402753 # number of SoftPFReq misses +system.cpu.dcache.SoftPFReq_misses::total 402753 # number of SoftPFReq misses +system.cpu.dcache.demand_misses::cpu.data 1221886 # number of demand (read+write) misses +system.cpu.dcache.demand_misses::total 1221886 # number of demand (read+write) misses +system.cpu.dcache.overall_misses::cpu.data 1624639 # number of overall misses +system.cpu.dcache.overall_misses::total 1624639 # number of overall misses +system.cpu.dcache.ReadReq_accesses::cpu.data 12928678 # number of ReadReq accesses(hits+misses) +system.cpu.dcache.ReadReq_accesses::total 12928678 # number of ReadReq accesses(hits+misses) +system.cpu.dcache.WriteReq_accesses::cpu.data 8413437 # number of WriteReq accesses(hits+misses) +system.cpu.dcache.WriteReq_accesses::total 8413437 # number of WriteReq accesses(hits+misses) system.cpu.dcache.SoftPFReq_accesses::cpu.data 461657 # number of SoftPFReq accesses(hits+misses) system.cpu.dcache.SoftPFReq_accesses::total 461657 # number of SoftPFReq accesses(hits+misses) -system.cpu.dcache.demand_accesses::cpu.data 21341957 # number of demand (read+write) accesses -system.cpu.dcache.demand_accesses::total 21341957 # number of demand (read+write) accesses -system.cpu.dcache.overall_accesses::cpu.data 21803614 # number of overall (read+write) accesses -system.cpu.dcache.overall_accesses::total 21803614 # number of overall (read+write) accesses -system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.070019 # miss rate for ReadReq accesses -system.cpu.dcache.ReadReq_miss_rate::total 0.070019 # miss rate for ReadReq accesses -system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.037643 # miss rate for WriteReq accesses -system.cpu.dcache.WriteReq_miss_rate::total 0.037643 # miss rate for WriteReq accesses -system.cpu.dcache.SoftPFReq_miss_rate::cpu.data 0.872416 # miss rate for SoftPFReq accesses -system.cpu.dcache.SoftPFReq_miss_rate::total 0.872416 # miss rate for SoftPFReq accesses -system.cpu.dcache.demand_miss_rate::cpu.data 0.057256 # miss rate for demand accesses -system.cpu.dcache.demand_miss_rate::total 0.057256 # miss rate for demand accesses -system.cpu.dcache.overall_miss_rate::cpu.data 0.074516 # miss rate for overall accesses -system.cpu.dcache.overall_miss_rate::total 0.074516 # miss rate for overall accesses +system.cpu.dcache.demand_accesses::cpu.data 21342115 # number of demand (read+write) accesses +system.cpu.dcache.demand_accesses::total 21342115 # number of demand (read+write) accesses +system.cpu.dcache.overall_accesses::cpu.data 21803772 # number of overall (read+write) accesses +system.cpu.dcache.overall_accesses::total 21803772 # number of overall (read+write) accesses +system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.070020 # miss rate for ReadReq accesses +system.cpu.dcache.ReadReq_miss_rate::total 0.070020 # miss rate for ReadReq accesses +system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.037632 # miss rate for WriteReq accesses +system.cpu.dcache.WriteReq_miss_rate::total 0.037632 # miss rate for WriteReq accesses +system.cpu.dcache.SoftPFReq_miss_rate::cpu.data 0.872407 # miss rate for SoftPFReq accesses +system.cpu.dcache.SoftPFReq_miss_rate::total 0.872407 # miss rate for SoftPFReq accesses +system.cpu.dcache.demand_miss_rate::cpu.data 0.057252 # miss rate for demand accesses +system.cpu.dcache.demand_miss_rate::total 0.057252 # miss rate for demand accesses +system.cpu.dcache.overall_miss_rate::cpu.data 0.074512 # miss rate for overall accesses +system.cpu.dcache.overall_miss_rate::total 0.074512 # miss rate for overall accesses system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked @@ -176,16 +176,16 @@ system.cpu.dcache.avg_blocked_cycles::no_mshrs nan system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu.dcache.fast_writes 0 # number of fast writes performed system.cpu.dcache.cache_copies 0 # number of cache copies performed -system.cpu.dcache.writebacks::writebacks 1535779 # number of writebacks -system.cpu.dcache.writebacks::total 1535779 # number of writebacks +system.cpu.dcache.writebacks::writebacks 1535790 # number of writebacks +system.cpu.dcache.writebacks::total 1535790 # number of writebacks system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate system.cpu.dtb_walker_cache.tags.replacements 7749 # number of replacements -system.cpu.dtb_walker_cache.tags.tagsinuse 5.013997 # Cycle average of tags in use -system.cpu.dtb_walker_cache.tags.total_refs 12940 # Total number of references to valid blocks. +system.cpu.dtb_walker_cache.tags.tagsinuse 5.014001 # Cycle average of tags in use +system.cpu.dtb_walker_cache.tags.total_refs 12936 # Total number of references to valid blocks. system.cpu.dtb_walker_cache.tags.sampled_refs 7763 # Sample count of references to valid blocks. -system.cpu.dtb_walker_cache.tags.avg_refs 1.666881 # Average number of references to valid blocks. -system.cpu.dtb_walker_cache.tags.warmup_cycle 5100454141000 # Cycle when the warmup percentage was hit. -system.cpu.dtb_walker_cache.tags.occ_blocks::cpu.dtb.walker 5.013997 # Average occupied blocks per requestor +system.cpu.dtb_walker_cache.tags.avg_refs 1.666366 # Average number of references to valid blocks. +system.cpu.dtb_walker_cache.tags.warmup_cycle 5100450626500 # Cycle when the warmup percentage was hit. +system.cpu.dtb_walker_cache.tags.occ_blocks::cpu.dtb.walker 5.014001 # Average occupied blocks per requestor system.cpu.dtb_walker_cache.tags.occ_percent::cpu.dtb.walker 0.313375 # Average percentage of cache occupancy system.cpu.dtb_walker_cache.tags.occ_percent::total 0.313375 # Average percentage of cache occupancy system.cpu.dtb_walker_cache.tags.occ_task_id_blocks::1024 14 # Occupied blocks per task id @@ -193,32 +193,32 @@ system.cpu.dtb_walker_cache.tags.age_task_id_blocks_1024::0 5 system.cpu.dtb_walker_cache.tags.age_task_id_blocks_1024::1 5 # Occupied blocks per task id system.cpu.dtb_walker_cache.tags.age_task_id_blocks_1024::2 4 # Occupied blocks per task id system.cpu.dtb_walker_cache.tags.occ_task_id_percent::1024 0.875000 # Percentage of cache occupancy per task id -system.cpu.dtb_walker_cache.tags.tag_accesses 52753 # Number of tag accesses -system.cpu.dtb_walker_cache.tags.data_accesses 52753 # Number of data accesses -system.cpu.dtb_walker_cache.ReadReq_hits::cpu.dtb.walker 12941 # number of ReadReq hits -system.cpu.dtb_walker_cache.ReadReq_hits::total 12941 # number of ReadReq hits -system.cpu.dtb_walker_cache.demand_hits::cpu.dtb.walker 12941 # number of demand (read+write) hits -system.cpu.dtb_walker_cache.demand_hits::total 12941 # number of demand (read+write) hits -system.cpu.dtb_walker_cache.overall_hits::cpu.dtb.walker 12941 # number of overall hits -system.cpu.dtb_walker_cache.overall_hits::total 12941 # number of overall hits +system.cpu.dtb_walker_cache.tags.tag_accesses 52745 # Number of tag accesses +system.cpu.dtb_walker_cache.tags.data_accesses 52745 # Number of data accesses +system.cpu.dtb_walker_cache.ReadReq_hits::cpu.dtb.walker 12937 # number of ReadReq hits +system.cpu.dtb_walker_cache.ReadReq_hits::total 12937 # number of ReadReq hits +system.cpu.dtb_walker_cache.demand_hits::cpu.dtb.walker 12937 # number of demand (read+write) hits +system.cpu.dtb_walker_cache.demand_hits::total 12937 # number of demand (read+write) hits +system.cpu.dtb_walker_cache.overall_hits::cpu.dtb.walker 12937 # number of overall hits +system.cpu.dtb_walker_cache.overall_hits::total 12937 # number of overall hits system.cpu.dtb_walker_cache.ReadReq_misses::cpu.dtb.walker 8957 # number of ReadReq misses system.cpu.dtb_walker_cache.ReadReq_misses::total 8957 # number of ReadReq misses system.cpu.dtb_walker_cache.demand_misses::cpu.dtb.walker 8957 # number of demand (read+write) misses system.cpu.dtb_walker_cache.demand_misses::total 8957 # number of demand (read+write) misses system.cpu.dtb_walker_cache.overall_misses::cpu.dtb.walker 8957 # number of overall misses system.cpu.dtb_walker_cache.overall_misses::total 8957 # number of overall misses -system.cpu.dtb_walker_cache.ReadReq_accesses::cpu.dtb.walker 21898 # number of ReadReq accesses(hits+misses) -system.cpu.dtb_walker_cache.ReadReq_accesses::total 21898 # number of ReadReq accesses(hits+misses) -system.cpu.dtb_walker_cache.demand_accesses::cpu.dtb.walker 21898 # number of demand (read+write) accesses -system.cpu.dtb_walker_cache.demand_accesses::total 21898 # number of demand (read+write) accesses -system.cpu.dtb_walker_cache.overall_accesses::cpu.dtb.walker 21898 # number of overall (read+write) accesses -system.cpu.dtb_walker_cache.overall_accesses::total 21898 # number of overall (read+write) accesses -system.cpu.dtb_walker_cache.ReadReq_miss_rate::cpu.dtb.walker 0.409033 # miss rate for ReadReq accesses -system.cpu.dtb_walker_cache.ReadReq_miss_rate::total 0.409033 # miss rate for ReadReq accesses -system.cpu.dtb_walker_cache.demand_miss_rate::cpu.dtb.walker 0.409033 # miss rate for demand accesses -system.cpu.dtb_walker_cache.demand_miss_rate::total 0.409033 # miss rate for demand accesses -system.cpu.dtb_walker_cache.overall_miss_rate::cpu.dtb.walker 0.409033 # miss rate for overall accesses -system.cpu.dtb_walker_cache.overall_miss_rate::total 0.409033 # miss rate for overall accesses +system.cpu.dtb_walker_cache.ReadReq_accesses::cpu.dtb.walker 21894 # number of ReadReq accesses(hits+misses) +system.cpu.dtb_walker_cache.ReadReq_accesses::total 21894 # number of ReadReq accesses(hits+misses) +system.cpu.dtb_walker_cache.demand_accesses::cpu.dtb.walker 21894 # number of demand (read+write) accesses +system.cpu.dtb_walker_cache.demand_accesses::total 21894 # number of demand (read+write) accesses +system.cpu.dtb_walker_cache.overall_accesses::cpu.dtb.walker 21894 # number of overall (read+write) accesses +system.cpu.dtb_walker_cache.overall_accesses::total 21894 # number of overall (read+write) accesses +system.cpu.dtb_walker_cache.ReadReq_miss_rate::cpu.dtb.walker 0.409108 # miss rate for ReadReq accesses +system.cpu.dtb_walker_cache.ReadReq_miss_rate::total 0.409108 # miss rate for ReadReq accesses +system.cpu.dtb_walker_cache.demand_miss_rate::cpu.dtb.walker 0.409108 # miss rate for demand accesses +system.cpu.dtb_walker_cache.demand_miss_rate::total 0.409108 # miss rate for demand accesses +system.cpu.dtb_walker_cache.overall_miss_rate::cpu.dtb.walker 0.409108 # miss rate for overall accesses +system.cpu.dtb_walker_cache.overall_miss_rate::total 0.409108 # miss rate for overall accesses system.cpu.dtb_walker_cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked system.cpu.dtb_walker_cache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu.dtb_walker_cache.blocked::no_mshrs 0 # number of cycles access was blocked @@ -227,14 +227,14 @@ system.cpu.dtb_walker_cache.avg_blocked_cycles::no_mshrs nan system.cpu.dtb_walker_cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu.dtb_walker_cache.fast_writes 0 # number of fast writes performed system.cpu.dtb_walker_cache.cache_copies 0 # number of cache copies performed -system.cpu.dtb_walker_cache.writebacks::writebacks 2453 # number of writebacks -system.cpu.dtb_walker_cache.writebacks::total 2453 # number of writebacks +system.cpu.dtb_walker_cache.writebacks::writebacks 2897 # number of writebacks +system.cpu.dtb_walker_cache.writebacks::total 2897 # number of writebacks system.cpu.dtb_walker_cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.icache.tags.replacements 792216 # number of replacements +system.cpu.icache.tags.replacements 792340 # number of replacements system.cpu.icache.tags.tagsinuse 510.662956 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 243675150 # Total number of references to valid blocks. -system.cpu.icache.tags.sampled_refs 792728 # Sample count of references to valid blocks. -system.cpu.icache.tags.avg_refs 307.388095 # Average number of references to valid blocks. +system.cpu.icache.tags.total_refs 243675443 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 792852 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 307.340390 # Average number of references to valid blocks. system.cpu.icache.tags.warmup_cycle 148913118500 # Cycle when the warmup percentage was hit. system.cpu.icache.tags.occ_blocks::cpu.inst 510.662956 # Average occupied blocks per requestor system.cpu.icache.tags.occ_percent::cpu.inst 0.997389 # Average percentage of cache occupancy @@ -245,26 +245,26 @@ system.cpu.icache.tags.age_task_id_blocks_1024::1 130 system.cpu.icache.tags.age_task_id_blocks_1024::2 291 # Occupied blocks per task id system.cpu.icache.tags.age_task_id_blocks_1024::3 1 # Occupied blocks per task id system.cpu.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id -system.cpu.icache.tags.tag_accesses 245260620 # Number of tag accesses -system.cpu.icache.tags.data_accesses 245260620 # Number of data accesses -system.cpu.icache.ReadReq_hits::cpu.inst 243675150 # number of ReadReq hits -system.cpu.icache.ReadReq_hits::total 243675150 # number of ReadReq hits -system.cpu.icache.demand_hits::cpu.inst 243675150 # number of demand (read+write) hits -system.cpu.icache.demand_hits::total 243675150 # number of demand (read+write) hits -system.cpu.icache.overall_hits::cpu.inst 243675150 # number of overall hits -system.cpu.icache.overall_hits::total 243675150 # number of overall hits -system.cpu.icache.ReadReq_misses::cpu.inst 792735 # number of ReadReq misses -system.cpu.icache.ReadReq_misses::total 792735 # number of ReadReq misses -system.cpu.icache.demand_misses::cpu.inst 792735 # number of demand (read+write) misses -system.cpu.icache.demand_misses::total 792735 # number of demand (read+write) misses -system.cpu.icache.overall_misses::cpu.inst 792735 # number of overall misses -system.cpu.icache.overall_misses::total 792735 # number of overall misses -system.cpu.icache.ReadReq_accesses::cpu.inst 244467885 # number of ReadReq accesses(hits+misses) -system.cpu.icache.ReadReq_accesses::total 244467885 # number of ReadReq accesses(hits+misses) -system.cpu.icache.demand_accesses::cpu.inst 244467885 # number of demand (read+write) accesses -system.cpu.icache.demand_accesses::total 244467885 # number of demand (read+write) accesses -system.cpu.icache.overall_accesses::cpu.inst 244467885 # number of overall (read+write) accesses -system.cpu.icache.overall_accesses::total 244467885 # number of overall (read+write) accesses +system.cpu.icache.tags.tag_accesses 245261161 # Number of tag accesses +system.cpu.icache.tags.data_accesses 245261161 # Number of data accesses +system.cpu.icache.ReadReq_hits::cpu.inst 243675443 # number of ReadReq hits +system.cpu.icache.ReadReq_hits::total 243675443 # number of ReadReq hits +system.cpu.icache.demand_hits::cpu.inst 243675443 # number of demand (read+write) hits +system.cpu.icache.demand_hits::total 243675443 # number of demand (read+write) hits +system.cpu.icache.overall_hits::cpu.inst 243675443 # number of overall hits +system.cpu.icache.overall_hits::total 243675443 # number of overall hits +system.cpu.icache.ReadReq_misses::cpu.inst 792859 # number of ReadReq misses +system.cpu.icache.ReadReq_misses::total 792859 # number of ReadReq misses +system.cpu.icache.demand_misses::cpu.inst 792859 # number of demand (read+write) misses +system.cpu.icache.demand_misses::total 792859 # number of demand (read+write) misses +system.cpu.icache.overall_misses::cpu.inst 792859 # number of overall misses +system.cpu.icache.overall_misses::total 792859 # number of overall misses +system.cpu.icache.ReadReq_accesses::cpu.inst 244468302 # number of ReadReq accesses(hits+misses) +system.cpu.icache.ReadReq_accesses::total 244468302 # number of ReadReq accesses(hits+misses) +system.cpu.icache.demand_accesses::cpu.inst 244468302 # number of demand (read+write) accesses +system.cpu.icache.demand_accesses::total 244468302 # number of demand (read+write) accesses +system.cpu.icache.overall_accesses::cpu.inst 244468302 # number of overall (read+write) accesses +system.cpu.icache.overall_accesses::total 244468302 # number of overall (read+write) accesses system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.003243 # miss rate for ReadReq accesses system.cpu.icache.ReadReq_miss_rate::total 0.003243 # miss rate for ReadReq accesses system.cpu.icache.demand_miss_rate::cpu.inst 0.003243 # miss rate for demand accesses @@ -279,18 +279,18 @@ system.cpu.icache.avg_blocked_cycles::no_mshrs nan system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu.icache.fast_writes 0 # number of fast writes performed system.cpu.icache.cache_copies 0 # number of cache copies performed -system.cpu.icache.writebacks::writebacks 792216 # number of writebacks -system.cpu.icache.writebacks::total 792216 # number of writebacks +system.cpu.icache.writebacks::writebacks 792340 # number of writebacks +system.cpu.icache.writebacks::total 792340 # number of writebacks system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate system.cpu.itb_walker_cache.tags.replacements 3586 # number of replacements -system.cpu.itb_walker_cache.tags.tagsinuse 3.026546 # Cycle average of tags in use +system.cpu.itb_walker_cache.tags.tagsinuse 3.026555 # Cycle average of tags in use system.cpu.itb_walker_cache.tags.total_refs 7763 # Total number of references to valid blocks. system.cpu.itb_walker_cache.tags.sampled_refs 3597 # Sample count of references to valid blocks. system.cpu.itb_walker_cache.tags.avg_refs 2.158187 # Average number of references to valid blocks. -system.cpu.itb_walker_cache.tags.warmup_cycle 5102144896000 # Cycle when the warmup percentage was hit. -system.cpu.itb_walker_cache.tags.occ_blocks::cpu.itb.walker 3.026546 # Average occupied blocks per requestor -system.cpu.itb_walker_cache.tags.occ_percent::cpu.itb.walker 0.189159 # Average percentage of cache occupancy -system.cpu.itb_walker_cache.tags.occ_percent::total 0.189159 # Average percentage of cache occupancy +system.cpu.itb_walker_cache.tags.warmup_cycle 5102137159500 # Cycle when the warmup percentage was hit. +system.cpu.itb_walker_cache.tags.occ_blocks::cpu.itb.walker 3.026555 # Average occupied blocks per requestor +system.cpu.itb_walker_cache.tags.occ_percent::cpu.itb.walker 0.189160 # Average percentage of cache occupancy +system.cpu.itb_walker_cache.tags.occ_percent::total 0.189160 # Average percentage of cache occupancy system.cpu.itb_walker_cache.tags.occ_task_id_blocks::1024 11 # Occupied blocks per task id system.cpu.itb_walker_cache.tags.age_task_id_blocks_1024::0 6 # Occupied blocks per task id system.cpu.itb_walker_cache.tags.age_task_id_blocks_1024::2 4 # Occupied blocks per task id @@ -334,61 +334,61 @@ system.cpu.itb_walker_cache.avg_blocked_cycles::no_mshrs nan system.cpu.itb_walker_cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu.itb_walker_cache.fast_writes 0 # number of fast writes performed system.cpu.itb_walker_cache.cache_copies 0 # number of cache copies performed -system.cpu.itb_walker_cache.writebacks::writebacks 545 # number of writebacks -system.cpu.itb_walker_cache.writebacks::total 545 # number of writebacks +system.cpu.itb_walker_cache.writebacks::writebacks 700 # number of writebacks +system.cpu.itb_walker_cache.writebacks::total 700 # number of writebacks system.cpu.itb_walker_cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.tags.replacements 106204 # number of replacements -system.cpu.l2cache.tags.tagsinuse 64823.931309 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 4340224 # Total number of references to valid blocks. +system.cpu.l2cache.tags.replacements 106202 # number of replacements +system.cpu.l2cache.tags.tagsinuse 64823.935074 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 4340729 # Total number of references to valid blocks. system.cpu.l2cache.tags.sampled_refs 170162 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.avg_refs 25.506423 # Average number of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 25.509391 # Average number of references to valid blocks. system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.l2cache.tags.occ_blocks::writebacks 51928.965552 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::writebacks 51928.967732 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_blocks::cpu.dtb.walker 0.002478 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.itb.walker 0.135113 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.inst 2458.314401 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 10436.513764 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.itb.walker 0.135114 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.inst 2458.317021 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 10436.512729 # Average occupied blocks per requestor system.cpu.l2cache.tags.occ_percent::writebacks 0.792373 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.dtb.walker 0.000000 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.itb.walker 0.000002 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.inst 0.037511 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::cpu.data 0.159249 # Average percentage of cache occupancy system.cpu.l2cache.tags.occ_percent::total 0.989135 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_task_id_blocks::1024 63958 # Occupied blocks per task id +system.cpu.l2cache.tags.occ_task_id_blocks::1024 63960 # Occupied blocks per task id system.cpu.l2cache.tags.age_task_id_blocks_1024::0 57 # Occupied blocks per task id system.cpu.l2cache.tags.age_task_id_blocks_1024::1 233 # Occupied blocks per task id -system.cpu.l2cache.tags.age_task_id_blocks_1024::2 3349 # Occupied blocks per task id -system.cpu.l2cache.tags.age_task_id_blocks_1024::3 20908 # Occupied blocks per task id -system.cpu.l2cache.tags.age_task_id_blocks_1024::4 39411 # Occupied blocks per task id -system.cpu.l2cache.tags.occ_task_id_percent::1024 0.975922 # Percentage of cache occupancy per task id -system.cpu.l2cache.tags.tag_accesses 39255979 # Number of tag accesses -system.cpu.l2cache.tags.data_accesses 39255979 # Number of data accesses -system.cpu.l2cache.WritebackDirty_hits::writebacks 1538777 # number of WritebackDirty hits -system.cpu.l2cache.WritebackDirty_hits::total 1538777 # number of WritebackDirty hits -system.cpu.l2cache.WritebackClean_hits::writebacks 792205 # number of WritebackClean hits -system.cpu.l2cache.WritebackClean_hits::total 792205 # number of WritebackClean hits -system.cpu.l2cache.UpgradeReq_hits::cpu.data 21 # number of UpgradeReq hits -system.cpu.l2cache.UpgradeReq_hits::total 21 # number of UpgradeReq hits -system.cpu.l2cache.ReadExReq_hits::cpu.data 179774 # number of ReadExReq hits -system.cpu.l2cache.ReadExReq_hits::total 179774 # number of ReadExReq hits -system.cpu.l2cache.ReadCleanReq_hits::cpu.inst 779488 # number of ReadCleanReq hits -system.cpu.l2cache.ReadCleanReq_hits::total 779488 # number of ReadCleanReq hits -system.cpu.l2cache.ReadSharedReq_hits::cpu.dtb.walker 6656 # number of ReadSharedReq hits -system.cpu.l2cache.ReadSharedReq_hits::cpu.itb.walker 2896 # number of ReadSharedReq hits -system.cpu.l2cache.ReadSharedReq_hits::cpu.data 1275198 # number of ReadSharedReq hits -system.cpu.l2cache.ReadSharedReq_hits::total 1284750 # number of ReadSharedReq hits -system.cpu.l2cache.demand_hits::cpu.dtb.walker 6656 # number of demand (read+write) hits -system.cpu.l2cache.demand_hits::cpu.itb.walker 2896 # number of demand (read+write) hits -system.cpu.l2cache.demand_hits::cpu.inst 779488 # number of demand (read+write) hits -system.cpu.l2cache.demand_hits::cpu.data 1454972 # number of demand (read+write) hits -system.cpu.l2cache.demand_hits::total 2244012 # number of demand (read+write) hits -system.cpu.l2cache.overall_hits::cpu.dtb.walker 6656 # number of overall hits -system.cpu.l2cache.overall_hits::cpu.itb.walker 2896 # number of overall hits -system.cpu.l2cache.overall_hits::cpu.inst 779488 # number of overall hits -system.cpu.l2cache.overall_hits::cpu.data 1454972 # number of overall hits -system.cpu.l2cache.overall_hits::total 2244012 # number of overall hits -system.cpu.l2cache.UpgradeReq_misses::cpu.data 1808 # number of UpgradeReq misses -system.cpu.l2cache.UpgradeReq_misses::total 1808 # number of UpgradeReq misses +system.cpu.l2cache.tags.age_task_id_blocks_1024::2 3348 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::3 20880 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::4 39442 # Occupied blocks per task id +system.cpu.l2cache.tags.occ_task_id_percent::1024 0.975952 # Percentage of cache occupancy per task id +system.cpu.l2cache.tags.tag_accesses 39254568 # Number of tag accesses +system.cpu.l2cache.tags.data_accesses 39254568 # Number of data accesses +system.cpu.l2cache.WritebackDirty_hits::writebacks 1539387 # number of WritebackDirty hits +system.cpu.l2cache.WritebackDirty_hits::total 1539387 # number of WritebackDirty hits +system.cpu.l2cache.WritebackClean_hits::writebacks 792329 # number of WritebackClean hits +system.cpu.l2cache.WritebackClean_hits::total 792329 # number of WritebackClean hits +system.cpu.l2cache.UpgradeReq_hits::cpu.data 312 # number of UpgradeReq hits +system.cpu.l2cache.UpgradeReq_hits::total 312 # number of UpgradeReq hits +system.cpu.l2cache.ReadExReq_hits::cpu.data 179766 # number of ReadExReq hits +system.cpu.l2cache.ReadExReq_hits::total 179766 # number of ReadExReq hits +system.cpu.l2cache.ReadCleanReq_hits::cpu.inst 779612 # number of ReadCleanReq hits +system.cpu.l2cache.ReadCleanReq_hits::total 779612 # number of ReadCleanReq hits +system.cpu.l2cache.ReadSharedReq_hits::cpu.dtb.walker 6533 # number of ReadSharedReq hits +system.cpu.l2cache.ReadSharedReq_hits::cpu.itb.walker 2871 # number of ReadSharedReq hits +system.cpu.l2cache.ReadSharedReq_hits::cpu.data 1275070 # number of ReadSharedReq hits +system.cpu.l2cache.ReadSharedReq_hits::total 1284474 # number of ReadSharedReq hits +system.cpu.l2cache.demand_hits::cpu.dtb.walker 6533 # number of demand (read+write) hits +system.cpu.l2cache.demand_hits::cpu.itb.walker 2871 # number of demand (read+write) hits +system.cpu.l2cache.demand_hits::cpu.inst 779612 # number of demand (read+write) hits +system.cpu.l2cache.demand_hits::cpu.data 1454836 # number of demand (read+write) hits +system.cpu.l2cache.demand_hits::total 2243852 # number of demand (read+write) hits +system.cpu.l2cache.overall_hits::cpu.dtb.walker 6533 # number of overall hits +system.cpu.l2cache.overall_hits::cpu.itb.walker 2871 # number of overall hits +system.cpu.l2cache.overall_hits::cpu.inst 779612 # number of overall hits +system.cpu.l2cache.overall_hits::cpu.data 1454836 # number of overall hits +system.cpu.l2cache.overall_hits::total 2243852 # number of overall hits +system.cpu.l2cache.UpgradeReq_misses::cpu.data 1349 # number of UpgradeReq misses +system.cpu.l2cache.UpgradeReq_misses::total 1349 # number of UpgradeReq misses system.cpu.l2cache.ReadExReq_misses::cpu.data 134647 # number of ReadExReq misses system.cpu.l2cache.ReadExReq_misses::total 134647 # number of ReadExReq misses system.cpu.l2cache.ReadCleanReq_misses::cpu.inst 13234 # number of ReadCleanReq misses @@ -407,50 +407,50 @@ system.cpu.l2cache.overall_misses::cpu.itb.walker 5 system.cpu.l2cache.overall_misses::cpu.inst 13234 # number of overall misses system.cpu.l2cache.overall_misses::cpu.data 166811 # number of overall misses system.cpu.l2cache.overall_misses::total 180051 # number of overall misses -system.cpu.l2cache.WritebackDirty_accesses::writebacks 1538777 # number of WritebackDirty accesses(hits+misses) -system.cpu.l2cache.WritebackDirty_accesses::total 1538777 # number of WritebackDirty accesses(hits+misses) -system.cpu.l2cache.WritebackClean_accesses::writebacks 792205 # number of WritebackClean accesses(hits+misses) -system.cpu.l2cache.WritebackClean_accesses::total 792205 # number of WritebackClean accesses(hits+misses) -system.cpu.l2cache.UpgradeReq_accesses::cpu.data 1829 # number of UpgradeReq accesses(hits+misses) -system.cpu.l2cache.UpgradeReq_accesses::total 1829 # number of UpgradeReq accesses(hits+misses) -system.cpu.l2cache.ReadExReq_accesses::cpu.data 314421 # number of ReadExReq accesses(hits+misses) -system.cpu.l2cache.ReadExReq_accesses::total 314421 # number of ReadExReq accesses(hits+misses) -system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst 792722 # number of ReadCleanReq accesses(hits+misses) -system.cpu.l2cache.ReadCleanReq_accesses::total 792722 # number of ReadCleanReq accesses(hits+misses) -system.cpu.l2cache.ReadSharedReq_accesses::cpu.dtb.walker 6657 # number of ReadSharedReq accesses(hits+misses) -system.cpu.l2cache.ReadSharedReq_accesses::cpu.itb.walker 2901 # number of ReadSharedReq accesses(hits+misses) -system.cpu.l2cache.ReadSharedReq_accesses::cpu.data 1307362 # number of ReadSharedReq accesses(hits+misses) -system.cpu.l2cache.ReadSharedReq_accesses::total 1316920 # number of ReadSharedReq accesses(hits+misses) -system.cpu.l2cache.demand_accesses::cpu.dtb.walker 6657 # number of demand (read+write) accesses -system.cpu.l2cache.demand_accesses::cpu.itb.walker 2901 # number of demand (read+write) accesses -system.cpu.l2cache.demand_accesses::cpu.inst 792722 # number of demand (read+write) accesses -system.cpu.l2cache.demand_accesses::cpu.data 1621783 # number of demand (read+write) accesses -system.cpu.l2cache.demand_accesses::total 2424063 # number of demand (read+write) accesses -system.cpu.l2cache.overall_accesses::cpu.dtb.walker 6657 # number of overall (read+write) accesses -system.cpu.l2cache.overall_accesses::cpu.itb.walker 2901 # number of overall (read+write) accesses -system.cpu.l2cache.overall_accesses::cpu.inst 792722 # number of overall (read+write) accesses -system.cpu.l2cache.overall_accesses::cpu.data 1621783 # number of overall (read+write) accesses -system.cpu.l2cache.overall_accesses::total 2424063 # number of overall (read+write) accesses -system.cpu.l2cache.UpgradeReq_miss_rate::cpu.data 0.988518 # miss rate for UpgradeReq accesses -system.cpu.l2cache.UpgradeReq_miss_rate::total 0.988518 # miss rate for UpgradeReq accesses -system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 0.428238 # miss rate for ReadExReq accesses -system.cpu.l2cache.ReadExReq_miss_rate::total 0.428238 # miss rate for ReadExReq accesses -system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst 0.016694 # miss rate for ReadCleanReq accesses -system.cpu.l2cache.ReadCleanReq_miss_rate::total 0.016694 # miss rate for ReadCleanReq accesses -system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.dtb.walker 0.000150 # miss rate for ReadSharedReq accesses -system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.itb.walker 0.001724 # miss rate for ReadSharedReq accesses -system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data 0.024602 # miss rate for ReadSharedReq accesses -system.cpu.l2cache.ReadSharedReq_miss_rate::total 0.024428 # miss rate for ReadSharedReq accesses -system.cpu.l2cache.demand_miss_rate::cpu.dtb.walker 0.000150 # miss rate for demand accesses -system.cpu.l2cache.demand_miss_rate::cpu.itb.walker 0.001724 # miss rate for demand accesses -system.cpu.l2cache.demand_miss_rate::cpu.inst 0.016694 # miss rate for demand accesses -system.cpu.l2cache.demand_miss_rate::cpu.data 0.102857 # miss rate for demand accesses -system.cpu.l2cache.demand_miss_rate::total 0.074277 # miss rate for demand accesses -system.cpu.l2cache.overall_miss_rate::cpu.dtb.walker 0.000150 # miss rate for overall accesses -system.cpu.l2cache.overall_miss_rate::cpu.itb.walker 0.001724 # miss rate for overall accesses -system.cpu.l2cache.overall_miss_rate::cpu.inst 0.016694 # miss rate for overall accesses -system.cpu.l2cache.overall_miss_rate::cpu.data 0.102857 # miss rate for overall accesses -system.cpu.l2cache.overall_miss_rate::total 0.074277 # miss rate for overall accesses +system.cpu.l2cache.WritebackDirty_accesses::writebacks 1539387 # number of WritebackDirty accesses(hits+misses) +system.cpu.l2cache.WritebackDirty_accesses::total 1539387 # number of WritebackDirty accesses(hits+misses) +system.cpu.l2cache.WritebackClean_accesses::writebacks 792329 # number of WritebackClean accesses(hits+misses) +system.cpu.l2cache.WritebackClean_accesses::total 792329 # number of WritebackClean accesses(hits+misses) +system.cpu.l2cache.UpgradeReq_accesses::cpu.data 1661 # number of UpgradeReq accesses(hits+misses) +system.cpu.l2cache.UpgradeReq_accesses::total 1661 # number of UpgradeReq accesses(hits+misses) +system.cpu.l2cache.ReadExReq_accesses::cpu.data 314413 # number of ReadExReq accesses(hits+misses) +system.cpu.l2cache.ReadExReq_accesses::total 314413 # number of ReadExReq accesses(hits+misses) +system.cpu.l2cache.ReadCleanReq_accesses::cpu.inst 792846 # number of ReadCleanReq accesses(hits+misses) +system.cpu.l2cache.ReadCleanReq_accesses::total 792846 # number of ReadCleanReq accesses(hits+misses) +system.cpu.l2cache.ReadSharedReq_accesses::cpu.dtb.walker 6534 # number of ReadSharedReq accesses(hits+misses) +system.cpu.l2cache.ReadSharedReq_accesses::cpu.itb.walker 2876 # number of ReadSharedReq accesses(hits+misses) +system.cpu.l2cache.ReadSharedReq_accesses::cpu.data 1307234 # number of ReadSharedReq accesses(hits+misses) +system.cpu.l2cache.ReadSharedReq_accesses::total 1316644 # number of ReadSharedReq accesses(hits+misses) +system.cpu.l2cache.demand_accesses::cpu.dtb.walker 6534 # number of demand (read+write) accesses +system.cpu.l2cache.demand_accesses::cpu.itb.walker 2876 # number of demand (read+write) accesses +system.cpu.l2cache.demand_accesses::cpu.inst 792846 # number of demand (read+write) accesses +system.cpu.l2cache.demand_accesses::cpu.data 1621647 # number of demand (read+write) accesses +system.cpu.l2cache.demand_accesses::total 2423903 # number of demand (read+write) accesses +system.cpu.l2cache.overall_accesses::cpu.dtb.walker 6534 # number of overall (read+write) accesses +system.cpu.l2cache.overall_accesses::cpu.itb.walker 2876 # number of overall (read+write) accesses +system.cpu.l2cache.overall_accesses::cpu.inst 792846 # number of overall (read+write) accesses +system.cpu.l2cache.overall_accesses::cpu.data 1621647 # number of overall (read+write) accesses +system.cpu.l2cache.overall_accesses::total 2423903 # number of overall (read+write) accesses +system.cpu.l2cache.UpgradeReq_miss_rate::cpu.data 0.812161 # miss rate for UpgradeReq accesses +system.cpu.l2cache.UpgradeReq_miss_rate::total 0.812161 # miss rate for UpgradeReq accesses +system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 0.428249 # miss rate for ReadExReq accesses +system.cpu.l2cache.ReadExReq_miss_rate::total 0.428249 # miss rate for ReadExReq accesses +system.cpu.l2cache.ReadCleanReq_miss_rate::cpu.inst 0.016692 # miss rate for ReadCleanReq accesses +system.cpu.l2cache.ReadCleanReq_miss_rate::total 0.016692 # miss rate for ReadCleanReq accesses +system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.dtb.walker 0.000153 # miss rate for ReadSharedReq accesses +system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.itb.walker 0.001739 # miss rate for ReadSharedReq accesses +system.cpu.l2cache.ReadSharedReq_miss_rate::cpu.data 0.024605 # miss rate for ReadSharedReq accesses +system.cpu.l2cache.ReadSharedReq_miss_rate::total 0.024433 # miss rate for ReadSharedReq accesses +system.cpu.l2cache.demand_miss_rate::cpu.dtb.walker 0.000153 # miss rate for demand accesses +system.cpu.l2cache.demand_miss_rate::cpu.itb.walker 0.001739 # miss rate for demand accesses +system.cpu.l2cache.demand_miss_rate::cpu.inst 0.016692 # miss rate for demand accesses +system.cpu.l2cache.demand_miss_rate::cpu.data 0.102865 # miss rate for demand accesses +system.cpu.l2cache.demand_miss_rate::total 0.074281 # miss rate for demand accesses +system.cpu.l2cache.overall_miss_rate::cpu.dtb.walker 0.000153 # miss rate for overall accesses +system.cpu.l2cache.overall_miss_rate::cpu.itb.walker 0.001739 # miss rate for overall accesses +system.cpu.l2cache.overall_miss_rate::cpu.inst 0.016692 # miss rate for overall accesses +system.cpu.l2cache.overall_miss_rate::cpu.data 0.102865 # miss rate for overall accesses +system.cpu.l2cache.overall_miss_rate::total 0.074281 # miss rate for overall accesses system.cpu.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked system.cpu.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked @@ -459,44 +459,44 @@ system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked system.cpu.l2cache.fast_writes 0 # number of fast writes performed system.cpu.l2cache.cache_copies 0 # number of cache copies performed -system.cpu.l2cache.writebacks::writebacks 98177 # number of writebacks -system.cpu.l2cache.writebacks::total 98177 # number of writebacks +system.cpu.l2cache.writebacks::writebacks 98175 # number of writebacks +system.cpu.l2cache.writebacks::total 98175 # number of writebacks system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.toL2Bus.snoop_filter.tot_requests 4856313 # Total number of requests made to the snoop filter. -system.cpu.toL2Bus.snoop_filter.hit_single_requests 2425286 # Number of requests hitting in the snoop filter with a single holder of the requested data. +system.cpu.toL2Bus.snoop_filter.tot_requests 4856494 # Total number of requests made to the snoop filter. +system.cpu.toL2Bus.snoop_filter.hit_single_requests 2425336 # Number of requests hitting in the snoop filter with a single holder of the requested data. system.cpu.toL2Bus.snoop_filter.hit_multi_requests 11672 # Number of requests hitting in the snoop filter with multiple (>1) holders of the requested data. system.cpu.toL2Bus.snoop_filter.tot_snoops 1230 # Total number of snoops made to the snoop filter. system.cpu.toL2Bus.snoop_filter.hit_single_snoops 1230 # Number of snoops hitting in the snoop filter with a single holder of the requested data. system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. system.cpu.toL2Bus.trans_dist::ReadReq 13857337 # Transaction distribution -system.cpu.toL2Bus.trans_dist::ReadResp 15971490 # Transaction distribution +system.cpu.toL2Bus.trans_dist::ReadResp 15971629 # Transaction distribution system.cpu.toL2Bus.trans_dist::WriteReq 13943 # Transaction distribution system.cpu.toL2Bus.trans_dist::WriteResp 13943 # Transaction distribution -system.cpu.toL2Bus.trans_dist::WritebackDirty 1538777 # Transaction distribution -system.cpu.toL2Bus.trans_dist::WritebackClean 792205 # Transaction distribution -system.cpu.toL2Bus.trans_dist::CleanEvict 88200 # Transaction distribution -system.cpu.toL2Bus.trans_dist::UpgradeReq 2281 # Transaction distribution -system.cpu.toL2Bus.trans_dist::UpgradeResp 2281 # Transaction distribution -system.cpu.toL2Bus.trans_dist::ReadExReq 314426 # Transaction distribution -system.cpu.toL2Bus.trans_dist::ReadExResp 314426 # Transaction distribution -system.cpu.toL2Bus.trans_dist::ReadCleanReq 792735 # Transaction distribution -system.cpu.toL2Bus.trans_dist::ReadSharedReq 1321418 # Transaction distribution -system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 2377675 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 32613331 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.itb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 10293 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count_system.cpu.dtb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 22163 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_count::total 35023462 # Packet count per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 101436160 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 227550265 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_size_system.cpu.itb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 320000 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_size_system.cpu.dtb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 730240 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.pkt_size::total 330036665 # Cumulative packet size per connected master and slave (bytes) -system.cpu.toL2Bus.snoops 203470 # Total snoops (count) -system.cpu.toL2Bus.snoop_fanout::samples 18930684 # Request fanout histogram +system.cpu.toL2Bus.trans_dist::WritebackDirty 1539387 # Transaction distribution +system.cpu.toL2Bus.trans_dist::WritebackClean 792340 # Transaction distribution +system.cpu.toL2Bus.trans_dist::CleanEvict 93857 # Transaction distribution +system.cpu.toL2Bus.trans_dist::UpgradeReq 2200 # Transaction distribution +system.cpu.toL2Bus.trans_dist::UpgradeResp 2200 # Transaction distribution +system.cpu.toL2Bus.trans_dist::ReadExReq 314418 # Transaction distribution +system.cpu.toL2Bus.trans_dist::ReadExResp 314418 # Transaction distribution +system.cpu.toL2Bus.trans_dist::ReadCleanReq 792859 # Transaction distribution +system.cpu.toL2Bus.trans_dist::ReadSharedReq 1321433 # Transaction distribution +system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 2378058 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 32613747 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.itb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 12496 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count_system.cpu.dtb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 25663 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_count::total 35029964 # Packet count per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_size_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 101452736 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 227551417 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_size_system.cpu.itb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 329920 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_size_system.cpu.dtb_walker_cache.mem_side::system.cpu.l2cache.cpu_side 758656 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.pkt_size::total 330092729 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.snoops 203468 # Total snoops (count) +system.cpu.toL2Bus.snoop_fanout::samples 18930863 # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::mean 0.001304 # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::stdev 0.042949 # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram -system.cpu.toL2Bus.snoop_fanout::0 18911125 99.90% 99.90% # Request fanout histogram +system.cpu.toL2Bus.snoop_fanout::0 18911304 99.90% 99.90% # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::1 14428 0.08% 99.97% # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::2 5131 0.03% 100.00% # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::3 0 0.00% 100.00% # Request fanout histogram @@ -504,7 +504,7 @@ system.cpu.toL2Bus.snoop_fanout::4 0 0.00% 100.00% # Re system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::min_value 0 # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::max_value 2 # Request fanout histogram -system.cpu.toL2Bus.snoop_fanout::total 18930684 # Request fanout histogram +system.cpu.toL2Bus.snoop_fanout::total 18930863 # Request fanout histogram system.iobus.trans_dist::ReadReq 10012057 # Transaction distribution system.iobus.trans_dist::ReadResp 10012057 # Transaction distribution system.iobus.trans_dist::WriteReq 57724 # Transaction distribution @@ -558,14 +558,14 @@ system.iobus.pkt_size_system.pc.south_bridge.io_apic.int_master::system.apicbrid system.iobus.pkt_size_system.pc.south_bridge.io_apic.int_master::total 6784 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size::total 13062828 # Cumulative packet size per connected master and slave (bytes) system.iocache.tags.replacements 47568 # number of replacements -system.iocache.tags.tagsinuse 0.042441 # Cycle average of tags in use +system.iocache.tags.tagsinuse 0.042439 # Cycle average of tags in use system.iocache.tags.total_refs 0 # Total number of references to valid blocks. system.iocache.tags.sampled_refs 47584 # Sample count of references to valid blocks. system.iocache.tags.avg_refs 0 # Average number of references to valid blocks. system.iocache.tags.warmup_cycle 4994875253009 # Cycle when the warmup percentage was hit. -system.iocache.tags.occ_blocks::pc.south_bridge.ide 0.042441 # Average occupied blocks per requestor -system.iocache.tags.occ_percent::pc.south_bridge.ide 0.002653 # Average percentage of cache occupancy -system.iocache.tags.occ_percent::total 0.002653 # Average percentage of cache occupancy +system.iocache.tags.occ_blocks::pc.south_bridge.ide 0.042439 # Average occupied blocks per requestor +system.iocache.tags.occ_percent::pc.south_bridge.ide 0.002652 # Average percentage of cache occupancy +system.iocache.tags.occ_percent::total 0.002652 # Average percentage of cache occupancy system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id system.iocache.tags.age_task_id_blocks_1023::2 16 # Occupied blocks per task id system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id @@ -610,11 +610,11 @@ system.membus.trans_dist::ReadReq 13857337 # Tr system.membus.trans_dist::ReadResp 13903644 # Transaction distribution system.membus.trans_dist::WriteReq 13943 # Transaction distribution system.membus.trans_dist::WriteResp 13943 # Transaction distribution -system.membus.trans_dist::WritebackDirty 144844 # Transaction distribution -system.membus.trans_dist::CleanEvict 8271 # Transaction distribution -system.membus.trans_dist::UpgradeReq 2561 # Transaction distribution -system.membus.trans_dist::UpgradeResp 2109 # Transaction distribution -system.membus.trans_dist::ReadExReq 134351 # Transaction distribution +system.membus.trans_dist::WritebackDirty 144842 # Transaction distribution +system.membus.trans_dist::CleanEvict 8802 # Transaction distribution +system.membus.trans_dist::UpgradeReq 2189 # Transaction distribution +system.membus.trans_dist::UpgradeResp 1650 # Transaction distribution +system.membus.trans_dist::ReadExReq 134346 # Transaction distribution system.membus.trans_dist::ReadExResp 134346 # Transaction distribution system.membus.trans_dist::ReadSharedReq 46307 # Transaction distribution system.membus.trans_dist::MessageReq 1696 # Transaction distribution @@ -625,32 +625,32 @@ system.membus.pkt_count_system.apicbridge.master::system.cpu.interrupts.int_slav system.membus.pkt_count_system.apicbridge.master::total 3392 # Packet count per connected master and slave (bytes) system.membus.pkt_count_system.cpu.l2cache.mem_side::system.bridge.slave 20044316 # Packet count per connected master and slave (bytes) system.membus.pkt_count_system.cpu.l2cache.mem_side::system.cpu.interrupts.pio 7698244 # Packet count per connected master and slave (bytes) -system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 470253 # Packet count per connected master and slave (bytes) -system.membus.pkt_count_system.cpu.l2cache.mem_side::total 28212813 # Packet count per connected master and slave (bytes) -system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 142283 # Packet count per connected master and slave (bytes) -system.membus.pkt_count_system.iocache.mem_side::total 142283 # Packet count per connected master and slave (bytes) -system.membus.pkt_count::total 28358488 # Packet count per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::system.physmem.port 469415 # Packet count per connected master and slave (bytes) +system.membus.pkt_count_system.cpu.l2cache.mem_side::total 28211975 # Packet count per connected master and slave (bytes) +system.membus.pkt_count_system.iocache.mem_side::system.physmem.port 142814 # Packet count per connected master and slave (bytes) +system.membus.pkt_count_system.iocache.mem_side::total 142814 # Packet count per connected master and slave (bytes) +system.membus.pkt_count::total 28358181 # Packet count per connected master and slave (bytes) system.membus.pkt_size_system.apicbridge.master::system.cpu.interrupts.int_slave 6784 # Cumulative packet size per connected master and slave (bytes) system.membus.pkt_size_system.apicbridge.master::total 6784 # Cumulative packet size per connected master and slave (bytes) system.membus.pkt_size_system.cpu.l2cache.mem_side::system.bridge.slave 10028276 # Cumulative packet size per connected master and slave (bytes) system.membus.pkt_size_system.cpu.l2cache.mem_side::system.cpu.interrupts.pio 15396485 # Cumulative packet size per connected master and slave (bytes) -system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 17787328 # Cumulative packet size per connected master and slave (bytes) -system.membus.pkt_size_system.cpu.l2cache.mem_side::total 43212089 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_size_system.cpu.l2cache.mem_side::system.physmem.port 17787200 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_size_system.cpu.l2cache.mem_side::total 43211961 # Cumulative packet size per connected master and slave (bytes) system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 3044480 # Cumulative packet size per connected master and slave (bytes) system.membus.pkt_size_system.iocache.mem_side::total 3044480 # Cumulative packet size per connected master and slave (bytes) -system.membus.pkt_size::total 46263353 # Cumulative packet size per connected master and slave (bytes) +system.membus.pkt_size::total 46263225 # Cumulative packet size per connected master and slave (bytes) system.membus.snoops 0 # Total snoops (count) -system.membus.snoop_fanout::samples 14256561 # Request fanout histogram +system.membus.snoop_fanout::samples 14256182 # Request fanout histogram system.membus.snoop_fanout::mean 1.000119 # Request fanout histogram -system.membus.snoop_fanout::stdev 0.010906 # Request fanout histogram +system.membus.snoop_fanout::stdev 0.010907 # Request fanout histogram system.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram system.membus.snoop_fanout::0 0 0.00% 0.00% # Request fanout histogram -system.membus.snoop_fanout::1 14254865 99.99% 99.99% # Request fanout histogram +system.membus.snoop_fanout::1 14254486 99.99% 99.99% # Request fanout histogram system.membus.snoop_fanout::2 1696 0.01% 100.00% # Request fanout histogram system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram system.membus.snoop_fanout::min_value 1 # Request fanout histogram system.membus.snoop_fanout::max_value 2 # Request fanout histogram -system.membus.snoop_fanout::total 14256561 # Request fanout histogram +system.membus.snoop_fanout::total 14256182 # Request fanout histogram system.pc.south_bridge.ide.disks0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). system.pc.south_bridge.ide.disks0.dma_read_bytes 34816 # Number of bytes transfered via DMA reads (not PRD). system.pc.south_bridge.ide.disks0.dma_read_txs 32 # Number of DMA read transactions (not PRD). |