Regression: Update stats due to changes to x86 cpuid instruction

4 files changed, 51 insertions, 47 deletions

diff --git a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/config.ini b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/config.ini
index 8bff0c61a..a4365933a 100644
--- a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/config.ini
+++ b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/config.ini
@@ -15,7 +15,7 @@ e820_table=system.e820_table
 init_param=0
 intel_mp_pointer=system.intel_mp_pointer
 intel_mp_table=system.intel_mp_table
-kernel=/dist/m5/system/binaries/x86_64-vmlinux-2.6.22.9
+kernel=/scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9
 load_addr_mask=18446744073709551615
 mem_mode=atomic
 memories=system.physmem
@@ -608,7 +608,7 @@ block_size=64
 clock=1000
 header_cycles=1
 use_default_range=true
-width=64
+width=8
 default=system.pc.pciconfig.pio
 master=system.apicbridge.slave system.pc.south_bridge.cmos.pio system.pc.south_bridge.dma1.pio system.pc.south_bridge.ide.pio system.pc.south_bridge.ide.config system.pc.south_bridge.keyboard.pio system.pc.south_bridge.pic1.pio system.pc.south_bridge.pic2.pio system.pc.south_bridge.pit.pio system.pc.south_bridge.speaker.pio system.pc.south_bridge.io_apic.pio system.pc.i_dont_exist.pio system.pc.behind_pci.pio system.pc.com_1.pio system.pc.fake_com_2.pio system.pc.fake_com_3.pio system.pc.fake_com_4.pio system.pc.fake_floppy.pio system.iocache.cpu_side
 slave=system.bridge.master system.pc.south_bridge.ide.dma system.pc.south_bridge.io_apic.int_master
@@ -670,9 +670,9 @@ block_size=64
 clock=1000
 header_cycles=1
 use_default_range=false
-width=64
+width=8
 default=system.membus.badaddr_responder.pio
-master=system.physmem.port[0] system.bridge.slave system.cpu.interrupts.pio system.cpu.interrupts.int_slave
+master=system.physmem.port system.bridge.slave system.cpu.interrupts.pio system.cpu.interrupts.int_slave
 slave=system.apicbridge.master system.system_port system.iocache.mem_side system.l2c.mem_side system.cpu.interrupts.int_master
 
 [system.membus.badaddr_responder]
@@ -934,7 +934,7 @@ table_size=65536
 
 [system.pc.south_bridge.ide.disks0.image.child]
 type=RawDiskImage
-image_file=/dist/m5/system/disks/linux-x86.img
+image_file=/scratch/nilay/GEM5/system/disks/linux-x86.img
 read_only=true
 
 [system.pc.south_bridge.ide.disks1]
@@ -954,7 +954,7 @@ table_size=65536
 
 [system.pc.south_bridge.ide.disks1.image.child]
 type=RawDiskImage
-image_file=/dist/m5/system/disks/linux-bigswap2.img
+image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img
 read_only=true
 
 [system.pc.south_bridge.int_lines0]
@@ -1150,7 +1150,7 @@ block_size=64
 clock=1000
 header_cycles=1
 use_default_range=false
-width=64
+width=8
 master=system.l2c.cpu_side
 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.itb_walker_cache.mem_side system.cpu.dtb_walker_cache.mem_side
 
diff --git a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/simerr b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/simerr
index fd09f1faf..a77b4f0ee 100755
--- a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/simerr
+++ b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/simerr
@@ -3,6 +3,7 @@ warn: Reading current count from inactive timer.
 warn: Sockets disabled, not accepting gdb connections
 warn: Don't know what interrupt to clear for console.
 warn: instruction 'fxsave' unimplemented
+warn: x86 cpuid: unknown family 0x8086
 warn: Tried to clear PCI interrupt 14
 warn: Unknown mouse command 0xe1.
 warn: instruction 'wbinvd' unimplemented
diff --git a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/simout b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/simout
index 18f4bf90b..d8387d75d 100755
--- a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/simout
+++ b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/simout
@@ -1,12 +1,15 @@
+Redirecting stdout to build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-atomic/simout
+Redirecting stderr to build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-atomic/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Jun 28 2012 22:08:09
-gem5 started Jun 28 2012 23:02:50
-gem5 executing on zizzer
-command line: build/X86/gem5.fast -d build/X86/tests/fast/quick/fs/10.linux-boot/x86/linux/pc-simple-atomic -re tests/run.py build/X86/tests/fast/quick/fs/10.linux-boot/x86/linux/pc-simple-atomic
+gem5 compiled Jul 22 2012 08:05:39
+gem5 started Jul 22 2012 08:43:43
+gem5 executing on ribera.cs.wisc.edu
+command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-atomic -re tests/run.py build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-atomic
 warning: add_child('terminal'): child 'terminal' already has parent
 Global frequency set at 1000000000000 ticks per second
-info: kernel located at: /dist/m5/system/binaries/x86_64-vmlinux-2.6.22.9
+info: kernel located at: /scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9
+      0: rtc: Real-time clock set to Sun Jan  1 00:00:00 2012
 info: Entering event queue @ 0.  Starting simulation...
 Exiting @ tick 5112043255000 because m5_exit instruction encountered
diff --git a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt
index 1886c90bb..96f4e7d80 100644
--- a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt
+++ b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt
@@ -4,13 +4,13 @@ sim_seconds                                  5.112043                       # Nu
 sim_ticks                                5112043255000                       # Number of ticks simulated
 final_tick                               5112043255000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                1996585                       # Simulator instruction rate (inst/s)
-host_op_rate                                  4088150                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                            51080652430                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 357308                       # Number of bytes of host memory used
-host_seconds                                   100.08                       # Real time elapsed on the host
-sim_insts                                   199813912                       # Number of instructions simulated
-sim_ops                                     409133288                       # Number of ops (including micro ops) simulated
+host_inst_rate                                1067695                       # Simulator instruction rate (inst/s)
+host_op_rate                                  2186181                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                            27315912254                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 409548                       # Number of bytes of host memory used
+host_seconds                                   187.15                       # Real time elapsed on the host
+sim_insts                                   199813914                       # Number of instructions simulated
+sim_ops                                     409133298                       # Number of ops (including micro ops) simulated
 system.physmem.bytes_read::pc.south_bridge.ide      2464768                       # Number of bytes read from this memory
 system.physmem.bytes_read::cpu.dtb.walker          128                       # Number of bytes read from this memory
 system.physmem.bytes_read::cpu.itb.walker          320                       # Number of bytes read from this memory
@@ -47,16 +47,16 @@ system.physmem.bw_total::cpu.inst              167022                       # To
 system.physmem.bw_total::cpu.data             2073572                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::total                4540656                       # Total bandwidth to/from this memory (bytes/s)
 system.l2c.replacements                        106561                       # number of replacements
-system.l2c.tagsinuse                     64822.143270                       # Cycle average of tags in use
+system.l2c.tagsinuse                     64822.143261                       # Cycle average of tags in use
 system.l2c.total_refs                         3457342                       # Total number of references to valid blocks.
 system.l2c.sampled_refs                        170680                       # Sample count of references to valid blocks.
 system.l2c.avg_refs                         20.256281                       # Average number of references to valid blocks.
 system.l2c.warmup_cycle                             0                       # Cycle when the warmup percentage was hit.
-system.l2c.occ_blocks::writebacks        51981.461992                       # Average occupied blocks per requestor
+system.l2c.occ_blocks::writebacks        51981.461987                       # Average occupied blocks per requestor
 system.l2c.occ_blocks::cpu.dtb.walker        0.004954                       # Average occupied blocks per requestor
 system.l2c.occ_blocks::cpu.itb.walker        0.132110                       # Average occupied blocks per requestor
-system.l2c.occ_blocks::cpu.inst           2434.983597                       # Average occupied blocks per requestor
-system.l2c.occ_blocks::cpu.data          10405.560616                       # Average occupied blocks per requestor
+system.l2c.occ_blocks::cpu.inst           2434.983596                       # Average occupied blocks per requestor
+system.l2c.occ_blocks::cpu.data          10405.560614                       # Average occupied blocks per requestor
 system.l2c.occ_percent::writebacks           0.793174                       # Average percentage of cache occupancy
 system.l2c.occ_percent::cpu.dtb.walker       0.000000                       # Average percentage of cache occupancy
 system.l2c.occ_percent::cpu.itb.walker       0.000002                       # Average percentage of cache occupancy
@@ -213,54 +213,54 @@ system.pc.south_bridge.ide.disks1.dma_write_txs            1
 system.cpu.numCycles                      10224086531                       # number of cpu cycles simulated
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
 system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
-system.cpu.committedInsts                   199813912                       # Number of instructions committed
-system.cpu.committedOps                     409133288                       # Number of ops (including micro ops) committed
-system.cpu.num_int_alu_accesses             374297254                       # Number of integer alu accesses
+system.cpu.committedInsts                   199813914                       # Number of instructions committed
+system.cpu.committedOps                     409133298                       # Number of ops (including micro ops) committed
+system.cpu.num_int_alu_accesses             374297264                       # Number of integer alu accesses
 system.cpu.num_fp_alu_accesses                      0                       # Number of float alu accesses
 system.cpu.num_func_calls                           0                       # number of times a function call or return occured
-system.cpu.num_conditional_control_insts     39954972                       # number of instructions that are conditional controls
-system.cpu.num_int_insts                    374297254                       # number of integer instructions
+system.cpu.num_conditional_control_insts     39954974                       # number of instructions that are conditional controls
+system.cpu.num_int_insts                    374297264                       # number of integer instructions
 system.cpu.num_fp_insts                             0                       # number of float instructions
-system.cpu.num_int_register_reads          1159028950                       # number of times the integer registers were read
-system.cpu.num_int_register_writes          636431660                       # number of times the integer registers were written
+system.cpu.num_int_register_reads          1159028989                       # number of times the integer registers were read
+system.cpu.num_int_register_writes          636431681                       # number of times the integer registers were written
 system.cpu.num_fp_register_reads                    0                       # number of times the floating registers were read
 system.cpu.num_fp_register_writes                   0                       # number of times the floating registers were written
 system.cpu.num_mem_refs                      35626517                       # number of memory refs
 system.cpu.num_load_insts                    27217782                       # Number of load instructions
 system.cpu.num_store_insts                    8408735                       # Number of store instructions
-system.cpu.num_idle_cycles               9770605328.086651                       # Number of idle cycles
-system.cpu.num_busy_cycles               453481202.913350                       # Number of busy cycles
+system.cpu.num_idle_cycles               9770605318.086651                       # Number of idle cycles
+system.cpu.num_busy_cycles               453481212.913350                       # Number of busy cycles
 system.cpu.not_idle_fraction                 0.044354                       # Percentage of non-idle cycles
 system.cpu.idle_fraction                     0.955646                       # Percentage of idle cycles
 system.cpu.kern.inst.arm                            0                       # number of arm instructions executed
 system.cpu.kern.inst.quiesce                        0                       # number of quiesce instructions executed
 system.cpu.icache.replacements                 790793                       # number of replacements
 system.cpu.icache.tagsinuse                510.627676                       # Cycle average of tags in use
-system.cpu.icache.total_refs                243365777                       # Total number of references to valid blocks.
+system.cpu.icache.total_refs                243365779                       # Total number of references to valid blocks.
 system.cpu.icache.sampled_refs                 791305                       # Sample count of references to valid blocks.
-system.cpu.icache.avg_refs                 307.549904                       # Average number of references to valid blocks.
-system.cpu.icache.warmup_cycle           148763105500                       # Cycle when the warmup percentage was hit.
+system.cpu.icache.avg_refs                 307.549907                       # Average number of references to valid blocks.
+system.cpu.icache.warmup_cycle           148763110500                       # Cycle when the warmup percentage was hit.
 system.cpu.icache.occ_blocks::cpu.inst     510.627676                       # Average occupied blocks per requestor
 system.cpu.icache.occ_percent::cpu.inst      0.997320                       # Average percentage of cache occupancy
 system.cpu.icache.occ_percent::total         0.997320                       # Average percentage of cache occupancy
-system.cpu.icache.ReadReq_hits::cpu.inst    243365777                       # number of ReadReq hits
-system.cpu.icache.ReadReq_hits::total       243365777                       # number of ReadReq hits
-system.cpu.icache.demand_hits::cpu.inst     243365777                       # number of demand (read+write) hits
-system.cpu.icache.demand_hits::total        243365777                       # number of demand (read+write) hits
-system.cpu.icache.overall_hits::cpu.inst    243365777                       # number of overall hits
-system.cpu.icache.overall_hits::total       243365777                       # number of overall hits
+system.cpu.icache.ReadReq_hits::cpu.inst    243365779                       # number of ReadReq hits
+system.cpu.icache.ReadReq_hits::total       243365779                       # number of ReadReq hits
+system.cpu.icache.demand_hits::cpu.inst     243365779                       # number of demand (read+write) hits
+system.cpu.icache.demand_hits::total        243365779                       # number of demand (read+write) hits
+system.cpu.icache.overall_hits::cpu.inst    243365779                       # number of overall hits
+system.cpu.icache.overall_hits::total       243365779                       # number of overall hits
 system.cpu.icache.ReadReq_misses::cpu.inst       791312                       # number of ReadReq misses
 system.cpu.icache.ReadReq_misses::total        791312                       # number of ReadReq misses
 system.cpu.icache.demand_misses::cpu.inst       791312                       # number of demand (read+write) misses
 system.cpu.icache.demand_misses::total         791312                       # number of demand (read+write) misses
 system.cpu.icache.overall_misses::cpu.inst       791312                       # number of overall misses
 system.cpu.icache.overall_misses::total        791312                       # number of overall misses
-system.cpu.icache.ReadReq_accesses::cpu.inst    244157089                       # number of ReadReq accesses(hits+misses)
-system.cpu.icache.ReadReq_accesses::total    244157089                       # number of ReadReq accesses(hits+misses)
-system.cpu.icache.demand_accesses::cpu.inst    244157089                       # number of demand (read+write) accesses
-system.cpu.icache.demand_accesses::total    244157089                       # number of demand (read+write) accesses
-system.cpu.icache.overall_accesses::cpu.inst    244157089                       # number of overall (read+write) accesses
-system.cpu.icache.overall_accesses::total    244157089                       # number of overall (read+write) accesses
+system.cpu.icache.ReadReq_accesses::cpu.inst    244157091                       # number of ReadReq accesses(hits+misses)
+system.cpu.icache.ReadReq_accesses::total    244157091                       # number of ReadReq accesses(hits+misses)
+system.cpu.icache.demand_accesses::cpu.inst    244157091                       # number of demand (read+write) accesses
+system.cpu.icache.demand_accesses::total    244157091                       # number of demand (read+write) accesses
+system.cpu.icache.overall_accesses::cpu.inst    244157091                       # number of overall (read+write) accesses
+system.cpu.icache.overall_accesses::total    244157091                       # number of overall (read+write) accesses
 system.cpu.icache.ReadReq_miss_rate::cpu.inst     0.003241                       # miss rate for ReadReq accesses
 system.cpu.icache.ReadReq_miss_rate::total     0.003241                       # miss rate for ReadReq accesses
 system.cpu.icache.demand_miss_rate::cpu.inst     0.003241                       # miss rate for demand accesses