test: update stats

Update stats for recent changes.  Mostly minor changes
in register access stats due to addition of new cc
register type and slightly different (and more accurate)
classification of int vs. fp register accesses.

3 files changed, 18 insertions, 16 deletions

diff --git a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/config.ini b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/config.ini
index aa647f626..4c888767a 100644
--- a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/config.ini
+++ b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/config.ini
@@ -17,7 +17,7 @@ e820_table=system.e820_table
 init_param=0
 intel_mp_pointer=system.intel_mp_pointer
 intel_mp_table=system.intel_mp_table
-kernel=/scratch/andreas/m5/binaries/x86_64-vmlinux-2.6.22.9
+kernel=/dist/m5/system/binaries/x86_64-vmlinux-2.6.22.9
 load_addr_mask=18446744073709551615
 mem_mode=timing
 mem_ranges=0:134217727
@@ -1022,7 +1022,7 @@ table_size=65536
 
 [system.pc.south_bridge.ide.disks0.image.child]
 type=RawDiskImage
-image_file=/scratch/andreas/m5/disks/linux-x86.img
+image_file=/dist/m5/system/disks/linux-x86.img
 read_only=true
 
 [system.pc.south_bridge.ide.disks1]
@@ -1042,7 +1042,7 @@ table_size=65536
 
 [system.pc.south_bridge.ide.disks1.image.child]
 type=RawDiskImage
-image_file=/scratch/andreas/m5/disks/linux-bigswap2.img
+image_file=/dist/m5/system/disks/linux-bigswap2.img
 read_only=true
 
 [system.pc.south_bridge.int_lines0]
diff --git a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/simout b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/simout
index 6c4476b75..3c12ad36c 100755
--- a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/simout
+++ b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/simout
@@ -1,12 +1,12 @@
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Oct  1 2013 21:55:52
-gem5 started Oct  1 2013 22:03:55
-gem5 executing on steam
+gem5 compiled Oct 16 2013 01:35:57
+gem5 started Oct 16 2013 01:55:08
+gem5 executing on zizzer
 command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-timing -re tests/run.py build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-timing
 Global frequency set at 1000000000000 ticks per second
-info: kernel located at: /scratch/andreas/m5/binaries/x86_64-vmlinux-2.6.22.9
+info: kernel located at: /dist/m5/system/binaries/x86_64-vmlinux-2.6.22.9
       0: rtc: Real-time clock set to Sun Jan  1 00:00:00 2012
 info: Entering event queue @ 0.  Starting simulation...
 Exiting @ tick 5192277855000 because m5_exit instruction encountered
diff --git a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt
index 379d92f84..e69bdd504 100644
--- a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt
+++ b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds                                  5.192278                       # Nu
 sim_ticks                                5192277855000                       # Number of ticks simulated
 final_tick                               5192277855000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 672895                       # Simulator instruction rate (inst/s)
-host_op_rate                                  1297076                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                            27224181866                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 587160                       # Number of bytes of host memory used
-host_seconds                                   190.72                       # Real time elapsed on the host
+host_inst_rate                                 964497                       # Simulator instruction rate (inst/s)
+host_op_rate                                  1859169                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                            39021883302                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 587612                       # Number of bytes of host memory used
+host_seconds                                   133.06                       # Real time elapsed on the host
 sim_insts                                   128336541                       # Number of instructions simulated
 sim_ops                                     247382226                       # Number of ops (including micro ops) simulated
 system.physmem.bytes_read::pc.south_bridge.ide      2866368                       # Number of bytes read from this memory
@@ -605,16 +605,18 @@ system.cpu.numWorkItemsStarted                      0                       # nu
 system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
 system.cpu.committedInsts                   128336541                       # Number of instructions committed
 system.cpu.committedOps                     247382226                       # Number of ops (including micro ops) committed
-system.cpu.num_int_alu_accesses             232116398                       # Number of integer alu accesses
+system.cpu.num_int_alu_accesses             231975048                       # Number of integer alu accesses
 system.cpu.num_fp_alu_accesses                      0                       # Number of float alu accesses
 system.cpu.num_func_calls                     2299863                       # number of times a function call or return occured
 system.cpu.num_conditional_control_insts     23167946                       # number of instructions that are conditional controls
-system.cpu.num_int_insts                    232116398                       # number of integer instructions
+system.cpu.num_int_insts                    231975048                       # number of integer instructions
 system.cpu.num_fp_insts                             0                       # number of float instructions
-system.cpu.num_int_register_reads           567322022                       # number of times the integer registers were read
-system.cpu.num_int_register_writes          293376346                       # number of times the integer registers were written
+system.cpu.num_int_register_reads           434515715                       # number of times the integer registers were read
+system.cpu.num_int_register_writes          197846848                       # number of times the integer registers were written
 system.cpu.num_fp_register_reads                    0                       # number of times the floating registers were read
 system.cpu.num_fp_register_writes                   0                       # number of times the floating registers were written
+system.cpu.num_cc_register_reads            132806307                       # number of times the CC registers were read
+system.cpu.num_cc_register_writes            95529498                       # number of times the CC registers were written
 system.cpu.num_mem_refs                      22249600                       # number of memory refs
 system.cpu.num_load_insts                    13881232                       # Number of load instructions
 system.cpu.num_store_insts                    8368368                       # Number of store instructions