stats: update stats for icache change not allowing dirty data

6 files changed, 36 insertions, 44 deletions

diff --git a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/config.ini b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/config.ini
index a4365933a..725aa519b 100644
--- a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/config.ini
+++ b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/config.ini
@@ -15,7 +15,7 @@ e820_table=system.e820_table
 init_param=0
 intel_mp_pointer=system.intel_mp_pointer
 intel_mp_table=system.intel_mp_table
-kernel=/scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9
+kernel=/dist/m5/system/binaries/x86_64-vmlinux-2.6.22.9
 load_addr_mask=18446744073709551615
 mem_mode=atomic
 memories=system.physmem
@@ -934,7 +934,7 @@ table_size=65536
 
 [system.pc.south_bridge.ide.disks0.image.child]
 type=RawDiskImage
-image_file=/scratch/nilay/GEM5/system/disks/linux-x86.img
+image_file=/dist/m5/system/disks/linux-x86.img
 read_only=true
 
 [system.pc.south_bridge.ide.disks1]
@@ -954,7 +954,7 @@ table_size=65536
 
 [system.pc.south_bridge.ide.disks1.image.child]
 type=RawDiskImage
-image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img
+image_file=/dist/m5/system/disks/linux-bigswap2.img
 read_only=true
 
 [system.pc.south_bridge.int_lines0]
diff --git a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/simout b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/simout
index d8387d75d..7a86428b1 100755
--- a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/simout
+++ b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/simout
@@ -1,15 +1,13 @@
-Redirecting stdout to build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-atomic/simout
-Redirecting stderr to build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-atomic/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Jul 22 2012 08:05:39
-gem5 started Jul 22 2012 08:43:43
-gem5 executing on ribera.cs.wisc.edu
+gem5 compiled Jul 26 2012 21:30:36
+gem5 started Jul 26 2012 22:49:04
+gem5 executing on zizzer
 command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-atomic -re tests/run.py build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-atomic
 warning: add_child('terminal'): child 'terminal' already has parent
 Global frequency set at 1000000000000 ticks per second
-info: kernel located at: /scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9
+info: kernel located at: /dist/m5/system/binaries/x86_64-vmlinux-2.6.22.9
       0: rtc: Real-time clock set to Sun Jan  1 00:00:00 2012
 info: Entering event queue @ 0.  Starting simulation...
 Exiting @ tick 5112043255000 because m5_exit instruction encountered
diff --git a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt
index 96f4e7d80..4f10e01e9 100644
--- a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt
+++ b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt
@@ -4,11 +4,11 @@ sim_seconds                                  5.112043                       # Nu
 sim_ticks                                5112043255000                       # Number of ticks simulated
 final_tick                               5112043255000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                1067695                       # Simulator instruction rate (inst/s)
-host_op_rate                                  2186181                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                            27315912254                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 409548                       # Number of bytes of host memory used
-host_seconds                                   187.15                       # Real time elapsed on the host
+host_inst_rate                                1419112                       # Simulator instruction rate (inst/s)
+host_op_rate                                  2905734                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                            36306590178                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 362152                       # Number of bytes of host memory used
+host_seconds                                   140.80                       # Real time elapsed on the host
 sim_insts                                   199813914                       # Number of instructions simulated
 sim_ops                                     409133298                       # Number of ops (including micro ops) simulated
 system.physmem.bytes_read::pc.south_bridge.ide      2464768                       # Number of bytes read from this memory
@@ -48,9 +48,9 @@ system.physmem.bw_total::cpu.data             2073572                       # To
 system.physmem.bw_total::total                4540656                       # Total bandwidth to/from this memory (bytes/s)
 system.l2c.replacements                        106561                       # number of replacements
 system.l2c.tagsinuse                     64822.143261                       # Cycle average of tags in use
-system.l2c.total_refs                         3457342                       # Total number of references to valid blocks.
+system.l2c.total_refs                         3456533                       # Total number of references to valid blocks.
 system.l2c.sampled_refs                        170680                       # Sample count of references to valid blocks.
-system.l2c.avg_refs                         20.256281                       # Average number of references to valid blocks.
+system.l2c.avg_refs                         20.251541                       # Average number of references to valid blocks.
 system.l2c.warmup_cycle                             0                       # Cycle when the warmup percentage was hit.
 system.l2c.occ_blocks::writebacks        51981.461987                       # Average occupied blocks per requestor
 system.l2c.occ_blocks::cpu.dtb.walker        0.004954                       # Average occupied blocks per requestor
@@ -68,8 +68,8 @@ system.l2c.ReadReq_hits::cpu.itb.walker          2700                       # nu
 system.l2c.ReadReq_hits::cpu.inst              777957                       # number of ReadReq hits
 system.l2c.ReadReq_hits::cpu.data             1275395                       # number of ReadReq hits
 system.l2c.ReadReq_hits::total                2062630                       # number of ReadReq hits
-system.l2c.Writeback_hits::writebacks         1538939                       # number of Writeback hits
-system.l2c.Writeback_hits::total              1538939                       # number of Writeback hits
+system.l2c.Writeback_hits::writebacks         1538130                       # number of Writeback hits
+system.l2c.Writeback_hits::total              1538130                       # number of Writeback hits
 system.l2c.UpgradeReq_hits::cpu.data               28                       # number of UpgradeReq hits
 system.l2c.UpgradeReq_hits::total                  28                       # number of UpgradeReq hits
 system.l2c.ReadExReq_hits::cpu.data            179208                       # number of ReadExReq hits
@@ -108,8 +108,8 @@ system.l2c.ReadReq_accesses::cpu.itb.walker         2705                       #
 system.l2c.ReadReq_accesses::cpu.inst          791299                       # number of ReadReq accesses(hits+misses)
 system.l2c.ReadReq_accesses::cpu.data         1307579                       # number of ReadReq accesses(hits+misses)
 system.l2c.ReadReq_accesses::total            2108163                       # number of ReadReq accesses(hits+misses)
-system.l2c.Writeback_accesses::writebacks      1538939                       # number of Writeback accesses(hits+misses)
-system.l2c.Writeback_accesses::total          1538939                       # number of Writeback accesses(hits+misses)
+system.l2c.Writeback_accesses::writebacks      1538130                       # number of Writeback accesses(hits+misses)
+system.l2c.Writeback_accesses::total          1538130                       # number of Writeback accesses(hits+misses)
 system.l2c.UpgradeReq_accesses::cpu.data         1824                       # number of UpgradeReq accesses(hits+misses)
 system.l2c.UpgradeReq_accesses::total            1824                       # number of UpgradeReq accesses(hits+misses)
 system.l2c.ReadExReq_accesses::cpu.data        313585                       # number of ReadExReq accesses(hits+misses)
@@ -275,8 +275,6 @@ system.cpu.icache.avg_blocked_cycles::no_mshrs          nan
 system.cpu.icache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
 system.cpu.icache.fast_writes                       0                       # number of fast writes performed
 system.cpu.icache.cache_copies                      0                       # number of cache copies performed
-system.cpu.icache.writebacks::writebacks          809                       # number of writebacks
-system.cpu.icache.writebacks::total               809                       # number of writebacks
 system.cpu.icache.no_allocate_misses                0                       # Number of misses that were no-allocate
 system.cpu.itb_walker_cache.replacements         3335                       # number of replacements
 system.cpu.itb_walker_cache.tagsinuse        3.026444                       # Cycle average of tags in use
diff --git a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/config.ini b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/config.ini
index 8535283af..ae091f3af 100644
--- a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/config.ini
+++ b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/config.ini
@@ -15,7 +15,7 @@ e820_table=system.e820_table
 init_param=0
 intel_mp_pointer=system.intel_mp_pointer
 intel_mp_table=system.intel_mp_table
-kernel=/scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9
+kernel=/dist/m5/system/binaries/x86_64-vmlinux-2.6.22.9
 load_addr_mask=18446744073709551615
 mem_mode=timing
 memories=system.physmem
@@ -930,7 +930,7 @@ table_size=65536
 
 [system.pc.south_bridge.ide.disks0.image.child]
 type=RawDiskImage
-image_file=/scratch/nilay/GEM5/system/disks/linux-x86.img
+image_file=/dist/m5/system/disks/linux-x86.img
 read_only=true
 
 [system.pc.south_bridge.ide.disks1]
@@ -950,7 +950,7 @@ table_size=65536
 
 [system.pc.south_bridge.ide.disks1.image.child]
 type=RawDiskImage
-image_file=/scratch/nilay/GEM5/system/disks/linux-bigswap2.img
+image_file=/dist/m5/system/disks/linux-bigswap2.img
 read_only=true
 
 [system.pc.south_bridge.int_lines0]
diff --git a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/simout b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/simout
index 64807f302..4564af214 100755
--- a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/simout
+++ b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/simout
@@ -1,15 +1,13 @@
-Redirecting stdout to build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-timing/simout
-Redirecting stderr to build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-timing/simerr
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Jul 22 2012 08:05:39
-gem5 started Jul 22 2012 08:43:19
-gem5 executing on ribera.cs.wisc.edu
+gem5 compiled Jul 26 2012 21:30:36
+gem5 started Jul 26 2012 22:51:36
+gem5 executing on zizzer
 command line: build/X86/gem5.opt -d build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-timing -re tests/run.py build/X86/tests/opt/quick/fs/10.linux-boot/x86/linux/pc-simple-timing
 warning: add_child('terminal'): child 'terminal' already has parent
 Global frequency set at 1000000000000 ticks per second
-info: kernel located at: /scratch/nilay/GEM5/system/binaries/x86_64-vmlinux-2.6.22.9
+info: kernel located at: /dist/m5/system/binaries/x86_64-vmlinux-2.6.22.9
       0: rtc: Real-time clock set to Sun Jan  1 00:00:00 2012
 info: Entering event queue @ 0.  Starting simulation...
 Exiting @ tick 5191766314000 because m5_exit instruction encountered
diff --git a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt
index 49cb796d4..a4ae62a22 100644
--- a/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt
+++ b/tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds                                  5.191766                       # Nu
 sim_ticks                                5191766314000                       # Number of ticks simulated
 final_tick                               5191766314000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 672863                       # Simulator instruction rate (inst/s)
-host_op_rate                                  1291533                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                            25283717995                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 405876                       # Number of bytes of host memory used
-host_seconds                                   205.34                       # Real time elapsed on the host
+host_inst_rate                                 787684                       # Simulator instruction rate (inst/s)
+host_op_rate                                  1511929                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                            29598304712                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 358992                       # Number of bytes of host memory used
+host_seconds                                   175.41                       # Real time elapsed on the host
 sim_insts                                   138165780                       # Number of instructions simulated
 sim_ops                                     265203824                       # Number of ops (including micro ops) simulated
 system.physmem.bytes_read::pc.south_bridge.ide      2891072                       # Number of bytes read from this memory
@@ -44,9 +44,9 @@ system.physmem.bw_total::cpu.data             1721828                       # To
 system.physmem.bw_total::total                3993388                       # Total bandwidth to/from this memory (bytes/s)
 system.l2c.replacements                         86221                       # number of replacements
 system.l2c.tagsinuse                     64766.656127                       # Cycle average of tags in use
-system.l2c.total_refs                         3491043                       # Total number of references to valid blocks.
+system.l2c.total_refs                         3490237                       # Total number of references to valid blocks.
 system.l2c.sampled_refs                        150947                       # Sample count of references to valid blocks.
-system.l2c.avg_refs                         23.127608                       # Average number of references to valid blocks.
+system.l2c.avg_refs                         23.122268                       # Average number of references to valid blocks.
 system.l2c.warmup_cycle                             0                       # Cycle when the warmup percentage was hit.
 system.l2c.occ_blocks::writebacks        50170.355166                       # Average occupied blocks per requestor
 system.l2c.occ_blocks::cpu.itb.walker        0.141198                       # Average occupied blocks per requestor
@@ -62,8 +62,8 @@ system.l2c.ReadReq_hits::cpu.itb.walker          2757                       # nu
 system.l2c.ReadReq_hits::cpu.inst              777565                       # number of ReadReq hits
 system.l2c.ReadReq_hits::cpu.data             1279351                       # number of ReadReq hits
 system.l2c.ReadReq_hits::total                2065979                       # number of ReadReq hits
-system.l2c.Writeback_hits::writebacks         1542135                       # number of Writeback hits
-system.l2c.Writeback_hits::total              1542135                       # number of Writeback hits
+system.l2c.Writeback_hits::writebacks         1541329                       # number of Writeback hits
+system.l2c.Writeback_hits::total              1541329                       # number of Writeback hits
 system.l2c.UpgradeReq_hits::cpu.data              319                       # number of UpgradeReq hits
 system.l2c.UpgradeReq_hits::total                 319                       # number of UpgradeReq hits
 system.l2c.ReadExReq_hits::cpu.data            200451                       # number of ReadExReq hits
@@ -115,8 +115,8 @@ system.l2c.ReadReq_accesses::cpu.itb.walker         2762                       #
 system.l2c.ReadReq_accesses::cpu.inst          790398                       # number of ReadReq accesses(hits+misses)
 system.l2c.ReadReq_accesses::cpu.data         1307724                       # number of ReadReq accesses(hits+misses)
 system.l2c.ReadReq_accesses::total            2107190                       # number of ReadReq accesses(hits+misses)
-system.l2c.Writeback_accesses::writebacks      1542135                       # number of Writeback accesses(hits+misses)
-system.l2c.Writeback_accesses::total          1542135                       # number of Writeback accesses(hits+misses)
+system.l2c.Writeback_accesses::writebacks      1541329                       # number of Writeback accesses(hits+misses)
+system.l2c.Writeback_accesses::total          1541329                       # number of Writeback accesses(hits+misses)
 system.l2c.UpgradeReq_accesses::cpu.data         1665                       # number of UpgradeReq accesses(hits+misses)
 system.l2c.UpgradeReq_accesses::total            1665                       # number of UpgradeReq accesses(hits+misses)
 system.l2c.ReadExReq_accesses::cpu.data        312686                       # number of ReadExReq accesses(hits+misses)
@@ -431,8 +431,6 @@ system.cpu.icache.avg_blocked_cycles::no_mshrs          nan
 system.cpu.icache.avg_blocked_cycles::no_targets          nan                       # average number of cycles each access was blocked
 system.cpu.icache.fast_writes                       0                       # number of fast writes performed
 system.cpu.icache.cache_copies                      0                       # number of cache copies performed
-system.cpu.icache.writebacks::writebacks          806                       # number of writebacks
-system.cpu.icache.writebacks::total               806                       # number of writebacks
 system.cpu.icache.ReadReq_mshr_misses::cpu.inst       790411                       # number of ReadReq MSHR misses
 system.cpu.icache.ReadReq_mshr_misses::total       790411                       # number of ReadReq MSHR misses
 system.cpu.icache.demand_mshr_misses::cpu.inst       790411                       # number of demand (read+write) MSHR misses