summaryrefslogtreecommitdiff
path: root/tests/quick/fs/80.netperf-stream/ref
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2012-01-28 07:24:45 -0800
committerGabe Black <gblack@eecs.umich.edu>2012-01-28 07:24:45 -0800
commit57e07ac2d2daaa7469241372510395e43ebe14c0 (patch)
treedc338f4fbe8b26f7d7d3532ea0abe324846ca33d /tests/quick/fs/80.netperf-stream/ref
parentec20ee2f7cdaff22e63a5ae492f925d0d4839849 (diff)
downloadgem5-57e07ac2d2daaa7469241372510395e43ebe14c0.tar.xz
SE/FS: Make both SE and FS tests available all the time.
--HG-- rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/config.ini rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simerr => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simerr rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/simout rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/stats.txt rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/system.terminal => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3-dual/system.terminal rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/config.ini rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simerr => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/simerr rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/simout => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/simout rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/stats.txt rename : tests/long/10.linux-boot/ref/alpha/linux/tsunami-o3/system.terminal => tests/long/fs/10.linux-boot/ref/alpha/linux/tsunami-o3/system.terminal rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3-dual/config.ini => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/config.ini rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3-dual/simerr => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/simerr rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3-dual/simout => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/simout rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3-dual/stats.txt => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/stats.txt rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3-dual/status => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/status rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3-dual/system.terminal => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3-dual/system.terminal rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3/config.ini => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/config.ini rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3/simerr => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simerr rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3/simout => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/simout rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3/stats.txt => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/stats.txt rename : tests/long/10.linux-boot/ref/arm/linux/realview-o3/system.terminal => tests/long/fs/10.linux-boot/ref/arm/linux/realview-o3/system.terminal rename : tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini => tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/config.ini rename : tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/simerr => tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/simerr rename : tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/simout => tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/simout rename : tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/stats.txt => tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/stats.txt rename : tests/long/10.linux-boot/ref/x86/linux/pc-o3-timing/system.pc.com_1.terminal => tests/long/fs/10.linux-boot/ref/x86/linux/pc-o3-timing/system.pc.com_1.terminal rename : tests/long/10.linux-boot/test.py => tests/long/fs/10.linux-boot/test.py rename : tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini => tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/config.ini rename : tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simerr => tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simerr rename : tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout => tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/simout rename : tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt => tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/stats.txt rename : tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/system.t1000.hterm => tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/system.t1000.hterm rename : tests/long/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/system.t1000.pterm => tests/long/fs/80.solaris-boot/ref/sparc/solaris/t1000-simple-atomic/system.t1000.pterm rename : tests/long/80.solaris-boot/test.py => tests/long/fs/80.solaris-boot/test.py rename : tests/long/00.gzip/ref/alpha/tru64/inorder-timing/config.ini => tests/long/se/00.gzip/ref/alpha/tru64/inorder-timing/config.ini rename : tests/long/00.gzip/ref/alpha/tru64/inorder-timing/simerr => tests/long/se/00.gzip/ref/alpha/tru64/inorder-timing/simerr rename : tests/long/00.gzip/ref/alpha/tru64/inorder-timing/simout => tests/long/se/00.gzip/ref/alpha/tru64/inorder-timing/simout rename : tests/long/00.gzip/ref/alpha/tru64/inorder-timing/stats.txt => tests/long/se/00.gzip/ref/alpha/tru64/inorder-timing/stats.txt rename : tests/long/00.gzip/ref/alpha/tru64/o3-timing/config.ini => tests/long/se/00.gzip/ref/alpha/tru64/o3-timing/config.ini rename : tests/long/00.gzip/ref/alpha/tru64/o3-timing/simerr => tests/long/se/00.gzip/ref/alpha/tru64/o3-timing/simerr rename : tests/long/00.gzip/ref/alpha/tru64/o3-timing/simout => tests/long/se/00.gzip/ref/alpha/tru64/o3-timing/simout rename : tests/long/00.gzip/ref/alpha/tru64/o3-timing/stats.txt => tests/long/se/00.gzip/ref/alpha/tru64/o3-timing/stats.txt rename : tests/long/00.gzip/ref/alpha/tru64/simple-atomic/config.ini => tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/config.ini rename : tests/long/00.gzip/ref/alpha/tru64/simple-atomic/simerr => tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/simerr rename : tests/long/00.gzip/ref/alpha/tru64/simple-atomic/simout => tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/simout rename : tests/long/00.gzip/ref/alpha/tru64/simple-atomic/stats.txt => tests/long/se/00.gzip/ref/alpha/tru64/simple-atomic/stats.txt rename : tests/long/00.gzip/ref/alpha/tru64/simple-timing/config.ini => tests/long/se/00.gzip/ref/alpha/tru64/simple-timing/config.ini rename : tests/long/00.gzip/ref/alpha/tru64/simple-timing/simerr => tests/long/se/00.gzip/ref/alpha/tru64/simple-timing/simerr rename : tests/long/00.gzip/ref/alpha/tru64/simple-timing/simout => tests/long/se/00.gzip/ref/alpha/tru64/simple-timing/simout rename : tests/long/00.gzip/ref/alpha/tru64/simple-timing/stats.txt => tests/long/se/00.gzip/ref/alpha/tru64/simple-timing/stats.txt rename : tests/long/00.gzip/ref/arm/linux/o3-timing/config.ini => tests/long/se/00.gzip/ref/arm/linux/o3-timing/config.ini rename : tests/long/00.gzip/ref/arm/linux/o3-timing/simerr => tests/long/se/00.gzip/ref/arm/linux/o3-timing/simerr rename : tests/long/00.gzip/ref/arm/linux/o3-timing/simout => tests/long/se/00.gzip/ref/arm/linux/o3-timing/simout rename : tests/long/00.gzip/ref/arm/linux/o3-timing/stats.txt => tests/long/se/00.gzip/ref/arm/linux/o3-timing/stats.txt rename : tests/long/00.gzip/ref/arm/linux/simple-atomic/config.ini => tests/long/se/00.gzip/ref/arm/linux/simple-atomic/config.ini rename : tests/long/00.gzip/ref/arm/linux/simple-atomic/simerr => tests/long/se/00.gzip/ref/arm/linux/simple-atomic/simerr rename : tests/long/00.gzip/ref/arm/linux/simple-atomic/simout => tests/long/se/00.gzip/ref/arm/linux/simple-atomic/simout rename : tests/long/00.gzip/ref/arm/linux/simple-atomic/stats.txt => tests/long/se/00.gzip/ref/arm/linux/simple-atomic/stats.txt rename : tests/long/00.gzip/ref/arm/linux/simple-timing/config.ini => tests/long/se/00.gzip/ref/arm/linux/simple-timing/config.ini rename : tests/long/00.gzip/ref/arm/linux/simple-timing/simerr => tests/long/se/00.gzip/ref/arm/linux/simple-timing/simerr rename : tests/long/00.gzip/ref/arm/linux/simple-timing/simout => tests/long/se/00.gzip/ref/arm/linux/simple-timing/simout rename : tests/long/00.gzip/ref/arm/linux/simple-timing/stats.txt => tests/long/se/00.gzip/ref/arm/linux/simple-timing/stats.txt rename : tests/long/00.gzip/ref/sparc/linux/o3-timing/config.ini => tests/long/se/00.gzip/ref/sparc/linux/o3-timing/config.ini rename : tests/long/00.gzip/ref/sparc/linux/o3-timing/simerr => tests/long/se/00.gzip/ref/sparc/linux/o3-timing/simerr rename : tests/long/00.gzip/ref/sparc/linux/o3-timing/simout => tests/long/se/00.gzip/ref/sparc/linux/o3-timing/simout rename : tests/long/00.gzip/ref/sparc/linux/o3-timing/stats.txt => tests/long/se/00.gzip/ref/sparc/linux/o3-timing/stats.txt rename : tests/long/00.gzip/ref/sparc/linux/simple-atomic/config.ini => tests/long/se/00.gzip/ref/sparc/linux/simple-atomic/config.ini rename : tests/long/00.gzip/ref/sparc/linux/simple-atomic/simerr => tests/long/se/00.gzip/ref/sparc/linux/simple-atomic/simerr rename : tests/long/00.gzip/ref/sparc/linux/simple-atomic/simout => tests/long/se/00.gzip/ref/sparc/linux/simple-atomic/simout rename : tests/long/00.gzip/ref/sparc/linux/simple-atomic/stats.txt => tests/long/se/00.gzip/ref/sparc/linux/simple-atomic/stats.txt rename : tests/long/00.gzip/ref/sparc/linux/simple-timing/config.ini => tests/long/se/00.gzip/ref/sparc/linux/simple-timing/config.ini rename : tests/long/00.gzip/ref/sparc/linux/simple-timing/simerr => tests/long/se/00.gzip/ref/sparc/linux/simple-timing/simerr rename : tests/long/00.gzip/ref/sparc/linux/simple-timing/simout => tests/long/se/00.gzip/ref/sparc/linux/simple-timing/simout rename : tests/long/00.gzip/ref/sparc/linux/simple-timing/stats.txt => tests/long/se/00.gzip/ref/sparc/linux/simple-timing/stats.txt rename : tests/long/00.gzip/ref/x86/linux/o3-timing/config.ini => tests/long/se/00.gzip/ref/x86/linux/o3-timing/config.ini rename : tests/long/00.gzip/ref/x86/linux/o3-timing/simerr => tests/long/se/00.gzip/ref/x86/linux/o3-timing/simerr rename : tests/long/00.gzip/ref/x86/linux/o3-timing/simout => tests/long/se/00.gzip/ref/x86/linux/o3-timing/simout rename : tests/long/00.gzip/ref/x86/linux/o3-timing/stats.txt => tests/long/se/00.gzip/ref/x86/linux/o3-timing/stats.txt rename : tests/long/00.gzip/ref/x86/linux/simple-atomic/config.ini => tests/long/se/00.gzip/ref/x86/linux/simple-atomic/config.ini rename : tests/long/00.gzip/ref/x86/linux/simple-atomic/simerr => tests/long/se/00.gzip/ref/x86/linux/simple-atomic/simerr rename : tests/long/00.gzip/ref/x86/linux/simple-atomic/simout => tests/long/se/00.gzip/ref/x86/linux/simple-atomic/simout rename : tests/long/00.gzip/ref/x86/linux/simple-atomic/stats.txt => tests/long/se/00.gzip/ref/x86/linux/simple-atomic/stats.txt rename : tests/long/00.gzip/ref/x86/linux/simple-timing/config.ini => tests/long/se/00.gzip/ref/x86/linux/simple-timing/config.ini rename : tests/long/00.gzip/ref/x86/linux/simple-timing/simerr => tests/long/se/00.gzip/ref/x86/linux/simple-timing/simerr rename : tests/long/00.gzip/ref/x86/linux/simple-timing/simout => tests/long/se/00.gzip/ref/x86/linux/simple-timing/simout rename : tests/long/00.gzip/ref/x86/linux/simple-timing/stats.txt => tests/long/se/00.gzip/ref/x86/linux/simple-timing/stats.txt rename : tests/long/00.gzip/test.py => tests/long/se/00.gzip/test.py rename : tests/long/10.mcf/ref/arm/linux/o3-timing/chair.cook.ppm => tests/long/se/10.mcf/ref/arm/linux/o3-timing/chair.cook.ppm rename : tests/long/10.mcf/ref/arm/linux/o3-timing/config.ini => tests/long/se/10.mcf/ref/arm/linux/o3-timing/config.ini rename : tests/long/10.mcf/ref/arm/linux/o3-timing/mcf.out => tests/long/se/10.mcf/ref/arm/linux/o3-timing/mcf.out rename : tests/long/10.mcf/ref/arm/linux/o3-timing/simerr => tests/long/se/10.mcf/ref/arm/linux/o3-timing/simerr rename : tests/long/10.mcf/ref/arm/linux/o3-timing/simout => tests/long/se/10.mcf/ref/arm/linux/o3-timing/simout rename : tests/long/10.mcf/ref/arm/linux/o3-timing/stats.txt => tests/long/se/10.mcf/ref/arm/linux/o3-timing/stats.txt rename : tests/long/10.mcf/ref/arm/linux/simple-atomic/chair.cook.ppm => tests/long/se/10.mcf/ref/arm/linux/simple-atomic/chair.cook.ppm rename : tests/long/10.mcf/ref/arm/linux/simple-atomic/config.ini => tests/long/se/10.mcf/ref/arm/linux/simple-atomic/config.ini rename : tests/long/10.mcf/ref/arm/linux/simple-atomic/mcf.out => tests/long/se/10.mcf/ref/arm/linux/simple-atomic/mcf.out rename : tests/long/10.mcf/ref/arm/linux/simple-atomic/simerr => tests/long/se/10.mcf/ref/arm/linux/simple-atomic/simerr rename : tests/long/10.mcf/ref/arm/linux/simple-atomic/simout => tests/long/se/10.mcf/ref/arm/linux/simple-atomic/simout rename : tests/long/10.mcf/ref/arm/linux/simple-atomic/stats.txt => tests/long/se/10.mcf/ref/arm/linux/simple-atomic/stats.txt rename : tests/long/10.mcf/ref/arm/linux/simple-timing/chair.cook.ppm => tests/long/se/10.mcf/ref/arm/linux/simple-timing/chair.cook.ppm rename : tests/long/10.mcf/ref/arm/linux/simple-timing/config.ini => tests/long/se/10.mcf/ref/arm/linux/simple-timing/config.ini rename : tests/long/10.mcf/ref/arm/linux/simple-timing/mcf.out => tests/long/se/10.mcf/ref/arm/linux/simple-timing/mcf.out rename : tests/long/10.mcf/ref/arm/linux/simple-timing/simerr => tests/long/se/10.mcf/ref/arm/linux/simple-timing/simerr rename : tests/long/10.mcf/ref/arm/linux/simple-timing/simout => tests/long/se/10.mcf/ref/arm/linux/simple-timing/simout rename : tests/long/10.mcf/ref/arm/linux/simple-timing/stats.txt => tests/long/se/10.mcf/ref/arm/linux/simple-timing/stats.txt rename : tests/long/10.mcf/ref/sparc/linux/simple-atomic/config.ini => tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/config.ini rename : tests/long/10.mcf/ref/sparc/linux/simple-atomic/mcf.out => tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/mcf.out rename : tests/long/10.mcf/ref/sparc/linux/simple-atomic/simerr => tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/simerr rename : tests/long/10.mcf/ref/sparc/linux/simple-atomic/simout => tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/simout rename : tests/long/10.mcf/ref/sparc/linux/simple-atomic/stats.txt => tests/long/se/10.mcf/ref/sparc/linux/simple-atomic/stats.txt rename : tests/long/10.mcf/ref/sparc/linux/simple-timing/config.ini => tests/long/se/10.mcf/ref/sparc/linux/simple-timing/config.ini rename : tests/long/10.mcf/ref/sparc/linux/simple-timing/mcf.out => tests/long/se/10.mcf/ref/sparc/linux/simple-timing/mcf.out rename : tests/long/10.mcf/ref/sparc/linux/simple-timing/simerr => tests/long/se/10.mcf/ref/sparc/linux/simple-timing/simerr rename : tests/long/10.mcf/ref/sparc/linux/simple-timing/simout => tests/long/se/10.mcf/ref/sparc/linux/simple-timing/simout rename : tests/long/10.mcf/ref/sparc/linux/simple-timing/stats.txt => tests/long/se/10.mcf/ref/sparc/linux/simple-timing/stats.txt rename : tests/long/10.mcf/ref/x86/linux/o3-timing/config.ini => tests/long/se/10.mcf/ref/x86/linux/o3-timing/config.ini rename : tests/long/10.mcf/ref/x86/linux/o3-timing/mcf.out => tests/long/se/10.mcf/ref/x86/linux/o3-timing/mcf.out rename : tests/long/10.mcf/ref/x86/linux/o3-timing/simerr => tests/long/se/10.mcf/ref/x86/linux/o3-timing/simerr rename : tests/long/10.mcf/ref/x86/linux/o3-timing/simout => tests/long/se/10.mcf/ref/x86/linux/o3-timing/simout rename : tests/long/10.mcf/ref/x86/linux/o3-timing/stats.txt => tests/long/se/10.mcf/ref/x86/linux/o3-timing/stats.txt rename : tests/long/10.mcf/ref/x86/linux/simple-atomic/config.ini => tests/long/se/10.mcf/ref/x86/linux/simple-atomic/config.ini rename : tests/long/10.mcf/ref/x86/linux/simple-atomic/mcf.out => tests/long/se/10.mcf/ref/x86/linux/simple-atomic/mcf.out rename : tests/long/10.mcf/ref/x86/linux/simple-atomic/simerr => tests/long/se/10.mcf/ref/x86/linux/simple-atomic/simerr rename : tests/long/10.mcf/ref/x86/linux/simple-atomic/simout => tests/long/se/10.mcf/ref/x86/linux/simple-atomic/simout rename : tests/long/10.mcf/ref/x86/linux/simple-atomic/stats.txt => tests/long/se/10.mcf/ref/x86/linux/simple-atomic/stats.txt rename : tests/long/10.mcf/ref/x86/linux/simple-timing/config.ini => tests/long/se/10.mcf/ref/x86/linux/simple-timing/config.ini rename : tests/long/10.mcf/ref/x86/linux/simple-timing/mcf.out => tests/long/se/10.mcf/ref/x86/linux/simple-timing/mcf.out rename : tests/long/10.mcf/ref/x86/linux/simple-timing/simerr => tests/long/se/10.mcf/ref/x86/linux/simple-timing/simerr rename : tests/long/10.mcf/ref/x86/linux/simple-timing/simout => tests/long/se/10.mcf/ref/x86/linux/simple-timing/simout rename : tests/long/10.mcf/ref/x86/linux/simple-timing/stats.txt => tests/long/se/10.mcf/ref/x86/linux/simple-timing/stats.txt rename : tests/long/10.mcf/test.py => tests/long/se/10.mcf/test.py rename : tests/long/20.parser/ref/alpha/tru64/NOTE => tests/long/se/20.parser/ref/alpha/tru64/NOTE rename : tests/long/20.parser/ref/arm/linux/o3-timing/config.ini => tests/long/se/20.parser/ref/arm/linux/o3-timing/config.ini rename : tests/long/20.parser/ref/arm/linux/o3-timing/simerr => tests/long/se/20.parser/ref/arm/linux/o3-timing/simerr rename : tests/long/20.parser/ref/arm/linux/o3-timing/simout => tests/long/se/20.parser/ref/arm/linux/o3-timing/simout rename : tests/long/20.parser/ref/arm/linux/o3-timing/stats.txt => tests/long/se/20.parser/ref/arm/linux/o3-timing/stats.txt rename : tests/long/20.parser/ref/arm/linux/simple-atomic/config.ini => tests/long/se/20.parser/ref/arm/linux/simple-atomic/config.ini rename : tests/long/20.parser/ref/arm/linux/simple-atomic/simerr => tests/long/se/20.parser/ref/arm/linux/simple-atomic/simerr rename : tests/long/20.parser/ref/arm/linux/simple-atomic/simout => tests/long/se/20.parser/ref/arm/linux/simple-atomic/simout rename : tests/long/20.parser/ref/arm/linux/simple-atomic/stats.txt => tests/long/se/20.parser/ref/arm/linux/simple-atomic/stats.txt rename : tests/long/20.parser/ref/arm/linux/simple-timing/config.ini => tests/long/se/20.parser/ref/arm/linux/simple-timing/config.ini rename : tests/long/20.parser/ref/arm/linux/simple-timing/simerr => tests/long/se/20.parser/ref/arm/linux/simple-timing/simerr rename : tests/long/20.parser/ref/arm/linux/simple-timing/simout => tests/long/se/20.parser/ref/arm/linux/simple-timing/simout rename : tests/long/20.parser/ref/arm/linux/simple-timing/stats.txt => tests/long/se/20.parser/ref/arm/linux/simple-timing/stats.txt rename : tests/long/20.parser/ref/x86/linux/o3-timing/config.ini => tests/long/se/20.parser/ref/x86/linux/o3-timing/config.ini rename : tests/long/20.parser/ref/x86/linux/o3-timing/simerr => tests/long/se/20.parser/ref/x86/linux/o3-timing/simerr rename : tests/long/20.parser/ref/x86/linux/o3-timing/simout => tests/long/se/20.parser/ref/x86/linux/o3-timing/simout rename : tests/long/20.parser/ref/x86/linux/o3-timing/stats.txt => tests/long/se/20.parser/ref/x86/linux/o3-timing/stats.txt rename : tests/long/20.parser/ref/x86/linux/simple-atomic/config.ini => tests/long/se/20.parser/ref/x86/linux/simple-atomic/config.ini rename : tests/long/20.parser/ref/x86/linux/simple-atomic/simerr => tests/long/se/20.parser/ref/x86/linux/simple-atomic/simerr rename : tests/long/20.parser/ref/x86/linux/simple-atomic/simout => tests/long/se/20.parser/ref/x86/linux/simple-atomic/simout rename : tests/long/20.parser/ref/x86/linux/simple-atomic/stats.txt => tests/long/se/20.parser/ref/x86/linux/simple-atomic/stats.txt rename : tests/long/20.parser/ref/x86/linux/simple-timing/config.ini => tests/long/se/20.parser/ref/x86/linux/simple-timing/config.ini rename : tests/long/20.parser/ref/x86/linux/simple-timing/simerr => tests/long/se/20.parser/ref/x86/linux/simple-timing/simerr rename : tests/long/20.parser/ref/x86/linux/simple-timing/simout => tests/long/se/20.parser/ref/x86/linux/simple-timing/simout rename : tests/long/20.parser/ref/x86/linux/simple-timing/stats.txt => tests/long/se/20.parser/ref/x86/linux/simple-timing/stats.txt rename : tests/long/20.parser/test.py => tests/long/se/20.parser/test.py rename : tests/long/30.eon/ref/alpha/tru64/inorder-timing/config.ini => tests/long/se/30.eon/ref/alpha/tru64/inorder-timing/config.ini rename : tests/long/30.eon/ref/alpha/tru64/inorder-timing/simerr => tests/long/se/30.eon/ref/alpha/tru64/inorder-timing/simerr rename : tests/long/30.eon/ref/alpha/tru64/inorder-timing/simout => tests/long/se/30.eon/ref/alpha/tru64/inorder-timing/simout rename : tests/long/30.eon/ref/alpha/tru64/inorder-timing/stats.txt => tests/long/se/30.eon/ref/alpha/tru64/inorder-timing/stats.txt rename : tests/long/30.eon/ref/alpha/tru64/o3-timing/config.ini => tests/long/se/30.eon/ref/alpha/tru64/o3-timing/config.ini rename : tests/long/30.eon/ref/alpha/tru64/o3-timing/simerr => tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simerr rename : tests/long/30.eon/ref/alpha/tru64/o3-timing/simout => tests/long/se/30.eon/ref/alpha/tru64/o3-timing/simout rename : tests/long/30.eon/ref/alpha/tru64/o3-timing/stats.txt => tests/long/se/30.eon/ref/alpha/tru64/o3-timing/stats.txt rename : tests/long/30.eon/ref/alpha/tru64/simple-atomic/config.ini => tests/long/se/30.eon/ref/alpha/tru64/simple-atomic/config.ini rename : tests/long/30.eon/ref/alpha/tru64/simple-atomic/simerr => tests/long/se/30.eon/ref/alpha/tru64/simple-atomic/simerr rename : tests/long/30.eon/ref/alpha/tru64/simple-atomic/simout => tests/long/se/30.eon/ref/alpha/tru64/simple-atomic/simout rename : tests/long/30.eon/ref/alpha/tru64/simple-atomic/stats.txt => tests/long/se/30.eon/ref/alpha/tru64/simple-atomic/stats.txt rename : tests/long/30.eon/ref/alpha/tru64/simple-timing/config.ini => tests/long/se/30.eon/ref/alpha/tru64/simple-timing/config.ini rename : tests/long/30.eon/ref/alpha/tru64/simple-timing/simerr => tests/long/se/30.eon/ref/alpha/tru64/simple-timing/simerr rename : tests/long/30.eon/ref/alpha/tru64/simple-timing/simout => tests/long/se/30.eon/ref/alpha/tru64/simple-timing/simout rename : tests/long/30.eon/ref/alpha/tru64/simple-timing/stats.txt => tests/long/se/30.eon/ref/alpha/tru64/simple-timing/stats.txt rename : tests/long/30.eon/ref/arm/linux/o3-timing/config.ini => tests/long/se/30.eon/ref/arm/linux/o3-timing/config.ini rename : tests/long/30.eon/ref/arm/linux/o3-timing/simerr => tests/long/se/30.eon/ref/arm/linux/o3-timing/simerr rename : tests/long/30.eon/ref/arm/linux/o3-timing/simout => tests/long/se/30.eon/ref/arm/linux/o3-timing/simout rename : tests/long/30.eon/ref/arm/linux/o3-timing/stats.txt => tests/long/se/30.eon/ref/arm/linux/o3-timing/stats.txt rename : tests/long/30.eon/ref/arm/linux/simple-atomic/config.ini => tests/long/se/30.eon/ref/arm/linux/simple-atomic/config.ini rename : tests/long/30.eon/ref/arm/linux/simple-atomic/simerr => tests/long/se/30.eon/ref/arm/linux/simple-atomic/simerr rename : tests/long/30.eon/ref/arm/linux/simple-atomic/simout => tests/long/se/30.eon/ref/arm/linux/simple-atomic/simout rename : tests/long/30.eon/ref/arm/linux/simple-atomic/stats.txt => tests/long/se/30.eon/ref/arm/linux/simple-atomic/stats.txt rename : tests/long/30.eon/ref/arm/linux/simple-timing/config.ini => tests/long/se/30.eon/ref/arm/linux/simple-timing/config.ini rename : tests/long/30.eon/ref/arm/linux/simple-timing/simerr => tests/long/se/30.eon/ref/arm/linux/simple-timing/simerr rename : tests/long/30.eon/ref/arm/linux/simple-timing/simout => tests/long/se/30.eon/ref/arm/linux/simple-timing/simout rename : tests/long/30.eon/ref/arm/linux/simple-timing/stats.txt => tests/long/se/30.eon/ref/arm/linux/simple-timing/stats.txt rename : tests/long/30.eon/test.py => tests/long/se/30.eon/test.py rename : tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/config.ini => tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/config.ini rename : tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/simerr => tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simerr rename : tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/simout => tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/simout rename : tests/long/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt => tests/long/se/40.perlbmk/ref/alpha/tru64/o3-timing/stats.txt rename : tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/config.ini => tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/config.ini rename : tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/simerr => tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/simerr rename : tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/simout => tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/simout rename : tests/long/40.perlbmk/ref/alpha/tru64/simple-atomic/stats.txt => tests/long/se/40.perlbmk/ref/alpha/tru64/simple-atomic/stats.txt rename : tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/config.ini => tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/config.ini rename : tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/simerr => tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/simerr rename : tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/simout => tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/simout rename : tests/long/40.perlbmk/ref/alpha/tru64/simple-timing/stats.txt => tests/long/se/40.perlbmk/ref/alpha/tru64/simple-timing/stats.txt rename : tests/long/40.perlbmk/ref/arm/linux/o3-timing/config.ini => tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/config.ini rename : tests/long/40.perlbmk/ref/arm/linux/o3-timing/simerr => tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/simerr rename : tests/long/40.perlbmk/ref/arm/linux/o3-timing/simout => tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/simout rename : tests/long/40.perlbmk/ref/arm/linux/o3-timing/stats.txt => tests/long/se/40.perlbmk/ref/arm/linux/o3-timing/stats.txt rename : tests/long/40.perlbmk/ref/arm/linux/simple-atomic/config.ini => tests/long/se/40.perlbmk/ref/arm/linux/simple-atomic/config.ini rename : tests/long/40.perlbmk/ref/arm/linux/simple-atomic/simerr => tests/long/se/40.perlbmk/ref/arm/linux/simple-atomic/simerr rename : tests/long/40.perlbmk/ref/arm/linux/simple-atomic/simout => tests/long/se/40.perlbmk/ref/arm/linux/simple-atomic/simout rename : tests/long/40.perlbmk/ref/arm/linux/simple-atomic/stats.txt => tests/long/se/40.perlbmk/ref/arm/linux/simple-atomic/stats.txt rename : tests/long/40.perlbmk/ref/arm/linux/simple-timing/config.ini => tests/long/se/40.perlbmk/ref/arm/linux/simple-timing/config.ini rename : tests/long/40.perlbmk/ref/arm/linux/simple-timing/simerr => tests/long/se/40.perlbmk/ref/arm/linux/simple-timing/simerr rename : tests/long/40.perlbmk/ref/arm/linux/simple-timing/simout => tests/long/se/40.perlbmk/ref/arm/linux/simple-timing/simout rename : tests/long/40.perlbmk/ref/arm/linux/simple-timing/stats.txt => tests/long/se/40.perlbmk/ref/arm/linux/simple-timing/stats.txt rename : tests/long/40.perlbmk/test.py => tests/long/se/40.perlbmk/test.py rename : tests/long/50.vortex/ref/alpha/tru64/inorder-timing/config.ini => tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/config.ini rename : tests/long/50.vortex/ref/alpha/tru64/inorder-timing/simerr => tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/simerr rename : tests/long/50.vortex/ref/alpha/tru64/inorder-timing/simout => tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/simout rename : tests/long/50.vortex/ref/alpha/tru64/inorder-timing/smred.msg => tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/smred.msg rename : tests/long/50.vortex/ref/alpha/tru64/inorder-timing/smred.out => tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/smred.out rename : tests/long/50.vortex/ref/alpha/tru64/inorder-timing/stats.txt => tests/long/se/50.vortex/ref/alpha/tru64/inorder-timing/stats.txt rename : tests/long/50.vortex/ref/alpha/tru64/o3-timing/config.ini => tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/config.ini rename : tests/long/50.vortex/ref/alpha/tru64/o3-timing/simerr => tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simerr rename : tests/long/50.vortex/ref/alpha/tru64/o3-timing/simout => tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/simout rename : tests/long/50.vortex/ref/alpha/tru64/o3-timing/smred.msg => tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/smred.msg rename : tests/long/50.vortex/ref/alpha/tru64/o3-timing/smred.out => tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/smred.out rename : tests/long/50.vortex/ref/alpha/tru64/o3-timing/stats.txt => tests/long/se/50.vortex/ref/alpha/tru64/o3-timing/stats.txt rename : tests/long/50.vortex/ref/alpha/tru64/simple-atomic/config.ini => tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/config.ini rename : tests/long/50.vortex/ref/alpha/tru64/simple-atomic/simerr => tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/simerr rename : tests/long/50.vortex/ref/alpha/tru64/simple-atomic/simout => tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/simout rename : tests/long/50.vortex/ref/alpha/tru64/simple-atomic/smred.msg => tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/smred.msg rename : tests/long/50.vortex/ref/alpha/tru64/simple-atomic/smred.out => tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/smred.out rename : tests/long/50.vortex/ref/alpha/tru64/simple-atomic/stats.txt => tests/long/se/50.vortex/ref/alpha/tru64/simple-atomic/stats.txt rename : tests/long/50.vortex/ref/alpha/tru64/simple-timing/config.ini => tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/config.ini rename : tests/long/50.vortex/ref/alpha/tru64/simple-timing/simerr => tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/simerr rename : tests/long/50.vortex/ref/alpha/tru64/simple-timing/simout => tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/simout rename : tests/long/50.vortex/ref/alpha/tru64/simple-timing/smred.msg => tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/smred.msg rename : tests/long/50.vortex/ref/alpha/tru64/simple-timing/smred.out => tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/smred.out rename : tests/long/50.vortex/ref/alpha/tru64/simple-timing/stats.txt => tests/long/se/50.vortex/ref/alpha/tru64/simple-timing/stats.txt rename : tests/long/50.vortex/ref/arm/linux/o3-timing/config.ini => tests/long/se/50.vortex/ref/arm/linux/o3-timing/config.ini rename : tests/long/50.vortex/ref/arm/linux/o3-timing/simerr => tests/long/se/50.vortex/ref/arm/linux/o3-timing/simerr rename : tests/long/50.vortex/ref/arm/linux/o3-timing/simout => tests/long/se/50.vortex/ref/arm/linux/o3-timing/simout rename : tests/long/50.vortex/ref/arm/linux/o3-timing/smred.out => tests/long/se/50.vortex/ref/arm/linux/o3-timing/smred.out rename : tests/long/50.vortex/ref/arm/linux/o3-timing/stats.txt => tests/long/se/50.vortex/ref/arm/linux/o3-timing/stats.txt rename : tests/long/50.vortex/ref/arm/linux/simple-atomic/config.ini => tests/long/se/50.vortex/ref/arm/linux/simple-atomic/config.ini rename : tests/long/50.vortex/ref/arm/linux/simple-atomic/simerr => tests/long/se/50.vortex/ref/arm/linux/simple-atomic/simerr rename : tests/long/50.vortex/ref/arm/linux/simple-atomic/simout => tests/long/se/50.vortex/ref/arm/linux/simple-atomic/simout rename : tests/long/50.vortex/ref/arm/linux/simple-atomic/smred.out => tests/long/se/50.vortex/ref/arm/linux/simple-atomic/smred.out rename : tests/long/50.vortex/ref/arm/linux/simple-atomic/stats.txt => tests/long/se/50.vortex/ref/arm/linux/simple-atomic/stats.txt rename : tests/long/50.vortex/ref/arm/linux/simple-timing/config.ini => tests/long/se/50.vortex/ref/arm/linux/simple-timing/config.ini rename : tests/long/50.vortex/ref/arm/linux/simple-timing/simerr => tests/long/se/50.vortex/ref/arm/linux/simple-timing/simerr rename : tests/long/50.vortex/ref/arm/linux/simple-timing/simout => tests/long/se/50.vortex/ref/arm/linux/simple-timing/simout rename : tests/long/50.vortex/ref/arm/linux/simple-timing/smred.out => tests/long/se/50.vortex/ref/arm/linux/simple-timing/smred.out rename : tests/long/50.vortex/ref/arm/linux/simple-timing/stats.txt => tests/long/se/50.vortex/ref/arm/linux/simple-timing/stats.txt rename : tests/long/50.vortex/ref/sparc/linux/simple-atomic/config.ini => tests/long/se/50.vortex/ref/sparc/linux/simple-atomic/config.ini rename : tests/long/50.vortex/ref/sparc/linux/simple-atomic/simerr => tests/long/se/50.vortex/ref/sparc/linux/simple-atomic/simerr rename : tests/long/50.vortex/ref/sparc/linux/simple-atomic/simout => tests/long/se/50.vortex/ref/sparc/linux/simple-atomic/simout rename : tests/long/50.vortex/ref/sparc/linux/simple-atomic/smred.msg => tests/long/se/50.vortex/ref/sparc/linux/simple-atomic/smred.msg rename : tests/long/50.vortex/ref/sparc/linux/simple-atomic/smred.out => tests/long/se/50.vortex/ref/sparc/linux/simple-atomic/smred.out rename : tests/long/50.vortex/ref/sparc/linux/simple-atomic/stats.txt => tests/long/se/50.vortex/ref/sparc/linux/simple-atomic/stats.txt rename : tests/long/50.vortex/ref/sparc/linux/simple-timing/config.ini => tests/long/se/50.vortex/ref/sparc/linux/simple-timing/config.ini rename : tests/long/50.vortex/ref/sparc/linux/simple-timing/simerr => tests/long/se/50.vortex/ref/sparc/linux/simple-timing/simerr rename : tests/long/50.vortex/ref/sparc/linux/simple-timing/simout => tests/long/se/50.vortex/ref/sparc/linux/simple-timing/simout rename : tests/long/50.vortex/ref/sparc/linux/simple-timing/smred.msg => tests/long/se/50.vortex/ref/sparc/linux/simple-timing/smred.msg rename : tests/long/50.vortex/ref/sparc/linux/simple-timing/smred.out => tests/long/se/50.vortex/ref/sparc/linux/simple-timing/smred.out rename : tests/long/50.vortex/ref/sparc/linux/simple-timing/stats.txt => tests/long/se/50.vortex/ref/sparc/linux/simple-timing/stats.txt rename : tests/long/50.vortex/test.py => tests/long/se/50.vortex/test.py rename : tests/long/60.bzip2/ref/alpha/tru64/inorder-timing/config.ini => tests/long/se/60.bzip2/ref/alpha/tru64/inorder-timing/config.ini rename : tests/long/60.bzip2/ref/alpha/tru64/inorder-timing/simerr => tests/long/se/60.bzip2/ref/alpha/tru64/inorder-timing/simerr rename : tests/long/60.bzip2/ref/alpha/tru64/inorder-timing/simout => tests/long/se/60.bzip2/ref/alpha/tru64/inorder-timing/simout rename : tests/long/60.bzip2/ref/alpha/tru64/inorder-timing/stats.txt => tests/long/se/60.bzip2/ref/alpha/tru64/inorder-timing/stats.txt rename : tests/long/60.bzip2/ref/alpha/tru64/o3-timing/config.ini => tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/config.ini rename : tests/long/60.bzip2/ref/alpha/tru64/o3-timing/simerr => tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/simerr rename : tests/long/60.bzip2/ref/alpha/tru64/o3-timing/simout => tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/simout rename : tests/long/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt => tests/long/se/60.bzip2/ref/alpha/tru64/o3-timing/stats.txt rename : tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/config.ini => tests/long/se/60.bzip2/ref/alpha/tru64/simple-atomic/config.ini rename : tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/simerr => tests/long/se/60.bzip2/ref/alpha/tru64/simple-atomic/simerr rename : tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/simout => tests/long/se/60.bzip2/ref/alpha/tru64/simple-atomic/simout rename : tests/long/60.bzip2/ref/alpha/tru64/simple-atomic/stats.txt => tests/long/se/60.bzip2/ref/alpha/tru64/simple-atomic/stats.txt rename : tests/long/60.bzip2/ref/alpha/tru64/simple-timing/config.ini => tests/long/se/60.bzip2/ref/alpha/tru64/simple-timing/config.ini rename : tests/long/60.bzip2/ref/alpha/tru64/simple-timing/simerr => tests/long/se/60.bzip2/ref/alpha/tru64/simple-timing/simerr rename : tests/long/60.bzip2/ref/alpha/tru64/simple-timing/simout => tests/long/se/60.bzip2/ref/alpha/tru64/simple-timing/simout rename : tests/long/60.bzip2/ref/alpha/tru64/simple-timing/stats.txt => tests/long/se/60.bzip2/ref/alpha/tru64/simple-timing/stats.txt rename : tests/long/60.bzip2/ref/arm/linux/o3-timing/config.ini => tests/long/se/60.bzip2/ref/arm/linux/o3-timing/config.ini rename : tests/long/60.bzip2/ref/arm/linux/o3-timing/simerr => tests/long/se/60.bzip2/ref/arm/linux/o3-timing/simerr rename : tests/long/60.bzip2/ref/arm/linux/o3-timing/simout => tests/long/se/60.bzip2/ref/arm/linux/o3-timing/simout rename : tests/long/60.bzip2/ref/arm/linux/o3-timing/stats.txt => tests/long/se/60.bzip2/ref/arm/linux/o3-timing/stats.txt rename : tests/long/60.bzip2/ref/arm/linux/simple-atomic/config.ini => tests/long/se/60.bzip2/ref/arm/linux/simple-atomic/config.ini rename : tests/long/60.bzip2/ref/arm/linux/simple-atomic/simerr => tests/long/se/60.bzip2/ref/arm/linux/simple-atomic/simerr rename : tests/long/60.bzip2/ref/arm/linux/simple-atomic/simout => tests/long/se/60.bzip2/ref/arm/linux/simple-atomic/simout rename : tests/long/60.bzip2/ref/arm/linux/simple-atomic/stats.txt => tests/long/se/60.bzip2/ref/arm/linux/simple-atomic/stats.txt rename : tests/long/60.bzip2/ref/arm/linux/simple-timing/config.ini => tests/long/se/60.bzip2/ref/arm/linux/simple-timing/config.ini rename : tests/long/60.bzip2/ref/arm/linux/simple-timing/simerr => tests/long/se/60.bzip2/ref/arm/linux/simple-timing/simerr rename : tests/long/60.bzip2/ref/arm/linux/simple-timing/simout => tests/long/se/60.bzip2/ref/arm/linux/simple-timing/simout rename : tests/long/60.bzip2/ref/arm/linux/simple-timing/stats.txt => tests/long/se/60.bzip2/ref/arm/linux/simple-timing/stats.txt rename : tests/long/60.bzip2/ref/x86/linux/simple-atomic/config.ini => tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/config.ini rename : tests/long/60.bzip2/ref/x86/linux/simple-atomic/simerr => tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/simerr rename : tests/long/60.bzip2/ref/x86/linux/simple-atomic/simout => tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/simout rename : tests/long/60.bzip2/ref/x86/linux/simple-atomic/stats.txt => tests/long/se/60.bzip2/ref/x86/linux/simple-atomic/stats.txt rename : tests/long/60.bzip2/ref/x86/linux/simple-timing/config.ini => tests/long/se/60.bzip2/ref/x86/linux/simple-timing/config.ini rename : tests/long/60.bzip2/ref/x86/linux/simple-timing/simerr => tests/long/se/60.bzip2/ref/x86/linux/simple-timing/simerr rename : tests/long/60.bzip2/ref/x86/linux/simple-timing/simout => tests/long/se/60.bzip2/ref/x86/linux/simple-timing/simout rename : tests/long/60.bzip2/ref/x86/linux/simple-timing/stats.txt => tests/long/se/60.bzip2/ref/x86/linux/simple-timing/stats.txt rename : tests/long/60.bzip2/test.py => tests/long/se/60.bzip2/test.py rename : tests/long/70.twolf/ref/alpha/tru64/inorder-timing/config.ini => tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/config.ini rename : tests/long/70.twolf/ref/alpha/tru64/inorder-timing/simerr => tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/simerr rename : tests/long/70.twolf/ref/alpha/tru64/inorder-timing/simout => tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/simout rename : tests/long/70.twolf/ref/alpha/tru64/inorder-timing/smred.out => tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/smred.out rename : tests/long/70.twolf/ref/alpha/tru64/inorder-timing/smred.pin => tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/smred.pin rename : tests/long/70.twolf/ref/alpha/tru64/inorder-timing/smred.pl1 => tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/smred.pl1 rename : tests/long/70.twolf/ref/alpha/tru64/inorder-timing/smred.pl2 => tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/smred.pl2 rename : tests/long/70.twolf/ref/alpha/tru64/inorder-timing/smred.sav => tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/smred.sav rename : tests/long/70.twolf/ref/alpha/tru64/inorder-timing/smred.sv2 => tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/smred.sv2 rename : tests/long/70.twolf/ref/alpha/tru64/inorder-timing/smred.twf => tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/smred.twf rename : tests/long/70.twolf/ref/alpha/tru64/inorder-timing/stats.txt => tests/long/se/70.twolf/ref/alpha/tru64/inorder-timing/stats.txt rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/config.ini => tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/config.ini rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/simerr => tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/simerr rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/simout => tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/simout rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/smred.out => tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/smred.out rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/smred.pin => tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/smred.pin rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/smred.pl1 => tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/smred.pl1 rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/smred.pl2 => tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/smred.pl2 rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/smred.sav => tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/smred.sav rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/smred.sv2 => tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/smred.sv2 rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/smred.twf => tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/smred.twf rename : tests/long/70.twolf/ref/alpha/tru64/o3-timing/stats.txt => tests/long/se/70.twolf/ref/alpha/tru64/o3-timing/stats.txt rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/config.ini => tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/config.ini rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/simerr => tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/simerr rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/simout => tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/simout rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/smred.out => tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.out rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/smred.pin => tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.pin rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/smred.pl1 => tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.pl1 rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/smred.pl2 => tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.pl2 rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/smred.sav => tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.sav rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/smred.sv2 => tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.sv2 rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/smred.twf => tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/smred.twf rename : tests/long/70.twolf/ref/alpha/tru64/simple-atomic/stats.txt => tests/long/se/70.twolf/ref/alpha/tru64/simple-atomic/stats.txt rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/config.ini => tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/config.ini rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/simerr => tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/simerr rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/simout => tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/simout rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/smred.out => tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/smred.out rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/smred.pin => tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/smred.pin rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/smred.pl1 => tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/smred.pl1 rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/smred.pl2 => tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/smred.pl2 rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/smred.sav => tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/smred.sav rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/smred.sv2 => tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/smred.sv2 rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/smred.twf => tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/smred.twf rename : tests/long/70.twolf/ref/alpha/tru64/simple-timing/stats.txt => tests/long/se/70.twolf/ref/alpha/tru64/simple-timing/stats.txt rename : tests/long/70.twolf/ref/arm/linux/o3-timing/config.ini => tests/long/se/70.twolf/ref/arm/linux/o3-timing/config.ini rename : tests/long/70.twolf/ref/arm/linux/o3-timing/simerr => tests/long/se/70.twolf/ref/arm/linux/o3-timing/simerr rename : tests/long/70.twolf/ref/arm/linux/o3-timing/simout => tests/long/se/70.twolf/ref/arm/linux/o3-timing/simout rename : tests/long/70.twolf/ref/arm/linux/o3-timing/smred.out => tests/long/se/70.twolf/ref/arm/linux/o3-timing/smred.out rename : tests/long/70.twolf/ref/arm/linux/o3-timing/stats.txt => tests/long/se/70.twolf/ref/arm/linux/o3-timing/stats.txt rename : tests/long/70.twolf/ref/arm/linux/simple-atomic/config.ini => tests/long/se/70.twolf/ref/arm/linux/simple-atomic/config.ini rename : tests/long/70.twolf/ref/arm/linux/simple-atomic/simerr => tests/long/se/70.twolf/ref/arm/linux/simple-atomic/simerr rename : tests/long/70.twolf/ref/arm/linux/simple-atomic/simout => tests/long/se/70.twolf/ref/arm/linux/simple-atomic/simout rename : tests/long/70.twolf/ref/arm/linux/simple-atomic/smred.out => tests/long/se/70.twolf/ref/arm/linux/simple-atomic/smred.out rename : tests/long/70.twolf/ref/arm/linux/simple-atomic/stats.txt => tests/long/se/70.twolf/ref/arm/linux/simple-atomic/stats.txt rename : tests/long/70.twolf/ref/arm/linux/simple-timing/config.ini => tests/long/se/70.twolf/ref/arm/linux/simple-timing/config.ini rename : tests/long/70.twolf/ref/arm/linux/simple-timing/simerr => tests/long/se/70.twolf/ref/arm/linux/simple-timing/simerr rename : tests/long/70.twolf/ref/arm/linux/simple-timing/simout => tests/long/se/70.twolf/ref/arm/linux/simple-timing/simout rename : tests/long/70.twolf/ref/arm/linux/simple-timing/smred.out => tests/long/se/70.twolf/ref/arm/linux/simple-timing/smred.out rename : tests/long/70.twolf/ref/arm/linux/simple-timing/stats.txt => tests/long/se/70.twolf/ref/arm/linux/simple-timing/stats.txt rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/config.ini => tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/config.ini rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/simerr => tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/simerr rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/simout => tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/simout rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/smred.out => tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.out rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/smred.pin => tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pin rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/smred.pl1 => tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pl1 rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/smred.pl2 => tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.pl2 rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/smred.sav => tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.sav rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/smred.sv2 => tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.sv2 rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/smred.twf => tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/smred.twf rename : tests/long/70.twolf/ref/sparc/linux/simple-atomic/stats.txt => tests/long/se/70.twolf/ref/sparc/linux/simple-atomic/stats.txt rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/config.ini => tests/long/se/70.twolf/ref/sparc/linux/simple-timing/config.ini rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/simerr => tests/long/se/70.twolf/ref/sparc/linux/simple-timing/simerr rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/simout => tests/long/se/70.twolf/ref/sparc/linux/simple-timing/simout rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/smred.out => tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.out rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/smred.pin => tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.pin rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/smred.pl1 => tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.pl1 rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/smred.pl2 => tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.pl2 rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/smred.sav => tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.sav rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/smred.sv2 => tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.sv2 rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/smred.twf => tests/long/se/70.twolf/ref/sparc/linux/simple-timing/smred.twf rename : tests/long/70.twolf/ref/sparc/linux/simple-timing/stats.txt => tests/long/se/70.twolf/ref/sparc/linux/simple-timing/stats.txt rename : tests/long/70.twolf/ref/x86/linux/o3-timing/config.ini => tests/long/se/70.twolf/ref/x86/linux/o3-timing/config.ini rename : tests/long/70.twolf/ref/x86/linux/o3-timing/simerr => tests/long/se/70.twolf/ref/x86/linux/o3-timing/simerr rename : tests/long/70.twolf/ref/x86/linux/o3-timing/simout => tests/long/se/70.twolf/ref/x86/linux/o3-timing/simout rename : tests/long/70.twolf/ref/x86/linux/o3-timing/smred.out => tests/long/se/70.twolf/ref/x86/linux/o3-timing/smred.out rename : tests/long/70.twolf/ref/x86/linux/o3-timing/smred.pin => tests/long/se/70.twolf/ref/x86/linux/o3-timing/smred.pin rename : tests/long/70.twolf/ref/x86/linux/o3-timing/smred.pl1 => tests/long/se/70.twolf/ref/x86/linux/o3-timing/smred.pl1 rename : tests/long/70.twolf/ref/x86/linux/o3-timing/smred.pl2 => tests/long/se/70.twolf/ref/x86/linux/o3-timing/smred.pl2 rename : tests/long/70.twolf/ref/x86/linux/o3-timing/smred.sav => tests/long/se/70.twolf/ref/x86/linux/o3-timing/smred.sav rename : tests/long/70.twolf/ref/x86/linux/o3-timing/smred.sv2 => tests/long/se/70.twolf/ref/x86/linux/o3-timing/smred.sv2 rename : tests/long/70.twolf/ref/x86/linux/o3-timing/smred.twf => tests/long/se/70.twolf/ref/x86/linux/o3-timing/smred.twf rename : tests/long/70.twolf/ref/x86/linux/o3-timing/stats.txt => tests/long/se/70.twolf/ref/x86/linux/o3-timing/stats.txt rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/config.ini => tests/long/se/70.twolf/ref/x86/linux/simple-atomic/config.ini rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/simerr => tests/long/se/70.twolf/ref/x86/linux/simple-atomic/simerr rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/simout => tests/long/se/70.twolf/ref/x86/linux/simple-atomic/simout rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/smred.out => tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.out rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/smred.pin => tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.pin rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/smred.pl1 => tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.pl1 rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/smred.pl2 => tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.pl2 rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/smred.sav => tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.sav rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/smred.sv2 => tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.sv2 rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/smred.twf => tests/long/se/70.twolf/ref/x86/linux/simple-atomic/smred.twf rename : tests/long/70.twolf/ref/x86/linux/simple-atomic/stats.txt => tests/long/se/70.twolf/ref/x86/linux/simple-atomic/stats.txt rename : tests/long/70.twolf/ref/x86/linux/simple-timing/config.ini => tests/long/se/70.twolf/ref/x86/linux/simple-timing/config.ini rename : tests/long/70.twolf/ref/x86/linux/simple-timing/simerr => tests/long/se/70.twolf/ref/x86/linux/simple-timing/simerr rename : tests/long/70.twolf/ref/x86/linux/simple-timing/simout => tests/long/se/70.twolf/ref/x86/linux/simple-timing/simout rename : tests/long/70.twolf/ref/x86/linux/simple-timing/smred.out => tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.out rename : tests/long/70.twolf/ref/x86/linux/simple-timing/smred.pin => tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.pin rename : tests/long/70.twolf/ref/x86/linux/simple-timing/smred.pl1 => tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.pl1 rename : tests/long/70.twolf/ref/x86/linux/simple-timing/smred.pl2 => tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.pl2 rename : tests/long/70.twolf/ref/x86/linux/simple-timing/smred.sav => tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.sav rename : tests/long/70.twolf/ref/x86/linux/simple-timing/smred.sv2 => tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.sv2 rename : tests/long/70.twolf/ref/x86/linux/simple-timing/smred.twf => tests/long/se/70.twolf/ref/x86/linux/simple-timing/smred.twf rename : tests/long/70.twolf/ref/x86/linux/simple-timing/stats.txt => tests/long/se/70.twolf/ref/x86/linux/simple-timing/stats.txt rename : tests/long/70.twolf/test.py => tests/long/se/70.twolf/test.py rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/simerr => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/simerr rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/simout => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/simout rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stats.txt => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stats.txt rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/system.terminal => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/system.terminal rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simerr => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simerr rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simout => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/simout rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stats.txt rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/system.terminal => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/system.terminal rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/simerr => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/simerr rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/simout => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/simout rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stats.txt => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stats.txt rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/system.terminal => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/system.terminal rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simerr => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simerr rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simout => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/simout rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stats.txt => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stats.txt rename : tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/system.terminal => tests/quick/fs/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/system.terminal rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/config.ini => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/config.ini rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/simerr => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/simerr rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/simout => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/simout rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/stats.txt => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/stats.txt rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/status => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/status rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/system.terminal => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-dual/system.terminal rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/config.ini => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/config.ini rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/simerr => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/simerr rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/simout => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/simout rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/stats.txt => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/stats.txt rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/status => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/status rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-atomic/system.terminal => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic/system.terminal rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/config.ini => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/config.ini rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/simerr => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/simerr rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/simout => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/simout rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/stats.txt => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/stats.txt rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/status => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/status rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/system.terminal => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing-dual/system.terminal rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/config.ini => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/config.ini rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/simerr => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/simerr rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/simout => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/simout rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/stats.txt => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/stats.txt rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/status => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/status rename : tests/quick/10.linux-boot/ref/arm/linux/realview-simple-timing/system.terminal => tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-timing/system.terminal rename : tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/config.ini => tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/config.ini rename : tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/simerr => tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/simerr rename : tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/simout => tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/simout rename : tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt => tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/stats.txt rename : tests/quick/10.linux-boot/ref/x86/linux/pc-simple-atomic/system.pc.terminal => tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-atomic/system.pc.terminal rename : tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/config.ini => tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/config.ini rename : tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/simerr => tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/simerr rename : tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/simout => tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/simout rename : tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt => tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/stats.txt rename : tests/quick/10.linux-boot/ref/x86/linux/pc-simple-timing/system.pc.terminal => tests/quick/fs/10.linux-boot/ref/x86/linux/pc-simple-timing/system.pc.terminal rename : tests/quick/10.linux-boot/test.py => tests/quick/fs/10.linux-boot/test.py rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini => tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/drivesys.terminal => tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/drivesys.terminal rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/simerr => tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/simerr rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/simout => tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/simout rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt => tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt rename : tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/testsys.terminal => tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/testsys.terminal rename : tests/quick/80.netperf-stream/test.py => tests/quick/fs/80.netperf-stream/test.py rename : tests/quick/00.hello.mp/test.py => tests/quick/se/00.hello.mp/test.py rename : tests/quick/00.hello/ref/alpha/linux/inorder-timing/config.ini => tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/config.ini rename : tests/quick/00.hello/ref/alpha/linux/inorder-timing/simerr => tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/simerr rename : tests/quick/00.hello/ref/alpha/linux/inorder-timing/simout => tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/simout rename : tests/quick/00.hello/ref/alpha/linux/inorder-timing/stats.txt => tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/stats.txt rename : tests/quick/00.hello/ref/alpha/linux/o3-timing/config.ini => tests/quick/se/00.hello/ref/alpha/linux/o3-timing/config.ini rename : tests/quick/00.hello/ref/alpha/linux/o3-timing/simerr => tests/quick/se/00.hello/ref/alpha/linux/o3-timing/simerr rename : tests/quick/00.hello/ref/alpha/linux/o3-timing/simout => tests/quick/se/00.hello/ref/alpha/linux/o3-timing/simout rename : tests/quick/00.hello/ref/alpha/linux/o3-timing/stats.txt => tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt rename : tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.ini => tests/quick/se/00.hello/ref/alpha/linux/simple-atomic/config.ini rename : tests/quick/00.hello/ref/alpha/linux/simple-atomic/simerr => tests/quick/se/00.hello/ref/alpha/linux/simple-atomic/simerr rename : tests/quick/00.hello/ref/alpha/linux/simple-atomic/simout => tests/quick/se/00.hello/ref/alpha/linux/simple-atomic/simout rename : tests/quick/00.hello/ref/alpha/linux/simple-atomic/stats.txt => tests/quick/se/00.hello/ref/alpha/linux/simple-atomic/stats.txt rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/config.ini => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/config.ini rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/ruby.stats => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/ruby.stats rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simerr => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simerr rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simout => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simout rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/stats.txt => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/stats.txt rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/config.ini => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/config.ini rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/ruby.stats => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/ruby.stats rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/simerr => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/simerr rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/simout => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/simout rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/stats.txt => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/stats.txt rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/config.ini => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/config.ini rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/ruby.stats => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/ruby.stats rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/simerr => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/simerr rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/simout => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/simout rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/stats.txt => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/stats.txt rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/config.ini => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/config.ini rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/ruby.stats => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/ruby.stats rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/simerr => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/simerr rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/simout => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/simout rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/stats.txt => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/stats.txt rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby/config.ini => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/config.ini rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby/simerr => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/simerr rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby/simout => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/simout rename : tests/quick/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt rename : tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini => tests/quick/se/00.hello/ref/alpha/linux/simple-timing/config.ini rename : tests/quick/00.hello/ref/alpha/linux/simple-timing/simerr => tests/quick/se/00.hello/ref/alpha/linux/simple-timing/simerr rename : tests/quick/00.hello/ref/alpha/linux/simple-timing/simout => tests/quick/se/00.hello/ref/alpha/linux/simple-timing/simout rename : tests/quick/00.hello/ref/alpha/linux/simple-timing/stats.txt => tests/quick/se/00.hello/ref/alpha/linux/simple-timing/stats.txt rename : tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini => tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/config.ini rename : tests/quick/00.hello/ref/alpha/tru64/o3-timing/simerr => tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/simerr rename : tests/quick/00.hello/ref/alpha/tru64/o3-timing/simout => tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/simout rename : tests/quick/00.hello/ref/alpha/tru64/o3-timing/stats.txt => tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt rename : tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini => tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/config.ini rename : tests/quick/00.hello/ref/alpha/tru64/simple-atomic/simerr => tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/simerr rename : tests/quick/00.hello/ref/alpha/tru64/simple-atomic/simout => tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/simout rename : tests/quick/00.hello/ref/alpha/tru64/simple-atomic/stats.txt => tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/stats.txt rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simerr => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simerr rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simout => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simout rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/config.ini => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/config.ini rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/ruby.stats => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/ruby.stats rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simerr => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simerr rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simout => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simout rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/stats.txt => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/stats.txt rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/config.ini => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/config.ini rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/ruby.stats => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/ruby.stats rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simerr => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simerr rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simout => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simout rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/config.ini => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/config.ini rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/ruby.stats => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/ruby.stats rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simerr => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simerr rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simout => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simout rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby/config.ini => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/config.ini rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby/ruby.stats => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/ruby.stats rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby/simerr => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/simerr rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby/simout => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/simout rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing-ruby/stats.txt => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/stats.txt rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/config.ini rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing/simerr => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/simerr rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing/simout => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/simout rename : tests/quick/00.hello/ref/alpha/tru64/simple-timing/stats.txt => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/stats.txt rename : tests/quick/00.hello/ref/arm/linux/o3-timing/config.ini => tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini rename : tests/quick/00.hello/ref/arm/linux/o3-timing/simerr => tests/quick/se/00.hello/ref/arm/linux/o3-timing/simerr rename : tests/quick/00.hello/ref/arm/linux/o3-timing/simout => tests/quick/se/00.hello/ref/arm/linux/o3-timing/simout rename : tests/quick/00.hello/ref/arm/linux/o3-timing/stats.txt => tests/quick/se/00.hello/ref/arm/linux/o3-timing/stats.txt rename : tests/quick/00.hello/ref/arm/linux/simple-atomic/config.ini => tests/quick/se/00.hello/ref/arm/linux/simple-atomic/config.ini rename : tests/quick/00.hello/ref/arm/linux/simple-atomic/simerr => tests/quick/se/00.hello/ref/arm/linux/simple-atomic/simerr rename : tests/quick/00.hello/ref/arm/linux/simple-atomic/simout => tests/quick/se/00.hello/ref/arm/linux/simple-atomic/simout rename : tests/quick/00.hello/ref/arm/linux/simple-atomic/stats.txt => tests/quick/se/00.hello/ref/arm/linux/simple-atomic/stats.txt rename : tests/quick/00.hello/ref/arm/linux/simple-timing/config.ini => tests/quick/se/00.hello/ref/arm/linux/simple-timing/config.ini rename : tests/quick/00.hello/ref/arm/linux/simple-timing/simerr => tests/quick/se/00.hello/ref/arm/linux/simple-timing/simerr rename : tests/quick/00.hello/ref/arm/linux/simple-timing/simout => tests/quick/se/00.hello/ref/arm/linux/simple-timing/simout rename : tests/quick/00.hello/ref/arm/linux/simple-timing/stats.txt => tests/quick/se/00.hello/ref/arm/linux/simple-timing/stats.txt rename : tests/quick/00.hello/ref/mips/linux/inorder-timing/config.ini => tests/quick/se/00.hello/ref/mips/linux/inorder-timing/config.ini rename : tests/quick/00.hello/ref/mips/linux/inorder-timing/simerr => tests/quick/se/00.hello/ref/mips/linux/inorder-timing/simerr rename : tests/quick/00.hello/ref/mips/linux/inorder-timing/simout => tests/quick/se/00.hello/ref/mips/linux/inorder-timing/simout rename : tests/quick/00.hello/ref/mips/linux/inorder-timing/stats.txt => tests/quick/se/00.hello/ref/mips/linux/inorder-timing/stats.txt rename : tests/quick/00.hello/ref/mips/linux/o3-timing/config.ini => tests/quick/se/00.hello/ref/mips/linux/o3-timing/config.ini rename : tests/quick/00.hello/ref/mips/linux/o3-timing/simerr => tests/quick/se/00.hello/ref/mips/linux/o3-timing/simerr rename : tests/quick/00.hello/ref/mips/linux/o3-timing/simout => tests/quick/se/00.hello/ref/mips/linux/o3-timing/simout rename : tests/quick/00.hello/ref/mips/linux/o3-timing/stats.txt => tests/quick/se/00.hello/ref/mips/linux/o3-timing/stats.txt rename : tests/quick/00.hello/ref/mips/linux/simple-atomic/config.ini => tests/quick/se/00.hello/ref/mips/linux/simple-atomic/config.ini rename : tests/quick/00.hello/ref/mips/linux/simple-atomic/simerr => tests/quick/se/00.hello/ref/mips/linux/simple-atomic/simerr rename : tests/quick/00.hello/ref/mips/linux/simple-atomic/simout => tests/quick/se/00.hello/ref/mips/linux/simple-atomic/simout rename : tests/quick/00.hello/ref/mips/linux/simple-atomic/stats.txt => tests/quick/se/00.hello/ref/mips/linux/simple-atomic/stats.txt rename : tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/config.ini => tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/config.ini rename : tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/simerr => tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/simerr rename : tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/simout => tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/simout rename : tests/quick/00.hello/ref/mips/linux/simple-timing-ruby/stats.txt => tests/quick/se/00.hello/ref/mips/linux/simple-timing-ruby/stats.txt rename : tests/quick/00.hello/ref/mips/linux/simple-timing/config.ini => tests/quick/se/00.hello/ref/mips/linux/simple-timing/config.ini rename : tests/quick/00.hello/ref/mips/linux/simple-timing/simerr => tests/quick/se/00.hello/ref/mips/linux/simple-timing/simerr rename : tests/quick/00.hello/ref/mips/linux/simple-timing/simout => tests/quick/se/00.hello/ref/mips/linux/simple-timing/simout rename : tests/quick/00.hello/ref/mips/linux/simple-timing/stats.txt => tests/quick/se/00.hello/ref/mips/linux/simple-timing/stats.txt rename : tests/quick/00.hello/ref/power/linux/o3-timing/config.ini => tests/quick/se/00.hello/ref/power/linux/o3-timing/config.ini rename : tests/quick/00.hello/ref/power/linux/o3-timing/simerr => tests/quick/se/00.hello/ref/power/linux/o3-timing/simerr rename : tests/quick/00.hello/ref/power/linux/o3-timing/simout => tests/quick/se/00.hello/ref/power/linux/o3-timing/simout rename : tests/quick/00.hello/ref/power/linux/o3-timing/stats.txt => tests/quick/se/00.hello/ref/power/linux/o3-timing/stats.txt rename : tests/quick/00.hello/ref/power/linux/simple-atomic/config.ini => tests/quick/se/00.hello/ref/power/linux/simple-atomic/config.ini rename : tests/quick/00.hello/ref/power/linux/simple-atomic/simerr => tests/quick/se/00.hello/ref/power/linux/simple-atomic/simerr rename : tests/quick/00.hello/ref/power/linux/simple-atomic/simout => tests/quick/se/00.hello/ref/power/linux/simple-atomic/simout rename : tests/quick/00.hello/ref/power/linux/simple-atomic/stats.txt => tests/quick/se/00.hello/ref/power/linux/simple-atomic/stats.txt rename : tests/quick/00.hello/ref/sparc/linux/inorder-timing/config.ini => tests/quick/se/00.hello/ref/sparc/linux/inorder-timing/config.ini rename : tests/quick/00.hello/ref/sparc/linux/inorder-timing/simerr => tests/quick/se/00.hello/ref/sparc/linux/inorder-timing/simerr rename : tests/quick/00.hello/ref/sparc/linux/inorder-timing/simout => tests/quick/se/00.hello/ref/sparc/linux/inorder-timing/simout rename : tests/quick/00.hello/ref/sparc/linux/inorder-timing/stats.txt => tests/quick/se/00.hello/ref/sparc/linux/inorder-timing/stats.txt rename : tests/quick/00.hello/ref/sparc/linux/simple-atomic/config.ini => tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/config.ini rename : tests/quick/00.hello/ref/sparc/linux/simple-atomic/simerr => tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/simerr rename : tests/quick/00.hello/ref/sparc/linux/simple-atomic/simout => tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/simout rename : tests/quick/00.hello/ref/sparc/linux/simple-atomic/stats.txt => tests/quick/se/00.hello/ref/sparc/linux/simple-atomic/stats.txt rename : tests/quick/00.hello/ref/sparc/linux/simple-timing-ruby/config.ini => tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/config.ini rename : tests/quick/00.hello/ref/sparc/linux/simple-timing-ruby/ruby.stats => tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/ruby.stats rename : tests/quick/00.hello/ref/sparc/linux/simple-timing-ruby/simerr => tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/simerr rename : tests/quick/00.hello/ref/sparc/linux/simple-timing-ruby/simout => tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/simout rename : tests/quick/00.hello/ref/sparc/linux/simple-timing-ruby/stats.txt => tests/quick/se/00.hello/ref/sparc/linux/simple-timing-ruby/stats.txt rename : tests/quick/00.hello/ref/sparc/linux/simple-timing/config.ini => tests/quick/se/00.hello/ref/sparc/linux/simple-timing/config.ini rename : tests/quick/00.hello/ref/sparc/linux/simple-timing/simerr => tests/quick/se/00.hello/ref/sparc/linux/simple-timing/simerr rename : tests/quick/00.hello/ref/sparc/linux/simple-timing/simout => tests/quick/se/00.hello/ref/sparc/linux/simple-timing/simout rename : tests/quick/00.hello/ref/sparc/linux/simple-timing/stats.txt => tests/quick/se/00.hello/ref/sparc/linux/simple-timing/stats.txt rename : tests/quick/00.hello/ref/x86/linux/o3-timing/config.ini => tests/quick/se/00.hello/ref/x86/linux/o3-timing/config.ini rename : tests/quick/00.hello/ref/x86/linux/o3-timing/simerr => tests/quick/se/00.hello/ref/x86/linux/o3-timing/simerr rename : tests/quick/00.hello/ref/x86/linux/o3-timing/simout => tests/quick/se/00.hello/ref/x86/linux/o3-timing/simout rename : tests/quick/00.hello/ref/x86/linux/o3-timing/stats.txt => tests/quick/se/00.hello/ref/x86/linux/o3-timing/stats.txt rename : tests/quick/00.hello/ref/x86/linux/simple-atomic/config.ini => tests/quick/se/00.hello/ref/x86/linux/simple-atomic/config.ini rename : tests/quick/00.hello/ref/x86/linux/simple-atomic/simerr => tests/quick/se/00.hello/ref/x86/linux/simple-atomic/simerr rename : tests/quick/00.hello/ref/x86/linux/simple-atomic/simout => tests/quick/se/00.hello/ref/x86/linux/simple-atomic/simout rename : tests/quick/00.hello/ref/x86/linux/simple-atomic/stats.txt => tests/quick/se/00.hello/ref/x86/linux/simple-atomic/stats.txt rename : tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/config.ini => tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/config.ini rename : tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats => tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/ruby.stats rename : tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/simerr => tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simerr rename : tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/simout => tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/simout rename : tests/quick/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt => tests/quick/se/00.hello/ref/x86/linux/simple-timing-ruby/stats.txt rename : tests/quick/00.hello/ref/x86/linux/simple-timing/config.ini => tests/quick/se/00.hello/ref/x86/linux/simple-timing/config.ini rename : tests/quick/00.hello/ref/x86/linux/simple-timing/simerr => tests/quick/se/00.hello/ref/x86/linux/simple-timing/simerr rename : tests/quick/00.hello/ref/x86/linux/simple-timing/simout => tests/quick/se/00.hello/ref/x86/linux/simple-timing/simout rename : tests/quick/00.hello/ref/x86/linux/simple-timing/stats.txt => tests/quick/se/00.hello/ref/x86/linux/simple-timing/stats.txt rename : tests/quick/00.hello/test.py => tests/quick/se/00.hello/test.py rename : tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini => tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini rename : tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/simerr => tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/simerr rename : tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/simout => tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/simout rename : tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stats.txt => tests/quick/se/01.hello-2T-smt/ref/alpha/linux/o3-timing/stats.txt rename : tests/quick/01.hello-2T-smt/test.py => tests/quick/se/01.hello-2T-smt/test.py rename : tests/quick/02.insttest/ref/sparc/linux/inorder-timing/config.ini => tests/quick/se/02.insttest/ref/sparc/linux/inorder-timing/config.ini rename : tests/quick/02.insttest/ref/sparc/linux/inorder-timing/simerr => tests/quick/se/02.insttest/ref/sparc/linux/inorder-timing/simerr rename : tests/quick/02.insttest/ref/sparc/linux/inorder-timing/simout => tests/quick/se/02.insttest/ref/sparc/linux/inorder-timing/simout rename : tests/quick/02.insttest/ref/sparc/linux/inorder-timing/stats.txt => tests/quick/se/02.insttest/ref/sparc/linux/inorder-timing/stats.txt rename : tests/quick/02.insttest/ref/sparc/linux/o3-timing/config.ini => tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/config.ini rename : tests/quick/02.insttest/ref/sparc/linux/o3-timing/simerr => tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simerr rename : tests/quick/02.insttest/ref/sparc/linux/o3-timing/simout => tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/simout rename : tests/quick/02.insttest/ref/sparc/linux/o3-timing/stats.txt => tests/quick/se/02.insttest/ref/sparc/linux/o3-timing/stats.txt rename : tests/quick/02.insttest/ref/sparc/linux/simple-atomic/config.ini => tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/config.ini rename : tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simerr => tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/simerr rename : tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simout => tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/simout rename : tests/quick/02.insttest/ref/sparc/linux/simple-atomic/stats.txt => tests/quick/se/02.insttest/ref/sparc/linux/simple-atomic/stats.txt rename : tests/quick/02.insttest/ref/sparc/linux/simple-timing/config.ini => tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/config.ini rename : tests/quick/02.insttest/ref/sparc/linux/simple-timing/simerr => tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/simerr rename : tests/quick/02.insttest/ref/sparc/linux/simple-timing/simout => tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/simout rename : tests/quick/02.insttest/ref/sparc/linux/simple-timing/stats.txt => tests/quick/se/02.insttest/ref/sparc/linux/simple-timing/stats.txt rename : tests/quick/02.insttest/test.py => tests/quick/se/02.insttest/test.py rename : tests/quick/20.eio-short/ref/alpha/eio/detailed/config.ini => tests/quick/se/20.eio-short/ref/alpha/eio/detailed/config.ini rename : tests/quick/20.eio-short/ref/alpha/eio/detailed/simerr => tests/quick/se/20.eio-short/ref/alpha/eio/detailed/simerr rename : tests/quick/20.eio-short/ref/alpha/eio/detailed/simout => tests/quick/se/20.eio-short/ref/alpha/eio/detailed/simout rename : tests/quick/20.eio-short/ref/alpha/eio/detailed/stats.txt => tests/quick/se/20.eio-short/ref/alpha/eio/detailed/stats.txt rename : tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/config.ini => tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/config.ini rename : tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/simerr => tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/simerr rename : tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/simout => tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/simout rename : tests/quick/20.eio-short/ref/alpha/eio/simple-atomic/stats.txt => tests/quick/se/20.eio-short/ref/alpha/eio/simple-atomic/stats.txt rename : tests/quick/20.eio-short/ref/alpha/eio/simple-timing/config.ini => tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/config.ini rename : tests/quick/20.eio-short/ref/alpha/eio/simple-timing/simerr => tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/simerr rename : tests/quick/20.eio-short/ref/alpha/eio/simple-timing/simout => tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/simout rename : tests/quick/20.eio-short/ref/alpha/eio/simple-timing/stats.txt => tests/quick/se/20.eio-short/ref/alpha/eio/simple-timing/stats.txt rename : tests/quick/20.eio-short/test.py => tests/quick/se/20.eio-short/test.py rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/config.ini => tests/quick/se/30.eio-mp/ref/alpha/eio/simple-atomic-mp/config.ini rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simerr => tests/quick/se/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simerr rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simout => tests/quick/se/30.eio-mp/ref/alpha/eio/simple-atomic-mp/simout rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stats.txt => tests/quick/se/30.eio-mp/ref/alpha/eio/simple-atomic-mp/stats.txt rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.ini => tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/config.ini rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simerr => tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/simerr rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/simout => tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/simout rename : tests/quick/30.eio-mp/ref/alpha/eio/simple-timing-mp/stats.txt => tests/quick/se/30.eio-mp/ref/alpha/eio/simple-timing-mp/stats.txt rename : tests/quick/30.eio-mp/test.py => tests/quick/se/30.eio-mp/test.py rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/config.ini => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/config.ini rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simerr => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simerr rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simout => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simout rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/stats.txt => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/stats.txt rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/config.ini => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/config.ini rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simerr => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simerr rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simout => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simout rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/stats.txt => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/stats.txt rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/config.ini => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/config.ini rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/ruby.stats => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/ruby.stats rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/simerr => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/simerr rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/simout => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/simout rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/skip => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/skip rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/stats.txt => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/stats.txt rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simerr => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simerr rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simout => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simout rename : tests/quick/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/stats.txt => tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/stats.txt rename : tests/quick/40.m5threads-test-atomic/test.py => tests/quick/se/40.m5threads-test-atomic/test.py rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/config.ini => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/config.ini rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/ruby.stats => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/ruby.stats rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simerr => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simerr rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simout => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simout rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/stats.txt => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/stats.txt rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/config.ini => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/config.ini rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/ruby.stats => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/ruby.stats rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/simerr => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/simerr rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/simout => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/simout rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/stats.txt => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_directory/stats.txt rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/config.ini => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/config.ini rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/ruby.stats => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/ruby.stats rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/simerr => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/simerr rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/simout => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/simout rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/stats.txt => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_CMP_token/stats.txt rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/config.ini => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/config.ini rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/ruby.stats => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/ruby.stats rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/simerr => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/simerr rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/simout => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/simout rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/stats.txt => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/stats.txt rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/config.ini => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/config.ini rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/ruby.stats => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/ruby.stats rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/simerr => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/simerr rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/simout => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/simout rename : tests/quick/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby/stats.txt rename : tests/quick/50.memtest/ref/alpha/linux/memtest/config.ini => tests/quick/se/50.memtest/ref/alpha/linux/memtest/config.ini rename : tests/quick/50.memtest/ref/alpha/linux/memtest/simerr => tests/quick/se/50.memtest/ref/alpha/linux/memtest/simerr rename : tests/quick/50.memtest/ref/alpha/linux/memtest/simout => tests/quick/se/50.memtest/ref/alpha/linux/memtest/simout rename : tests/quick/50.memtest/ref/alpha/linux/memtest/stats.txt => tests/quick/se/50.memtest/ref/alpha/linux/memtest/stats.txt rename : tests/quick/50.memtest/test.py => tests/quick/se/50.memtest/test.py rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/config.ini => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/config.ini rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/ruby.stats => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/ruby.stats rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simerr => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simerr rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simout => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simout rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/config.ini => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/config.ini rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/ruby.stats => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/ruby.stats rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simerr => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simerr rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simout => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/simout rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/stats.txt => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_directory/stats.txt rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/config.ini => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/config.ini rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/ruby.stats => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/ruby.stats rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/simerr => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/simerr rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/simout => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/simout rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/stats.txt => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_CMP_token/stats.txt rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/config.ini => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/config.ini rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/ruby.stats => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/ruby.stats rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simerr => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simerr rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simout => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/simout rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/stats.txt => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MOESI_hammer/stats.txt rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/config.ini => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/config.ini rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/ruby.stats => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/ruby.stats rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/simerr => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/simerr rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/simout => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/simout rename : tests/quick/60.rubytest/ref/alpha/linux/rubytest-ruby/stats.txt => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby/stats.txt rename : tests/quick/60.rubytest/test.py => tests/quick/se/60.rubytest/test.py
Diffstat (limited to 'tests/quick/fs/80.netperf-stream/ref')
-rw-r--r--tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini1483
-rw-r--r--tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/drivesys.terminal114
-rwxr-xr-xtests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/simerr6
-rwxr-xr-xtests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/simout14
-rw-r--r--tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt638
-rw-r--r--tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/testsys.terminal123
6 files changed, 2378 insertions, 0 deletions
diff --git a/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini b/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini
new file mode 100644
index 000000000..4bff39dc1
--- /dev/null
+++ b/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini
@@ -0,0 +1,1483 @@
+[drivesys]
+type=LinuxAlphaSystem
+children=bridge cpu disk0 disk2 intrctrl iobridge iobus membus physmem simple_disk terminal tsunami
+boot_cpu_frequency=1
+boot_osflags=root=/dev/hda1 console=ttyS0
+console=/dist/m5/system/binaries/console
+init_param=0
+kernel=/dist/m5/system/binaries/vmlinux
+load_addr_mask=1099511627775
+mem_mode=atomic
+memories=drivesys.physmem
+num_work_ids=16
+pal=/dist/m5/system/binaries/ts_osfpal
+physmem=drivesys.physmem
+readfile=/tmp/gem5.ali/configs/boot/netperf-server.rcS
+symbolfile=
+system_rev=1024
+system_type=34
+work_begin_ckpt_count=0
+work_begin_cpu_id_exit=-1
+work_begin_exit_count=0
+work_cpus_ckpt_count=0
+work_end_ckpt_count=0
+work_end_exit_count=0
+work_item_id=-1
+system_port=drivesys.membus.port[2]
+
+[drivesys.bridge]
+type=Bridge
+delay=50000
+nack_delay=4000
+ranges=8796093022208:18446744073709551615
+req_size=16
+resp_size=16
+write_ack=false
+master=drivesys.iobus.port[0]
+slave=drivesys.membus.port[0]
+
+[drivesys.cpu]
+type=AtomicSimpleCPU
+children=dtb interrupts itb tracer
+checker=Null
+clock=1
+cpu_id=0
+defer_registration=false
+do_checkpoint_insts=true
+do_quiesce=true
+do_statistics_insts=true
+dtb=drivesys.cpu.dtb
+function_trace=false
+function_trace_start=0
+interrupts=drivesys.cpu.interrupts
+itb=drivesys.cpu.itb
+max_insts_all_threads=0
+max_insts_any_thread=0
+max_loads_all_threads=0
+max_loads_any_thread=0
+numThreads=1
+phase=0
+profile=0
+progress_interval=0
+simulate_data_stalls=false
+simulate_inst_stalls=false
+system=drivesys
+tracer=drivesys.cpu.tracer
+width=1
+dcache_port=drivesys.membus.port[4]
+icache_port=drivesys.membus.port[3]
+
+[drivesys.cpu.dtb]
+type=AlphaTLB
+size=64
+
+[drivesys.cpu.interrupts]
+type=AlphaInterrupts
+
+[drivesys.cpu.itb]
+type=AlphaTLB
+size=48
+
+[drivesys.cpu.tracer]
+type=ExeTracer
+
+[drivesys.disk0]
+type=IdeDisk
+children=image
+delay=1000000
+driveID=master
+image=drivesys.disk0.image
+
+[drivesys.disk0.image]
+type=CowDiskImage
+children=child
+child=drivesys.disk0.image.child
+image_file=
+read_only=false
+table_size=65536
+
+[drivesys.disk0.image.child]
+type=RawDiskImage
+image_file=/dist/m5/system/disks/linux-latest.img
+read_only=true
+
+[drivesys.disk2]
+type=IdeDisk
+children=image
+delay=1000000
+driveID=master
+image=drivesys.disk2.image
+
+[drivesys.disk2.image]
+type=CowDiskImage
+children=child
+child=drivesys.disk2.image.child
+image_file=
+read_only=false
+table_size=65536
+
+[drivesys.disk2.image.child]
+type=RawDiskImage
+image_file=/dist/m5/system/disks/linux-bigswap2.img
+read_only=true
+
+[drivesys.intrctrl]
+type=IntrControl
+sys=drivesys
+
+[drivesys.iobridge]
+type=Bridge
+delay=50000
+nack_delay=4000
+ranges=0:8589934592
+req_size=16
+resp_size=16
+write_ack=false
+master=drivesys.membus.port[5]
+slave=drivesys.iobus.port[32]
+
+[drivesys.iobus]
+type=Bus
+block_size=64
+bus_id=0
+clock=1000
+header_cycles=1
+use_default_range=true
+width=64
+default=drivesys.tsunami.pciconfig.pio
+port=drivesys.bridge.master drivesys.tsunami.cchip.pio drivesys.tsunami.pchip.pio drivesys.tsunami.fake_sm_chip.pio drivesys.tsunami.fake_uart1.pio drivesys.tsunami.fake_uart2.pio drivesys.tsunami.fake_uart3.pio drivesys.tsunami.fake_uart4.pio drivesys.tsunami.fake_ppc.pio drivesys.tsunami.fake_OROM.pio drivesys.tsunami.fake_pnp_addr.pio drivesys.tsunami.fake_pnp_write.pio drivesys.tsunami.fake_pnp_read0.pio drivesys.tsunami.fake_pnp_read1.pio drivesys.tsunami.fake_pnp_read2.pio drivesys.tsunami.fake_pnp_read3.pio drivesys.tsunami.fake_pnp_read4.pio drivesys.tsunami.fake_pnp_read5.pio drivesys.tsunami.fake_pnp_read6.pio drivesys.tsunami.fake_pnp_read7.pio drivesys.tsunami.fake_ata0.pio drivesys.tsunami.fake_ata1.pio drivesys.tsunami.fb.pio drivesys.tsunami.io.pio drivesys.tsunami.uart.pio drivesys.tsunami.backdoor.pio drivesys.tsunami.ide.pio drivesys.tsunami.ide.config drivesys.tsunami.ide.dma drivesys.tsunami.ethernet.pio drivesys.tsunami.ethernet.config drivesys.tsunami.ethernet.dma drivesys.iobridge.slave
+
+[drivesys.membus]
+type=Bus
+children=badaddr_responder
+block_size=64
+bus_id=1
+clock=1000
+header_cycles=1
+use_default_range=false
+width=64
+default=drivesys.membus.badaddr_responder.pio
+port=drivesys.bridge.slave drivesys.physmem.port[0] drivesys.system_port drivesys.cpu.icache_port drivesys.cpu.dcache_port drivesys.iobridge.master
+
+[drivesys.membus.badaddr_responder]
+type=IsaFake
+fake_mem=false
+pio_addr=0
+pio_latency=1000
+pio_size=8
+platform=drivesys.tsunami
+ret_bad_addr=true
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=drivesys
+update_data=false
+warn_access=
+pio=drivesys.membus.default
+
+[drivesys.physmem]
+type=PhysicalMemory
+file=
+latency=30000
+latency_var=0
+null=false
+range=0:134217727
+zero=false
+port=drivesys.membus.port[1]
+
+[drivesys.simple_disk]
+type=SimpleDisk
+children=disk
+disk=drivesys.simple_disk.disk
+system=drivesys
+
+[drivesys.simple_disk.disk]
+type=RawDiskImage
+image_file=/dist/m5/system/disks/linux-latest.img
+read_only=true
+
+[drivesys.terminal]
+type=Terminal
+intr_control=drivesys.intrctrl
+number=0
+output=true
+port=3456
+
+[drivesys.tsunami]
+type=Tsunami
+children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
+intrctrl=drivesys.intrctrl
+system=drivesys
+
+[drivesys.tsunami.backdoor]
+type=AlphaBackdoor
+cpu=drivesys.cpu
+disk=drivesys.simple_disk
+pio_addr=8804682956800
+pio_latency=1000
+platform=drivesys.tsunami
+system=drivesys
+terminal=drivesys.terminal
+pio=drivesys.iobus.port[25]
+
+[drivesys.tsunami.cchip]
+type=TsunamiCChip
+pio_addr=8803072344064
+pio_latency=1000
+platform=drivesys.tsunami
+system=drivesys
+tsunami=drivesys.tsunami
+pio=drivesys.iobus.port[1]
+
+[drivesys.tsunami.ethernet]
+type=NSGigE
+BAR0=1
+BAR0LegacyIO=false
+BAR0Size=256
+BAR1=0
+BAR1LegacyIO=false
+BAR1Size=4096
+BAR2=0
+BAR2LegacyIO=false
+BAR2Size=0
+BAR3=0
+BAR3LegacyIO=false
+BAR3Size=0
+BAR4=0
+BAR4LegacyIO=false
+BAR4Size=0
+BAR5=0
+BAR5LegacyIO=false
+BAR5Size=0
+BIST=0
+CacheLineSize=0
+CardbusCIS=0
+ClassCode=2
+Command=0
+DeviceID=34
+ExpansionROM=0
+HeaderType=0
+InterruptLine=30
+InterruptPin=1
+LatencyTimer=0
+MaximumLatency=52
+MinimumGrant=176
+ProgIF=0
+Revision=0
+Status=656
+SubClassCode=0
+SubsystemID=0
+SubsystemVendorID=0
+VendorID=4107
+clock=0
+config_latency=20000
+dma_data_free=false
+dma_desc_free=false
+dma_no_allocate=true
+dma_read_delay=0
+dma_read_factor=0
+dma_write_delay=0
+dma_write_factor=0
+hardware_address=00:90:00:00:00:02
+intr_delay=10000000
+max_backoff_delay=10000000
+min_backoff_delay=4000
+pci_bus=0
+pci_dev=1
+pci_func=0
+pio_latency=1000
+platform=drivesys.tsunami
+rss=false
+rx_delay=1000000
+rx_fifo_size=524288
+rx_filter=true
+rx_thread=false
+system=drivesys
+tx_delay=1000000
+tx_fifo_size=524288
+tx_thread=false
+config=drivesys.iobus.port[30]
+dma=drivesys.iobus.port[31]
+interface=etherlink.int1
+pio=drivesys.iobus.port[29]
+
+[drivesys.tsunami.fake_OROM]
+type=IsaFake
+fake_mem=false
+pio_addr=8796093677568
+pio_latency=1000
+pio_size=393216
+platform=drivesys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=drivesys
+update_data=false
+warn_access=
+pio=drivesys.iobus.port[9]
+
+[drivesys.tsunami.fake_ata0]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848432
+pio_latency=1000
+pio_size=8
+platform=drivesys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=drivesys
+update_data=false
+warn_access=
+pio=drivesys.iobus.port[20]
+
+[drivesys.tsunami.fake_ata1]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848304
+pio_latency=1000
+pio_size=8
+platform=drivesys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=drivesys
+update_data=false
+warn_access=
+pio=drivesys.iobus.port[21]
+
+[drivesys.tsunami.fake_pnp_addr]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848569
+pio_latency=1000
+pio_size=8
+platform=drivesys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=drivesys
+update_data=false
+warn_access=
+pio=drivesys.iobus.port[10]
+
+[drivesys.tsunami.fake_pnp_read0]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848451
+pio_latency=1000
+pio_size=8
+platform=drivesys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=drivesys
+update_data=false
+warn_access=
+pio=drivesys.iobus.port[12]
+
+[drivesys.tsunami.fake_pnp_read1]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848515
+pio_latency=1000
+pio_size=8
+platform=drivesys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=drivesys
+update_data=false
+warn_access=
+pio=drivesys.iobus.port[13]
+
+[drivesys.tsunami.fake_pnp_read2]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848579
+pio_latency=1000
+pio_size=8
+platform=drivesys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=drivesys
+update_data=false
+warn_access=
+pio=drivesys.iobus.port[14]
+
+[drivesys.tsunami.fake_pnp_read3]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848643
+pio_latency=1000
+pio_size=8
+platform=drivesys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=drivesys
+update_data=false
+warn_access=
+pio=drivesys.iobus.port[15]
+
+[drivesys.tsunami.fake_pnp_read4]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848707
+pio_latency=1000
+pio_size=8
+platform=drivesys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=drivesys
+update_data=false
+warn_access=
+pio=drivesys.iobus.port[16]
+
+[drivesys.tsunami.fake_pnp_read5]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848771
+pio_latency=1000
+pio_size=8
+platform=drivesys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=drivesys
+update_data=false
+warn_access=
+pio=drivesys.iobus.port[17]
+
+[drivesys.tsunami.fake_pnp_read6]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848835
+pio_latency=1000
+pio_size=8
+platform=drivesys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=drivesys
+update_data=false
+warn_access=
+pio=drivesys.iobus.port[18]
+
+[drivesys.tsunami.fake_pnp_read7]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848899
+pio_latency=1000
+pio_size=8
+platform=drivesys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=drivesys
+update_data=false
+warn_access=
+pio=drivesys.iobus.port[19]
+
+[drivesys.tsunami.fake_pnp_write]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615850617
+pio_latency=1000
+pio_size=8
+platform=drivesys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=drivesys
+update_data=false
+warn_access=
+pio=drivesys.iobus.port[11]
+
+[drivesys.tsunami.fake_ppc]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848891
+pio_latency=1000
+pio_size=8
+platform=drivesys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=drivesys
+update_data=false
+warn_access=
+pio=drivesys.iobus.port[8]
+
+[drivesys.tsunami.fake_sm_chip]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848816
+pio_latency=1000
+pio_size=8
+platform=drivesys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=drivesys
+update_data=false
+warn_access=
+pio=drivesys.iobus.port[3]
+
+[drivesys.tsunami.fake_uart1]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848696
+pio_latency=1000
+pio_size=8
+platform=drivesys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=drivesys
+update_data=false
+warn_access=
+pio=drivesys.iobus.port[4]
+
+[drivesys.tsunami.fake_uart2]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848936
+pio_latency=1000
+pio_size=8
+platform=drivesys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=drivesys
+update_data=false
+warn_access=
+pio=drivesys.iobus.port[5]
+
+[drivesys.tsunami.fake_uart3]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848680
+pio_latency=1000
+pio_size=8
+platform=drivesys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=drivesys
+update_data=false
+warn_access=
+pio=drivesys.iobus.port[6]
+
+[drivesys.tsunami.fake_uart4]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848944
+pio_latency=1000
+pio_size=8
+platform=drivesys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=drivesys
+update_data=false
+warn_access=
+pio=drivesys.iobus.port[7]
+
+[drivesys.tsunami.fb]
+type=BadDevice
+devicename=FrameBuffer
+pio_addr=8804615848912
+pio_latency=1000
+platform=drivesys.tsunami
+system=drivesys
+pio=drivesys.iobus.port[22]
+
+[drivesys.tsunami.ide]
+type=IdeController
+BAR0=1
+BAR0LegacyIO=false
+BAR0Size=8
+BAR1=1
+BAR1LegacyIO=false
+BAR1Size=4
+BAR2=1
+BAR2LegacyIO=false
+BAR2Size=8
+BAR3=1
+BAR3LegacyIO=false
+BAR3Size=4
+BAR4=1
+BAR4LegacyIO=false
+BAR4Size=16
+BAR5=1
+BAR5LegacyIO=false
+BAR5Size=0
+BIST=0
+CacheLineSize=0
+CardbusCIS=0
+ClassCode=1
+Command=0
+DeviceID=28945
+ExpansionROM=0
+HeaderType=0
+InterruptLine=31
+InterruptPin=1
+LatencyTimer=0
+MaximumLatency=0
+MinimumGrant=0
+ProgIF=133
+Revision=0
+Status=640
+SubClassCode=1
+SubsystemID=0
+SubsystemVendorID=0
+VendorID=32902
+config_latency=20000
+ctrl_offset=0
+disks=drivesys.disk0 drivesys.disk2
+io_shift=0
+max_backoff_delay=10000000
+min_backoff_delay=4000
+pci_bus=0
+pci_dev=0
+pci_func=0
+pio_latency=1000
+platform=drivesys.tsunami
+system=drivesys
+config=drivesys.iobus.port[27]
+dma=drivesys.iobus.port[28]
+pio=drivesys.iobus.port[26]
+
+[drivesys.tsunami.io]
+type=TsunamiIO
+frequency=976562500
+pio_addr=8804615847936
+pio_latency=1000
+platform=drivesys.tsunami
+system=drivesys
+time=Thu Jan 1 00:00:00 2009
+tsunami=drivesys.tsunami
+year_is_bcd=false
+pio=drivesys.iobus.port[23]
+
+[drivesys.tsunami.pchip]
+type=TsunamiPChip
+pio_addr=8802535473152
+pio_latency=1000
+platform=drivesys.tsunami
+system=drivesys
+tsunami=drivesys.tsunami
+pio=drivesys.iobus.port[2]
+
+[drivesys.tsunami.pciconfig]
+type=PciConfigAll
+bus=0
+pio_latency=1
+platform=drivesys.tsunami
+size=16777216
+system=drivesys
+pio=drivesys.iobus.default
+
+[drivesys.tsunami.uart]
+type=Uart8250
+pio_addr=8804615848952
+pio_latency=1000
+platform=drivesys.tsunami
+system=drivesys
+terminal=drivesys.terminal
+pio=drivesys.iobus.port[24]
+
+[etherdump]
+type=EtherDump
+file=ethertrace
+maxlen=96
+
+[etherlink]
+type=EtherLink
+delay=0
+delay_var=0
+dump=etherdump
+speed=8000.000000
+int0=testsys.tsunami.ethernet.interface
+int1=drivesys.tsunami.ethernet.interface
+
+[root]
+type=Root
+children=drivesys etherdump etherlink testsys
+time_sync_enable=false
+time_sync_period=100000000000
+time_sync_spin_threshold=100000000
+
+[testsys]
+type=LinuxAlphaSystem
+children=bridge cpu disk0 disk2 intrctrl iobridge iobus membus physmem simple_disk terminal tsunami
+boot_cpu_frequency=1
+boot_osflags=root=/dev/hda1 console=ttyS0
+console=/dist/m5/system/binaries/console
+init_param=0
+kernel=/dist/m5/system/binaries/vmlinux
+load_addr_mask=1099511627775
+mem_mode=atomic
+memories=testsys.physmem
+num_work_ids=16
+pal=/dist/m5/system/binaries/ts_osfpal
+physmem=testsys.physmem
+readfile=/tmp/gem5.ali/configs/boot/netperf-stream-client.rcS
+symbolfile=
+system_rev=1024
+system_type=34
+work_begin_ckpt_count=0
+work_begin_cpu_id_exit=-1
+work_begin_exit_count=0
+work_cpus_ckpt_count=0
+work_end_ckpt_count=0
+work_end_exit_count=0
+work_item_id=-1
+system_port=testsys.membus.port[2]
+
+[testsys.bridge]
+type=Bridge
+delay=50000
+nack_delay=4000
+ranges=8796093022208:18446744073709551615
+req_size=16
+resp_size=16
+write_ack=false
+master=testsys.iobus.port[0]
+slave=testsys.membus.port[0]
+
+[testsys.cpu]
+type=AtomicSimpleCPU
+children=dtb interrupts itb tracer
+checker=Null
+clock=1
+cpu_id=0
+defer_registration=false
+do_checkpoint_insts=true
+do_quiesce=true
+do_statistics_insts=true
+dtb=testsys.cpu.dtb
+function_trace=false
+function_trace_start=0
+interrupts=testsys.cpu.interrupts
+itb=testsys.cpu.itb
+max_insts_all_threads=0
+max_insts_any_thread=0
+max_loads_all_threads=0
+max_loads_any_thread=0
+numThreads=1
+phase=0
+profile=0
+progress_interval=0
+simulate_data_stalls=false
+simulate_inst_stalls=false
+system=testsys
+tracer=testsys.cpu.tracer
+width=1
+dcache_port=testsys.membus.port[4]
+icache_port=testsys.membus.port[3]
+
+[testsys.cpu.dtb]
+type=AlphaTLB
+size=64
+
+[testsys.cpu.interrupts]
+type=AlphaInterrupts
+
+[testsys.cpu.itb]
+type=AlphaTLB
+size=48
+
+[testsys.cpu.tracer]
+type=ExeTracer
+
+[testsys.disk0]
+type=IdeDisk
+children=image
+delay=1000000
+driveID=master
+image=testsys.disk0.image
+
+[testsys.disk0.image]
+type=CowDiskImage
+children=child
+child=testsys.disk0.image.child
+image_file=
+read_only=false
+table_size=65536
+
+[testsys.disk0.image.child]
+type=RawDiskImage
+image_file=/dist/m5/system/disks/linux-latest.img
+read_only=true
+
+[testsys.disk2]
+type=IdeDisk
+children=image
+delay=1000000
+driveID=master
+image=testsys.disk2.image
+
+[testsys.disk2.image]
+type=CowDiskImage
+children=child
+child=testsys.disk2.image.child
+image_file=
+read_only=false
+table_size=65536
+
+[testsys.disk2.image.child]
+type=RawDiskImage
+image_file=/dist/m5/system/disks/linux-bigswap2.img
+read_only=true
+
+[testsys.intrctrl]
+type=IntrControl
+sys=testsys
+
+[testsys.iobridge]
+type=Bridge
+delay=50000
+nack_delay=4000
+ranges=0:8589934592
+req_size=16
+resp_size=16
+write_ack=false
+master=testsys.membus.port[5]
+slave=testsys.iobus.port[32]
+
+[testsys.iobus]
+type=Bus
+block_size=64
+bus_id=0
+clock=1000
+header_cycles=1
+use_default_range=true
+width=64
+default=testsys.tsunami.pciconfig.pio
+port=testsys.bridge.master testsys.tsunami.cchip.pio testsys.tsunami.pchip.pio testsys.tsunami.fake_sm_chip.pio testsys.tsunami.fake_uart1.pio testsys.tsunami.fake_uart2.pio testsys.tsunami.fake_uart3.pio testsys.tsunami.fake_uart4.pio testsys.tsunami.fake_ppc.pio testsys.tsunami.fake_OROM.pio testsys.tsunami.fake_pnp_addr.pio testsys.tsunami.fake_pnp_write.pio testsys.tsunami.fake_pnp_read0.pio testsys.tsunami.fake_pnp_read1.pio testsys.tsunami.fake_pnp_read2.pio testsys.tsunami.fake_pnp_read3.pio testsys.tsunami.fake_pnp_read4.pio testsys.tsunami.fake_pnp_read5.pio testsys.tsunami.fake_pnp_read6.pio testsys.tsunami.fake_pnp_read7.pio testsys.tsunami.fake_ata0.pio testsys.tsunami.fake_ata1.pio testsys.tsunami.fb.pio testsys.tsunami.io.pio testsys.tsunami.uart.pio testsys.tsunami.backdoor.pio testsys.tsunami.ide.pio testsys.tsunami.ide.config testsys.tsunami.ide.dma testsys.tsunami.ethernet.pio testsys.tsunami.ethernet.config testsys.tsunami.ethernet.dma testsys.iobridge.slave
+
+[testsys.membus]
+type=Bus
+children=badaddr_responder
+block_size=64
+bus_id=1
+clock=1000
+header_cycles=1
+use_default_range=false
+width=64
+default=testsys.membus.badaddr_responder.pio
+port=testsys.bridge.slave testsys.physmem.port[0] testsys.system_port testsys.cpu.icache_port testsys.cpu.dcache_port testsys.iobridge.master
+
+[testsys.membus.badaddr_responder]
+type=IsaFake
+fake_mem=false
+pio_addr=0
+pio_latency=1000
+pio_size=8
+platform=testsys.tsunami
+ret_bad_addr=true
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=testsys
+update_data=false
+warn_access=
+pio=testsys.membus.default
+
+[testsys.physmem]
+type=PhysicalMemory
+file=
+latency=30000
+latency_var=0
+null=false
+range=0:134217727
+zero=false
+port=testsys.membus.port[1]
+
+[testsys.simple_disk]
+type=SimpleDisk
+children=disk
+disk=testsys.simple_disk.disk
+system=testsys
+
+[testsys.simple_disk.disk]
+type=RawDiskImage
+image_file=/dist/m5/system/disks/linux-latest.img
+read_only=true
+
+[testsys.terminal]
+type=Terminal
+intr_control=testsys.intrctrl
+number=0
+output=true
+port=3456
+
+[testsys.tsunami]
+type=Tsunami
+children=backdoor cchip ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
+intrctrl=testsys.intrctrl
+system=testsys
+
+[testsys.tsunami.backdoor]
+type=AlphaBackdoor
+cpu=testsys.cpu
+disk=testsys.simple_disk
+pio_addr=8804682956800
+pio_latency=1000
+platform=testsys.tsunami
+system=testsys
+terminal=testsys.terminal
+pio=testsys.iobus.port[25]
+
+[testsys.tsunami.cchip]
+type=TsunamiCChip
+pio_addr=8803072344064
+pio_latency=1000
+platform=testsys.tsunami
+system=testsys
+tsunami=testsys.tsunami
+pio=testsys.iobus.port[1]
+
+[testsys.tsunami.ethernet]
+type=NSGigE
+BAR0=1
+BAR0LegacyIO=false
+BAR0Size=256
+BAR1=0
+BAR1LegacyIO=false
+BAR1Size=4096
+BAR2=0
+BAR2LegacyIO=false
+BAR2Size=0
+BAR3=0
+BAR3LegacyIO=false
+BAR3Size=0
+BAR4=0
+BAR4LegacyIO=false
+BAR4Size=0
+BAR5=0
+BAR5LegacyIO=false
+BAR5Size=0
+BIST=0
+CacheLineSize=0
+CardbusCIS=0
+ClassCode=2
+Command=0
+DeviceID=34
+ExpansionROM=0
+HeaderType=0
+InterruptLine=30
+InterruptPin=1
+LatencyTimer=0
+MaximumLatency=52
+MinimumGrant=176
+ProgIF=0
+Revision=0
+Status=656
+SubClassCode=0
+SubsystemID=0
+SubsystemVendorID=0
+VendorID=4107
+clock=0
+config_latency=20000
+dma_data_free=false
+dma_desc_free=false
+dma_no_allocate=true
+dma_read_delay=0
+dma_read_factor=0
+dma_write_delay=0
+dma_write_factor=0
+hardware_address=00:90:00:00:00:01
+intr_delay=10000000
+max_backoff_delay=10000000
+min_backoff_delay=4000
+pci_bus=0
+pci_dev=1
+pci_func=0
+pio_latency=1000
+platform=testsys.tsunami
+rss=false
+rx_delay=1000000
+rx_fifo_size=524288
+rx_filter=true
+rx_thread=false
+system=testsys
+tx_delay=1000000
+tx_fifo_size=524288
+tx_thread=false
+config=testsys.iobus.port[30]
+dma=testsys.iobus.port[31]
+interface=etherlink.int0
+pio=testsys.iobus.port[29]
+
+[testsys.tsunami.fake_OROM]
+type=IsaFake
+fake_mem=false
+pio_addr=8796093677568
+pio_latency=1000
+pio_size=393216
+platform=testsys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=testsys
+update_data=false
+warn_access=
+pio=testsys.iobus.port[9]
+
+[testsys.tsunami.fake_ata0]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848432
+pio_latency=1000
+pio_size=8
+platform=testsys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=testsys
+update_data=false
+warn_access=
+pio=testsys.iobus.port[20]
+
+[testsys.tsunami.fake_ata1]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848304
+pio_latency=1000
+pio_size=8
+platform=testsys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=testsys
+update_data=false
+warn_access=
+pio=testsys.iobus.port[21]
+
+[testsys.tsunami.fake_pnp_addr]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848569
+pio_latency=1000
+pio_size=8
+platform=testsys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=testsys
+update_data=false
+warn_access=
+pio=testsys.iobus.port[10]
+
+[testsys.tsunami.fake_pnp_read0]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848451
+pio_latency=1000
+pio_size=8
+platform=testsys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=testsys
+update_data=false
+warn_access=
+pio=testsys.iobus.port[12]
+
+[testsys.tsunami.fake_pnp_read1]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848515
+pio_latency=1000
+pio_size=8
+platform=testsys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=testsys
+update_data=false
+warn_access=
+pio=testsys.iobus.port[13]
+
+[testsys.tsunami.fake_pnp_read2]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848579
+pio_latency=1000
+pio_size=8
+platform=testsys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=testsys
+update_data=false
+warn_access=
+pio=testsys.iobus.port[14]
+
+[testsys.tsunami.fake_pnp_read3]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848643
+pio_latency=1000
+pio_size=8
+platform=testsys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=testsys
+update_data=false
+warn_access=
+pio=testsys.iobus.port[15]
+
+[testsys.tsunami.fake_pnp_read4]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848707
+pio_latency=1000
+pio_size=8
+platform=testsys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=testsys
+update_data=false
+warn_access=
+pio=testsys.iobus.port[16]
+
+[testsys.tsunami.fake_pnp_read5]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848771
+pio_latency=1000
+pio_size=8
+platform=testsys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=testsys
+update_data=false
+warn_access=
+pio=testsys.iobus.port[17]
+
+[testsys.tsunami.fake_pnp_read6]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848835
+pio_latency=1000
+pio_size=8
+platform=testsys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=testsys
+update_data=false
+warn_access=
+pio=testsys.iobus.port[18]
+
+[testsys.tsunami.fake_pnp_read7]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848899
+pio_latency=1000
+pio_size=8
+platform=testsys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=testsys
+update_data=false
+warn_access=
+pio=testsys.iobus.port[19]
+
+[testsys.tsunami.fake_pnp_write]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615850617
+pio_latency=1000
+pio_size=8
+platform=testsys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=testsys
+update_data=false
+warn_access=
+pio=testsys.iobus.port[11]
+
+[testsys.tsunami.fake_ppc]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848891
+pio_latency=1000
+pio_size=8
+platform=testsys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=testsys
+update_data=false
+warn_access=
+pio=testsys.iobus.port[8]
+
+[testsys.tsunami.fake_sm_chip]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848816
+pio_latency=1000
+pio_size=8
+platform=testsys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=testsys
+update_data=false
+warn_access=
+pio=testsys.iobus.port[3]
+
+[testsys.tsunami.fake_uart1]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848696
+pio_latency=1000
+pio_size=8
+platform=testsys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=testsys
+update_data=false
+warn_access=
+pio=testsys.iobus.port[4]
+
+[testsys.tsunami.fake_uart2]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848936
+pio_latency=1000
+pio_size=8
+platform=testsys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=testsys
+update_data=false
+warn_access=
+pio=testsys.iobus.port[5]
+
+[testsys.tsunami.fake_uart3]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848680
+pio_latency=1000
+pio_size=8
+platform=testsys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=testsys
+update_data=false
+warn_access=
+pio=testsys.iobus.port[6]
+
+[testsys.tsunami.fake_uart4]
+type=IsaFake
+fake_mem=false
+pio_addr=8804615848944
+pio_latency=1000
+pio_size=8
+platform=testsys.tsunami
+ret_bad_addr=false
+ret_data16=65535
+ret_data32=4294967295
+ret_data64=18446744073709551615
+ret_data8=255
+system=testsys
+update_data=false
+warn_access=
+pio=testsys.iobus.port[7]
+
+[testsys.tsunami.fb]
+type=BadDevice
+devicename=FrameBuffer
+pio_addr=8804615848912
+pio_latency=1000
+platform=testsys.tsunami
+system=testsys
+pio=testsys.iobus.port[22]
+
+[testsys.tsunami.ide]
+type=IdeController
+BAR0=1
+BAR0LegacyIO=false
+BAR0Size=8
+BAR1=1
+BAR1LegacyIO=false
+BAR1Size=4
+BAR2=1
+BAR2LegacyIO=false
+BAR2Size=8
+BAR3=1
+BAR3LegacyIO=false
+BAR3Size=4
+BAR4=1
+BAR4LegacyIO=false
+BAR4Size=16
+BAR5=1
+BAR5LegacyIO=false
+BAR5Size=0
+BIST=0
+CacheLineSize=0
+CardbusCIS=0
+ClassCode=1
+Command=0
+DeviceID=28945
+ExpansionROM=0
+HeaderType=0
+InterruptLine=31
+InterruptPin=1
+LatencyTimer=0
+MaximumLatency=0
+MinimumGrant=0
+ProgIF=133
+Revision=0
+Status=640
+SubClassCode=1
+SubsystemID=0
+SubsystemVendorID=0
+VendorID=32902
+config_latency=20000
+ctrl_offset=0
+disks=testsys.disk0 testsys.disk2
+io_shift=0
+max_backoff_delay=10000000
+min_backoff_delay=4000
+pci_bus=0
+pci_dev=0
+pci_func=0
+pio_latency=1000
+platform=testsys.tsunami
+system=testsys
+config=testsys.iobus.port[27]
+dma=testsys.iobus.port[28]
+pio=testsys.iobus.port[26]
+
+[testsys.tsunami.io]
+type=TsunamiIO
+frequency=976562500
+pio_addr=8804615847936
+pio_latency=1000
+platform=testsys.tsunami
+system=testsys
+time=Thu Jan 1 00:00:00 2009
+tsunami=testsys.tsunami
+year_is_bcd=false
+pio=testsys.iobus.port[23]
+
+[testsys.tsunami.pchip]
+type=TsunamiPChip
+pio_addr=8802535473152
+pio_latency=1000
+platform=testsys.tsunami
+system=testsys
+tsunami=testsys.tsunami
+pio=testsys.iobus.port[2]
+
+[testsys.tsunami.pciconfig]
+type=PciConfigAll
+bus=0
+pio_latency=1
+platform=testsys.tsunami
+size=16777216
+system=testsys
+pio=testsys.iobus.default
+
+[testsys.tsunami.uart]
+type=Uart8250
+pio_addr=8804615848952
+pio_latency=1000
+platform=testsys.tsunami
+system=testsys
+terminal=testsys.terminal
+pio=testsys.iobus.port[24]
+
diff --git a/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/drivesys.terminal b/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/drivesys.terminal
new file mode 100644
index 000000000..d501adb38
--- /dev/null
+++ b/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/drivesys.terminal
@@ -0,0 +1,114 @@
+M5 console: m5AlphaAccess @ 0xFFFFFD0200000000
+ Got Configuration 623
+ memsize 8000000 pages 4000
+ First free page after ROM 0xFFFFFC0000018000
+ HWRPB 0xFFFFFC0000018000 l1pt 0xFFFFFC0000040000 l2pt 0xFFFFFC0000042000 l3pt_rpb 0xFFFFFC0000044000 l3pt_kernel 0xFFFFFC0000048000 l2reserv 0xFFFFFC0000046000
+ kstart = 0xFFFFFC0000310000, kend = 0xFFFFFC0000855898, kentry = 0xFFFFFC0000310000, numCPUs = 0x1
+ CPU Clock at 1000000 MHz IntrClockFrequency=1024
+ Booting with 1 processor(s)
+ KSP: 0x20043FE8 PTBR 0x20
+ Console Callback at 0x0, fixup at 0x0, crb offset: 0x510
+ Memory cluster 0 [0 - 392]
+ Memory cluster 1 [392 - 15992]
+ Initalizing mdt_bitmap addr 0xFFFFFC0000038000 mem_pages 4000
+ ConsoleDispatch at virt 10000658 phys 18658 val FFFFFC00000100A8
+ unix_boot_mem ends at FFFFFC0000076000
+ k_argc = 0
+ jumping to kernel at 0xFFFFFC0000310000, (PCBB 0xFFFFFC0000018180 pfn 1067)
+ CallbackFixup 0 18000, t7=FFFFFC000070C000
+ Linux version 2.6.13 (hsul@zed.eecs.umich.edu) (gcc version 3.4.3) #1 SMP Sun Oct 8 19:52:07 EDT 2006
+ Booting GENERIC on Tsunami variation DP264 using machine vector DP264 from SRM
+ Major Options: SMP LEGACY_START VERBOSE_MCHECK
+ Command line: root=/dev/hda1 console=ttyS0
+ memcluster 0, usage 1, start 0, end 392
+ memcluster 1, usage 0, start 392, end 16384
+ freeing pages 1069:16384
+ reserving pages 1069:1070
+ SMP: 1 CPUs probed -- cpu_present_mask = 1
+ Built 1 zonelists
+ Kernel command line: root=/dev/hda1 console=ttyS0
+ PID hash table entries: 1024 (order: 10, 32768 bytes)
+ Using epoch = 1900
+ Console: colour dummy device 80x25
+ Dentry cache hash table entries: 32768 (order: 5, 262144 bytes)
+ Inode-cache hash table entries: 16384 (order: 4, 131072 bytes)
+ Memory: 118784k/131072k available (3314k kernel code, 8952k reserved, 983k data, 224k init)
+ Mount-cache hash table entries: 512
+ SMP mode deactivated.
+ Brought up 1 CPUs
+ SMP: Total of 1 processors activated (1998756.81 BogoMIPS).
+ NET: Registered protocol family 16
+ EISA bus registered
+ pci: enabling save/restore of SRM state
+ SCSI subsystem initialized
+ srm_env: version 0.0.5 loaded successfully
+ Installing knfsd (copyright (C) 1996 okir@monad.swb.de).
+ Initializing Cryptographic API
+ rtc: Standard PC (1900) epoch (1900) detected
+ Real Time Clock Driver v1.12
+ Serial: 8250/16550 driver $Revision: 1.90 $ 1 ports, IRQ sharing disabled
+ ttyS0 at I/O 0x3f8 (irq = 4) is a 8250
+ io scheduler noop registered
+ io scheduler anticipatory registered
+ io scheduler deadline registered
+ io scheduler cfq registered
+ loop: loaded (max 8 devices)
+ nbd: registered device at major 43
+ ns83820.c: National Semiconductor DP83820 10/100/1000 driver.
+ PCI: Setting latency timer of device 0000:00:01.0 to 64
+ eth0: ns83820.c: 0x22c: 00000000, subsystem: 0000:0000
+ eth0: enabling optical transceiver
+ eth0: using 64 bit addressing.
+ eth0: ns83820 v0.22: DP83820 v1.3: 00:90:00:00:00:02 io=0x09000000 irq=30 f=h,sg
+ tun: Universal TUN/TAP device driver, 1.6
+ tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com>
+ Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2
+ ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx
+ PIIX4: IDE controller at PCI slot 0000:00:00.0
+ PIIX4: chipset revision 0
+ PIIX4: 100% native mode on irq 31
+ PCI: Setting latency timer of device 0000:00:00.0 to 64
+ ide0: BM-DMA at 0x8400-0x8407, BIOS settings: hda:DMA, hdb:DMA
+ ide1: BM-DMA at 0x8408-0x840f, BIOS settings: hdc:DMA, hdd:DMA
+ hda: M5 IDE Disk, ATA DISK drive
+ hdb: M5 IDE Disk, ATA DISK drive
+ ide0 at 0x8410-0x8417,0x8422 on irq 31
+ hda: max request size: 128KiB
+ hda: 101808 sectors (52 MB), CHS=101/16/63, UDMA(33)
+ hda: cache flushes not supported
+ hda: hda1
+ hdb: max request size: 128KiB
+ hdb: 4177920 sectors (2139 MB), CHS=4144/16/63, UDMA(33)
+ hdb: cache flushes not supported
+ hdb: unknown partition table
+ mice: PS/2 mouse device common for all mice
+ NET: Registered protocol family 2
+ IP route cache hash table entries: 4096 (order: 2, 32768 bytes)
+ TCP established hash table entries: 16384 (order: 5, 262144 bytes)
+ TCP bind hash table entries: 16384 (order: 5, 262144 bytes)
+ TCP: Hash tables configured (established 16384 bind 16384)
+ TCP reno registered
+ ip_conntrack version 2.1 (512 buckets, 4096 max) - 296 bytes per conntrack
+ ip_tables: (C) 2000-2002 Netfilter core team
+ arp_tables: (C) 2002 David S. Miller
+ TCP bic registered
+ Initializing IPsec netlink socket
+ NET: Registered protocol family 1
+ NET: Registered protocol family 17
+ NET: Registered protocol family 15
+ Bridge firewalling registered
+ 802.1Q VLAN Support v1.8 Ben Greear <greearb@candelatech.com>
+ All bugs added by David S. Miller <davem@redhat.com>
+ VFS: Mounted root (ext2 filesystem) readonly.
+ Freeing unused kernel memory: 224k freed
+ init started: BusyBox v1.1.0 (2007.03.04-01:07+0000) multi-call binary
+mounting filesystems...
+EXT2-fs warning: checktime reached, running e2fsck is recommended
+ loading script...
+setting up network...
+eth0: link now 1000F mbps, full duplex and up.
+ running netserver...
+Starting netserver at port 12865
+signal client to begin...done.
+starting bash...
+# \ No newline at end of file
diff --git a/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/simerr b/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/simerr
new file mode 100755
index 000000000..7390a9ac7
--- /dev/null
+++ b/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/simerr
@@ -0,0 +1,6 @@
+warn: Sockets disabled, not accepting terminal connections
+warn: Sockets disabled, not accepting gdb connections
+warn: Prefetch instructions in Alpha do not do anything
+warn: Prefetch instructions in Alpha do not do anything
+warn: Obsolete M5 ivlb instruction encountered.
+hack: be nice to actually delete the event here
diff --git a/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/simout b/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/simout
new file mode 100755
index 000000000..d1174531e
--- /dev/null
+++ b/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/simout
@@ -0,0 +1,14 @@
+gem5 Simulator System. http://gem5.org
+gem5 is copyrighted software; use the --copyright option for details.
+
+gem5 compiled Jan 23 2012 03:53:29
+gem5 started Jan 23 2012 04:23:10
+gem5 executing on zizzer
+command line: build/ALPHA_FS/gem5.opt -d build/ALPHA_FS/tests/opt/quick/80.netperf-stream/alpha/linux/twosys-tsunami-simple-atomic -re tests/run.py build/ALPHA_FS/tests/opt/quick/80.netperf-stream/alpha/linux/twosys-tsunami-simple-atomic
+Global frequency set at 1000000000000 ticks per second
+ 0: testsys.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
+ 0: drivesys.tsunami.io.rtc: Real-time clock set to Thu Jan 1 00:00:00 2009
+info: kernel located at: /dist/m5/system/binaries/vmlinux
+info: kernel located at: /dist/m5/system/binaries/vmlinux
+info: Entering event queue @ 0. Starting simulation...
+Exiting @ tick 4300236804024 because checkpoint
diff --git a/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt b/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt
new file mode 100644
index 000000000..c3a385a95
--- /dev/null
+++ b/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt
@@ -0,0 +1,638 @@
+
+---------- Begin Simulation Statistics ----------
+sim_seconds 0.200001 # Number of seconds simulated
+sim_ticks 200000789468 # Number of ticks simulated
+final_tick 4300236018046 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_freq 1000000000000 # Frequency of simulated ticks
+host_inst_rate 201516796 # Simulator instruction rate (inst/s)
+host_tick_rate 147427543497 # Simulator tick rate (ticks/s)
+host_mem_usage 479620 # Number of bytes of host memory used
+host_seconds 1.36 # Real time elapsed on the host
+sim_insts 273374833 # Number of instructions simulated
+testsys.physmem.bytes_read 19104208 # Number of bytes read from this memory
+testsys.physmem.bytes_inst_read 14257548 # Number of instructions bytes read from this memory
+testsys.physmem.bytes_written 3887982 # Number of bytes written to this memory
+testsys.physmem.num_reads 4226224 # Number of read requests responded to by this memory
+testsys.physmem.num_writes 504418 # Number of write requests responded to by this memory
+testsys.physmem.num_other 0 # Number of other requests responded to by this memory
+testsys.physmem.bw_read 95520663 # Total read bandwidth from this memory (bytes/s)
+testsys.physmem.bw_inst_read 71287459 # Instruction read bandwidth from this memory (bytes/s)
+testsys.physmem.bw_write 19439833 # Write bandwidth from this memory (bytes/s)
+testsys.physmem.bw_total 114960496 # Total bandwidth to/from this memory (bytes/s)
+testsys.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
+testsys.disk0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
+testsys.disk0.dma_read_txs 0 # Number of DMA read transactions (not PRD).
+testsys.disk0.dma_write_full_pages 0 # Number of full page size DMA writes.
+testsys.disk0.dma_write_bytes 0 # Number of bytes transfered via DMA writes.
+testsys.disk0.dma_write_txs 0 # Number of DMA write transactions.
+testsys.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
+testsys.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
+testsys.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD).
+testsys.disk2.dma_write_full_pages 0 # Number of full page size DMA writes.
+testsys.disk2.dma_write_bytes 0 # Number of bytes transfered via DMA writes.
+testsys.disk2.dma_write_txs 0 # Number of DMA write transactions.
+testsys.cpu.dtb.fetch_hits 0 # ITB hits
+testsys.cpu.dtb.fetch_misses 0 # ITB misses
+testsys.cpu.dtb.fetch_acv 0 # ITB acv
+testsys.cpu.dtb.fetch_accesses 0 # ITB accesses
+testsys.cpu.dtb.read_hits 658435 # DTB read hits
+testsys.cpu.dtb.read_misses 3287 # DTB read misses
+testsys.cpu.dtb.read_acv 80 # DTB read access violations
+testsys.cpu.dtb.read_accesses 225414 # DTB read accesses
+testsys.cpu.dtb.write_hits 504853 # DTB write hits
+testsys.cpu.dtb.write_misses 528 # DTB write misses
+testsys.cpu.dtb.write_acv 81 # DTB write access violations
+testsys.cpu.dtb.write_accesses 109988 # DTB write accesses
+testsys.cpu.dtb.data_hits 1163288 # DTB hits
+testsys.cpu.dtb.data_misses 3815 # DTB misses
+testsys.cpu.dtb.data_acv 161 # DTB access violations
+testsys.cpu.dtb.data_accesses 335402 # DTB accesses
+testsys.cpu.itb.fetch_hits 1248325 # ITB hits
+testsys.cpu.itb.fetch_misses 1497 # ITB misses
+testsys.cpu.itb.fetch_acv 69 # ITB acv
+testsys.cpu.itb.fetch_accesses 1249822 # ITB accesses
+testsys.cpu.itb.read_hits 0 # DTB read hits
+testsys.cpu.itb.read_misses 0 # DTB read misses
+testsys.cpu.itb.read_acv 0 # DTB read access violations
+testsys.cpu.itb.read_accesses 0 # DTB read accesses
+testsys.cpu.itb.write_hits 0 # DTB write hits
+testsys.cpu.itb.write_misses 0 # DTB write misses
+testsys.cpu.itb.write_acv 0 # DTB write access violations
+testsys.cpu.itb.write_accesses 0 # DTB write accesses
+testsys.cpu.itb.data_hits 0 # DTB hits
+testsys.cpu.itb.data_misses 0 # DTB misses
+testsys.cpu.itb.data_acv 0 # DTB access violations
+testsys.cpu.itb.data_accesses 0 # DTB accesses
+testsys.cpu.numCycles 199569460393 # number of cpu cycles simulated
+testsys.cpu.numWorkItemsStarted 0 # number of work items this cpu started
+testsys.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
+testsys.cpu.num_insts 3560411 # Number of instructions executed
+testsys.cpu.num_int_alu_accesses 3348322 # Number of integer alu accesses
+testsys.cpu.num_fp_alu_accesses 17380 # Number of float alu accesses
+testsys.cpu.num_func_calls 107994 # number of times a function call or return occured
+testsys.cpu.num_conditional_control_insts 361828 # number of instructions that are conditional controls
+testsys.cpu.num_int_insts 3348322 # number of integer instructions
+testsys.cpu.num_fp_insts 17380 # number of float instructions
+testsys.cpu.num_int_register_reads 4592571 # number of times the integer registers were read
+testsys.cpu.num_int_register_writes 2442795 # number of times the integer registers were written
+testsys.cpu.num_fp_register_reads 11166 # number of times the floating registers were read
+testsys.cpu.num_fp_register_writes 10823 # number of times the floating registers were written
+testsys.cpu.num_mem_refs 1173234 # number of memory refs
+testsys.cpu.num_load_insts 666253 # Number of load instructions
+testsys.cpu.num_store_insts 506981 # Number of store instructions
+testsys.cpu.num_idle_cycles 199565902130.465698 # Number of idle cycles
+testsys.cpu.num_busy_cycles 3558262.534294 # Number of busy cycles
+testsys.cpu.not_idle_fraction 0.000018 # Percentage of non-idle cycles
+testsys.cpu.idle_fraction 0.999982 # Percentage of idle cycles
+testsys.cpu.kern.inst.arm 0 # number of arm instructions executed
+testsys.cpu.kern.inst.quiesce 376 # number of quiesce instructions executed
+testsys.cpu.kern.inst.hwrei 19053 # number of hwrei instructions executed
+testsys.cpu.kern.ipl_count::0 5061 40.48% 40.48% # number of times we switched to this ipl
+testsys.cpu.kern.ipl_count::21 184 1.47% 41.95% # number of times we switched to this ipl
+testsys.cpu.kern.ipl_count::22 205 1.64% 43.59% # number of times we switched to this ipl
+testsys.cpu.kern.ipl_count::31 7054 56.41% 100.00% # number of times we switched to this ipl
+testsys.cpu.kern.ipl_count::total 12504 # number of times we switched to this ipl
+testsys.cpu.kern.ipl_good::0 5055 48.15% 48.15% # number of times we switched to this ipl from a different ipl
+testsys.cpu.kern.ipl_good::21 184 1.75% 49.90% # number of times we switched to this ipl from a different ipl
+testsys.cpu.kern.ipl_good::22 205 1.95% 51.85% # number of times we switched to this ipl from a different ipl
+testsys.cpu.kern.ipl_good::31 5055 48.15% 100.00% # number of times we switched to this ipl from a different ipl
+testsys.cpu.kern.ipl_good::total 10499 # number of times we switched to this ipl from a different ipl
+testsys.cpu.kern.ipl_ticks::0 199568845670 100.00% 100.00% # number of cycles we spent at this ipl
+testsys.cpu.kern.ipl_ticks::21 31026 0.00% 100.00% # number of cycles we spent at this ipl
+testsys.cpu.kern.ipl_ticks::22 17630 0.00% 100.00% # number of cycles we spent at this ipl
+testsys.cpu.kern.ipl_ticks::31 566504 0.00% 100.00% # number of cycles we spent at this ipl
+testsys.cpu.kern.ipl_ticks::total 199569460830 # number of cycles we spent at this ipl
+testsys.cpu.kern.ipl_used::0 0.998814 # fraction of swpipl calls that actually changed the ipl
+testsys.cpu.kern.ipl_used::21 1 # fraction of swpipl calls that actually changed the ipl
+testsys.cpu.kern.ipl_used::22 1 # fraction of swpipl calls that actually changed the ipl
+testsys.cpu.kern.ipl_used::31 0.716615 # fraction of swpipl calls that actually changed the ipl
+testsys.cpu.kern.syscall::2 3 3.61% 3.61% # number of syscalls executed
+testsys.cpu.kern.syscall::3 7 8.43% 12.05% # number of syscalls executed
+testsys.cpu.kern.syscall::4 1 1.20% 13.25% # number of syscalls executed
+testsys.cpu.kern.syscall::6 7 8.43% 21.69% # number of syscalls executed
+testsys.cpu.kern.syscall::17 7 8.43% 30.12% # number of syscalls executed
+testsys.cpu.kern.syscall::19 2 2.41% 32.53% # number of syscalls executed
+testsys.cpu.kern.syscall::20 1 1.20% 33.73% # number of syscalls executed
+testsys.cpu.kern.syscall::33 3 3.61% 37.35% # number of syscalls executed
+testsys.cpu.kern.syscall::45 10 12.05% 49.40% # number of syscalls executed
+testsys.cpu.kern.syscall::48 5 6.02% 55.42% # number of syscalls executed
+testsys.cpu.kern.syscall::54 1 1.20% 56.63% # number of syscalls executed
+testsys.cpu.kern.syscall::59 3 3.61% 60.24% # number of syscalls executed
+testsys.cpu.kern.syscall::71 15 18.07% 78.31% # number of syscalls executed
+testsys.cpu.kern.syscall::74 4 4.82% 83.13% # number of syscalls executed
+testsys.cpu.kern.syscall::97 2 2.41% 85.54% # number of syscalls executed
+testsys.cpu.kern.syscall::98 2 2.41% 87.95% # number of syscalls executed
+testsys.cpu.kern.syscall::101 2 2.41% 90.36% # number of syscalls executed
+testsys.cpu.kern.syscall::102 2 2.41% 92.77% # number of syscalls executed
+testsys.cpu.kern.syscall::104 1 1.20% 93.98% # number of syscalls executed
+testsys.cpu.kern.syscall::105 3 3.61% 97.59% # number of syscalls executed
+testsys.cpu.kern.syscall::118 2 2.41% 100.00% # number of syscalls executed
+testsys.cpu.kern.syscall::total 83 # number of syscalls executed
+testsys.cpu.kern.callpal::swpctx 438 3.34% 3.34% # number of callpals executed
+testsys.cpu.kern.callpal::tbi 20 0.15% 3.49% # number of callpals executed
+testsys.cpu.kern.callpal::swpipl 11074 84.39% 87.88% # number of callpals executed
+testsys.cpu.kern.callpal::rdps 359 2.74% 90.62% # number of callpals executed
+testsys.cpu.kern.callpal::wrusp 3 0.02% 90.64% # number of callpals executed
+testsys.cpu.kern.callpal::rdusp 3 0.02% 90.66% # number of callpals executed
+testsys.cpu.kern.callpal::rti 1041 7.93% 98.60% # number of callpals executed
+testsys.cpu.kern.callpal::callsys 140 1.07% 99.66% # number of callpals executed
+testsys.cpu.kern.callpal::imb 44 0.34% 100.00% # number of callpals executed
+testsys.cpu.kern.callpal::total 13122 # number of callpals executed
+testsys.cpu.kern.mode_switch::kernel 1099 # number of protection mode switches
+testsys.cpu.kern.mode_switch::user 649 # number of protection mode switches
+testsys.cpu.kern.mode_switch::idle 381 # number of protection mode switches
+testsys.cpu.kern.mode_good::kernel 654
+testsys.cpu.kern.mode_good::user 649
+testsys.cpu.kern.mode_good::idle 5
+testsys.cpu.kern.mode_switch_good::kernel 0.595086 # fraction of useful protection mode switches
+testsys.cpu.kern.mode_switch_good::user 1 # fraction of useful protection mode switches
+testsys.cpu.kern.mode_switch_good::idle 0.013123 # fraction of useful protection mode switches
+testsys.cpu.kern.mode_switch_good::total 1.608210 # fraction of useful protection mode switches
+testsys.cpu.kern.mode_ticks::kernel 1821131 2.10% 2.10% # number of ticks spent at the given mode
+testsys.cpu.kern.mode_ticks::user 1065606 1.23% 3.32% # number of ticks spent at the given mode
+testsys.cpu.kern.mode_ticks::idle 83963628 96.68% 100.00% # number of ticks spent at the given mode
+testsys.cpu.kern.swap_context 438 # number of times the context was actually changed
+testsys.tsunami.ethernet.txBytes 960 # Bytes Transmitted
+testsys.tsunami.ethernet.rxBytes 798 # Bytes Received
+testsys.tsunami.ethernet.txPackets 8 # Number of Packets Transmitted
+testsys.tsunami.ethernet.rxPackets 5 # Number of Packets Received
+testsys.tsunami.ethernet.txIpChecksums 2 # Number of tx IP Checksums done by device
+testsys.tsunami.ethernet.rxIpChecksums 5 # Number of rx IP Checksums done by device
+testsys.tsunami.ethernet.txTcpChecksums 2 # Number of tx TCP Checksums done by device
+testsys.tsunami.ethernet.rxTcpChecksums 5 # Number of rx TCP Checksums done by device
+testsys.tsunami.ethernet.txUdpChecksums 0 # Number of tx UDP Checksums done by device
+testsys.tsunami.ethernet.rxUdpChecksums 0 # Number of rx UDP Checksums done by device
+testsys.tsunami.ethernet.descDMAReads 6 # Number of descriptors the device read w/ DMA
+testsys.tsunami.ethernet.descDMAWrites 13 # Number of descriptors the device wrote w/ DMA
+testsys.tsunami.ethernet.descDmaReadBytes 144 # number of descriptor bytes read w/ DMA
+testsys.tsunami.ethernet.descDmaWriteBytes 104 # number of descriptor bytes write w/ DMA
+testsys.tsunami.ethernet.totBandwidth 70320 # Total Bandwidth (bits/s)
+testsys.tsunami.ethernet.totPackets 13 # Total Packets
+testsys.tsunami.ethernet.totBytes 1758 # Total Bytes
+testsys.tsunami.ethernet.totPPS 65 # Total Tranmission Rate (packets/s)
+testsys.tsunami.ethernet.txBandwidth 38400 # Transmit Bandwidth (bits/s)
+testsys.tsunami.ethernet.rxBandwidth 31920 # Receive Bandwidth (bits/s)
+testsys.tsunami.ethernet.txPPS 40 # Packet Tranmission Rate (packets/s)
+testsys.tsunami.ethernet.rxPPS 25 # Packet Reception Rate (packets/s)
+testsys.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU
+testsys.tsunami.ethernet.coalescedSwi 0 # average number of Swi's coalesced into each post
+testsys.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR
+testsys.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU
+testsys.tsunami.ethernet.coalescedRxIdle 0 # average number of RxIdle's coalesced into each post
+testsys.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR
+testsys.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU
+testsys.tsunami.ethernet.coalescedRxOk 0 # average number of RxOk's coalesced into each post
+testsys.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR
+testsys.tsunami.ethernet.postedRxDesc 4 # number of RxDesc interrupts posted to CPU
+testsys.tsunami.ethernet.coalescedRxDesc 0 # average number of RxDesc's coalesced into each post
+testsys.tsunami.ethernet.totalRxDesc 5 # total number of RxDesc written to ISR
+testsys.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU
+testsys.tsunami.ethernet.coalescedTxOk 0 # average number of TxOk's coalesced into each post
+testsys.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR
+testsys.tsunami.ethernet.postedTxIdle 6 # number of TxIdle interrupts posted to CPU
+testsys.tsunami.ethernet.coalescedTxIdle 0 # average number of TxIdle's coalesced into each post
+testsys.tsunami.ethernet.totalTxIdle 6 # total number of TxIdle written to ISR
+testsys.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU
+testsys.tsunami.ethernet.coalescedTxDesc 0 # average number of TxDesc's coalesced into each post
+testsys.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR
+testsys.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU
+testsys.tsunami.ethernet.coalescedRxOrn 0 # average number of RxOrn's coalesced into each post
+testsys.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR
+testsys.tsunami.ethernet.coalescedTotal 1 # average number of interrupts coalesced into each post
+testsys.tsunami.ethernet.postedInterrupts 15 # number of posts to CPU
+testsys.tsunami.ethernet.droppedPackets 0 # number of packets dropped
+drivesys.physmem.bytes_read 10620314 # Number of bytes read from this memory
+drivesys.physmem.bytes_inst_read 7834952 # Number of instructions bytes read from this memory
+drivesys.physmem.bytes_written 1607724 # Number of bytes written to this memory
+drivesys.physmem.num_reads 2352907 # Number of read requests responded to by this memory
+drivesys.physmem.num_writes 230617 # Number of write requests responded to by this memory
+drivesys.physmem.num_other 0 # Number of other requests responded to by this memory
+drivesys.physmem.bw_read 53101360 # Total read bandwidth from this memory (bytes/s)
+drivesys.physmem.bw_inst_read 39174605 # Instruction read bandwidth from this memory (bytes/s)
+drivesys.physmem.bw_write 8038588 # Write bandwidth from this memory (bytes/s)
+drivesys.physmem.bw_total 61139949 # Total bandwidth to/from this memory (bytes/s)
+drivesys.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
+drivesys.disk0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
+drivesys.disk0.dma_read_txs 0 # Number of DMA read transactions (not PRD).
+drivesys.disk0.dma_write_full_pages 0 # Number of full page size DMA writes.
+drivesys.disk0.dma_write_bytes 0 # Number of bytes transfered via DMA writes.
+drivesys.disk0.dma_write_txs 0 # Number of DMA write transactions.
+drivesys.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
+drivesys.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
+drivesys.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD).
+drivesys.disk2.dma_write_full_pages 0 # Number of full page size DMA writes.
+drivesys.disk2.dma_write_bytes 0 # Number of bytes transfered via DMA writes.
+drivesys.disk2.dma_write_txs 0 # Number of DMA write transactions.
+drivesys.cpu.dtb.fetch_hits 0 # ITB hits
+drivesys.cpu.dtb.fetch_misses 0 # ITB misses
+drivesys.cpu.dtb.fetch_acv 0 # ITB acv
+drivesys.cpu.dtb.fetch_accesses 0 # ITB accesses
+drivesys.cpu.dtb.read_hits 393500 # DTB read hits
+drivesys.cpu.dtb.read_misses 487 # DTB read misses
+drivesys.cpu.dtb.read_acv 30 # DTB read access violations
+drivesys.cpu.dtb.read_accesses 268057 # DTB read accesses
+drivesys.cpu.dtb.write_hits 230735 # DTB write hits
+drivesys.cpu.dtb.write_misses 82 # DTB write misses
+drivesys.cpu.dtb.write_acv 10 # DTB write access violations
+drivesys.cpu.dtb.write_accesses 133245 # DTB write accesses
+drivesys.cpu.dtb.data_hits 624235 # DTB hits
+drivesys.cpu.dtb.data_misses 569 # DTB misses
+drivesys.cpu.dtb.data_acv 40 # DTB access violations
+drivesys.cpu.dtb.data_accesses 401302 # DTB accesses
+drivesys.cpu.itb.fetch_hits 1337786 # ITB hits
+drivesys.cpu.itb.fetch_misses 194 # ITB misses
+drivesys.cpu.itb.fetch_acv 22 # ITB acv
+drivesys.cpu.itb.fetch_accesses 1337980 # ITB accesses
+drivesys.cpu.itb.read_hits 0 # DTB read hits
+drivesys.cpu.itb.read_misses 0 # DTB read misses
+drivesys.cpu.itb.read_acv 0 # DTB read access violations
+drivesys.cpu.itb.read_accesses 0 # DTB read accesses
+drivesys.cpu.itb.write_hits 0 # DTB write hits
+drivesys.cpu.itb.write_misses 0 # DTB write misses
+drivesys.cpu.itb.write_acv 0 # DTB write access violations
+drivesys.cpu.itb.write_accesses 0 # DTB write accesses
+drivesys.cpu.itb.data_hits 0 # DTB hits
+drivesys.cpu.itb.data_misses 0 # DTB misses
+drivesys.cpu.itb.data_acv 0 # DTB access violations
+drivesys.cpu.itb.data_accesses 0 # DTB accesses
+drivesys.cpu.numCycles 199571362884 # number of cpu cycles simulated
+drivesys.cpu.numWorkItemsStarted 0 # number of work items this cpu started
+drivesys.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
+drivesys.cpu.num_insts 1958129 # Number of instructions executed
+drivesys.cpu.num_int_alu_accesses 1889973 # Number of integer alu accesses
+drivesys.cpu.num_fp_alu_accesses 1278 # Number of float alu accesses
+drivesys.cpu.num_func_calls 121650 # number of times a function call or return occured
+drivesys.cpu.num_conditional_control_insts 161093 # number of instructions that are conditional controls
+drivesys.cpu.num_int_insts 1889973 # number of integer instructions
+drivesys.cpu.num_fp_insts 1278 # number of float instructions
+drivesys.cpu.num_int_register_reads 2411030 # number of times the integer registers were read
+drivesys.cpu.num_int_register_writes 1442447 # number of times the integer registers were written
+drivesys.cpu.num_fp_register_reads 694 # number of times the floating registers were read
+drivesys.cpu.num_fp_register_writes 698 # number of times the floating registers were written
+drivesys.cpu.num_mem_refs 625939 # number of memory refs
+drivesys.cpu.num_load_insts 394697 # Number of load instructions
+drivesys.cpu.num_store_insts 231242 # Number of store instructions
+drivesys.cpu.num_idle_cycles 199569408136.118042 # Number of idle cycles
+drivesys.cpu.num_busy_cycles 1954747.881971 # Number of busy cycles
+drivesys.cpu.not_idle_fraction 0.000010 # Percentage of non-idle cycles
+drivesys.cpu.idle_fraction 0.999990 # Percentage of idle cycles
+drivesys.cpu.kern.inst.arm 0 # number of arm instructions executed
+drivesys.cpu.kern.inst.quiesce 215 # number of quiesce instructions executed
+drivesys.cpu.kern.inst.hwrei 5483 # number of hwrei instructions executed
+drivesys.cpu.kern.ipl_count::0 1189 28.37% 28.37% # number of times we switched to this ipl
+drivesys.cpu.kern.ipl_count::21 10 0.24% 28.61% # number of times we switched to this ipl
+drivesys.cpu.kern.ipl_count::22 205 4.89% 33.50% # number of times we switched to this ipl
+drivesys.cpu.kern.ipl_count::31 2787 66.50% 100.00% # number of times we switched to this ipl
+drivesys.cpu.kern.ipl_count::total 4191 # number of times we switched to this ipl
+drivesys.cpu.kern.ipl_good::0 1189 45.85% 45.85% # number of times we switched to this ipl from a different ipl
+drivesys.cpu.kern.ipl_good::21 10 0.39% 46.24% # number of times we switched to this ipl from a different ipl
+drivesys.cpu.kern.ipl_good::22 205 7.91% 54.15% # number of times we switched to this ipl from a different ipl
+drivesys.cpu.kern.ipl_good::31 1189 45.85% 100.00% # number of times we switched to this ipl from a different ipl
+drivesys.cpu.kern.ipl_good::total 2593 # number of times we switched to this ipl from a different ipl
+drivesys.cpu.kern.ipl_ticks::0 199571043172 100.00% 100.00% # number of cycles we spent at this ipl
+drivesys.cpu.kern.ipl_ticks::21 1620 0.00% 100.00% # number of cycles we spent at this ipl
+drivesys.cpu.kern.ipl_ticks::22 17630 0.00% 100.00% # number of cycles we spent at this ipl
+drivesys.cpu.kern.ipl_ticks::31 300462 0.00% 100.00% # number of cycles we spent at this ipl
+drivesys.cpu.kern.ipl_ticks::total 199571362884 # number of cycles we spent at this ipl
+drivesys.cpu.kern.ipl_used::0 1 # fraction of swpipl calls that actually changed the ipl
+drivesys.cpu.kern.ipl_used::21 1 # fraction of swpipl calls that actually changed the ipl
+drivesys.cpu.kern.ipl_used::22 1 # fraction of swpipl calls that actually changed the ipl
+drivesys.cpu.kern.ipl_used::31 0.426624 # fraction of swpipl calls that actually changed the ipl
+drivesys.cpu.kern.syscall::2 1 4.55% 4.55% # number of syscalls executed
+drivesys.cpu.kern.syscall::6 3 13.64% 18.18% # number of syscalls executed
+drivesys.cpu.kern.syscall::17 2 9.09% 27.27% # number of syscalls executed
+drivesys.cpu.kern.syscall::97 1 4.55% 31.82% # number of syscalls executed
+drivesys.cpu.kern.syscall::99 2 9.09% 40.91% # number of syscalls executed
+drivesys.cpu.kern.syscall::101 2 9.09% 50.00% # number of syscalls executed
+drivesys.cpu.kern.syscall::102 3 13.64% 63.64% # number of syscalls executed
+drivesys.cpu.kern.syscall::104 1 4.55% 68.18% # number of syscalls executed
+drivesys.cpu.kern.syscall::105 3 13.64% 81.82% # number of syscalls executed
+drivesys.cpu.kern.syscall::106 1 4.55% 86.36% # number of syscalls executed
+drivesys.cpu.kern.syscall::118 2 9.09% 95.45% # number of syscalls executed
+drivesys.cpu.kern.syscall::150 1 4.55% 100.00% # number of syscalls executed
+drivesys.cpu.kern.syscall::total 22 # number of syscalls executed
+drivesys.cpu.kern.callpal::swpctx 70 1.58% 1.58% # number of callpals executed
+drivesys.cpu.kern.callpal::tbi 5 0.11% 1.69% # number of callpals executed
+drivesys.cpu.kern.callpal::swpipl 3654 82.24% 83.93% # number of callpals executed
+drivesys.cpu.kern.callpal::rdps 359 8.08% 92.01% # number of callpals executed
+drivesys.cpu.kern.callpal::rdusp 1 0.02% 92.03% # number of callpals executed
+drivesys.cpu.kern.callpal::rti 322 7.25% 99.28% # number of callpals executed
+drivesys.cpu.kern.callpal::callsys 25 0.56% 99.84% # number of callpals executed
+drivesys.cpu.kern.callpal::imb 7 0.16% 100.00% # number of callpals executed
+drivesys.cpu.kern.callpal::total 4443 # number of callpals executed
+drivesys.cpu.kern.mode_switch::kernel 174 # number of protection mode switches
+drivesys.cpu.kern.mode_switch::user 107 # number of protection mode switches
+drivesys.cpu.kern.mode_switch::idle 218 # number of protection mode switches
+drivesys.cpu.kern.mode_good::kernel 110
+drivesys.cpu.kern.mode_good::user 107
+drivesys.cpu.kern.mode_good::idle 3
+drivesys.cpu.kern.mode_switch_good::kernel 0.632184 # fraction of useful protection mode switches
+drivesys.cpu.kern.mode_switch_good::user 1 # fraction of useful protection mode switches
+drivesys.cpu.kern.mode_switch_good::idle 0.013761 # fraction of useful protection mode switches
+drivesys.cpu.kern.mode_switch_good::total 1.645945 # fraction of useful protection mode switches
+drivesys.cpu.kern.mode_ticks::kernel 263256 0.24% 0.24% # number of ticks spent at the given mode
+drivesys.cpu.kern.mode_ticks::user 1278343 1.15% 1.39% # number of ticks spent at the given mode
+drivesys.cpu.kern.mode_ticks::idle 109686421 98.61% 100.00% # number of ticks spent at the given mode
+drivesys.cpu.kern.swap_context 70 # number of times the context was actually changed
+drivesys.tsunami.ethernet.txBytes 798 # Bytes Transmitted
+drivesys.tsunami.ethernet.rxBytes 960 # Bytes Received
+drivesys.tsunami.ethernet.txPackets 5 # Number of Packets Transmitted
+drivesys.tsunami.ethernet.rxPackets 8 # Number of Packets Received
+drivesys.tsunami.ethernet.txIpChecksums 2 # Number of tx IP Checksums done by device
+drivesys.tsunami.ethernet.rxIpChecksums 8 # Number of rx IP Checksums done by device
+drivesys.tsunami.ethernet.txTcpChecksums 2 # Number of tx TCP Checksums done by device
+drivesys.tsunami.ethernet.rxTcpChecksums 8 # Number of rx TCP Checksums done by device
+drivesys.tsunami.ethernet.txUdpChecksums 0 # Number of tx UDP Checksums done by device
+drivesys.tsunami.ethernet.rxUdpChecksums 0 # Number of rx UDP Checksums done by device
+drivesys.tsunami.ethernet.descDMAReads 4 # Number of descriptors the device read w/ DMA
+drivesys.tsunami.ethernet.descDMAWrites 13 # Number of descriptors the device wrote w/ DMA
+drivesys.tsunami.ethernet.descDmaReadBytes 96 # number of descriptor bytes read w/ DMA
+drivesys.tsunami.ethernet.descDmaWriteBytes 104 # number of descriptor bytes write w/ DMA
+drivesys.tsunami.ethernet.totBandwidth 70320 # Total Bandwidth (bits/s)
+drivesys.tsunami.ethernet.totPackets 13 # Total Packets
+drivesys.tsunami.ethernet.totBytes 1758 # Total Bytes
+drivesys.tsunami.ethernet.totPPS 65 # Total Tranmission Rate (packets/s)
+drivesys.tsunami.ethernet.txBandwidth 31920 # Transmit Bandwidth (bits/s)
+drivesys.tsunami.ethernet.rxBandwidth 38400 # Receive Bandwidth (bits/s)
+drivesys.tsunami.ethernet.txPPS 25 # Packet Tranmission Rate (packets/s)
+drivesys.tsunami.ethernet.rxPPS 40 # Packet Reception Rate (packets/s)
+drivesys.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU
+drivesys.tsunami.ethernet.coalescedSwi 0 # average number of Swi's coalesced into each post
+drivesys.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR
+drivesys.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU
+drivesys.tsunami.ethernet.coalescedRxIdle 0 # average number of RxIdle's coalesced into each post
+drivesys.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR
+drivesys.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU
+drivesys.tsunami.ethernet.coalescedRxOk 0 # average number of RxOk's coalesced into each post
+drivesys.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR
+drivesys.tsunami.ethernet.postedRxDesc 6 # number of RxDesc interrupts posted to CPU
+drivesys.tsunami.ethernet.coalescedRxDesc 0 # average number of RxDesc's coalesced into each post
+drivesys.tsunami.ethernet.totalRxDesc 8 # total number of RxDesc written to ISR
+drivesys.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU
+drivesys.tsunami.ethernet.coalescedTxOk 0 # average number of TxOk's coalesced into each post
+drivesys.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR
+drivesys.tsunami.ethernet.postedTxIdle 4 # number of TxIdle interrupts posted to CPU
+drivesys.tsunami.ethernet.coalescedTxIdle 0 # average number of TxIdle's coalesced into each post
+drivesys.tsunami.ethernet.totalTxIdle 4 # total number of TxIdle written to ISR
+drivesys.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU
+drivesys.tsunami.ethernet.coalescedTxDesc 0 # average number of TxDesc's coalesced into each post
+drivesys.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR
+drivesys.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU
+drivesys.tsunami.ethernet.coalescedRxOrn 0 # average number of RxOrn's coalesced into each post
+drivesys.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR
+drivesys.tsunami.ethernet.coalescedTotal 1 # average number of interrupts coalesced into each post
+drivesys.tsunami.ethernet.postedInterrupts 16 # number of posts to CPU
+drivesys.tsunami.ethernet.droppedPackets 0 # number of packets dropped
+
+---------- End Simulation Statistics ----------
+
+---------- Begin Simulation Statistics ----------
+sim_seconds 0.000001 # Number of seconds simulated
+sim_ticks 785978 # Number of ticks simulated
+final_tick 4300236804024 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
+sim_freq 1000000000000 # Frequency of simulated ticks
+host_inst_rate 864513825905 # Simulator instruction rate (inst/s)
+host_tick_rate 2363296319 # Simulator tick rate (ticks/s)
+host_mem_usage 479620 # Number of bytes of host memory used
+host_seconds 0.00 # Real time elapsed on the host
+sim_insts 273374833 # Number of instructions simulated
+testsys.physmem.bytes_read 0 # Number of bytes read from this memory
+testsys.physmem.bytes_inst_read 0 # Number of instructions bytes read from this memory
+testsys.physmem.bytes_written 0 # Number of bytes written to this memory
+testsys.physmem.num_reads 0 # Number of read requests responded to by this memory
+testsys.physmem.num_writes 0 # Number of write requests responded to by this memory
+testsys.physmem.num_other 0 # Number of other requests responded to by this memory
+testsys.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
+testsys.disk0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
+testsys.disk0.dma_read_txs 0 # Number of DMA read transactions (not PRD).
+testsys.disk0.dma_write_full_pages 0 # Number of full page size DMA writes.
+testsys.disk0.dma_write_bytes 0 # Number of bytes transfered via DMA writes.
+testsys.disk0.dma_write_txs 0 # Number of DMA write transactions.
+testsys.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
+testsys.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
+testsys.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD).
+testsys.disk2.dma_write_full_pages 0 # Number of full page size DMA writes.
+testsys.disk2.dma_write_bytes 0 # Number of bytes transfered via DMA writes.
+testsys.disk2.dma_write_txs 0 # Number of DMA write transactions.
+testsys.cpu.dtb.fetch_hits 0 # ITB hits
+testsys.cpu.dtb.fetch_misses 0 # ITB misses
+testsys.cpu.dtb.fetch_acv 0 # ITB acv
+testsys.cpu.dtb.fetch_accesses 0 # ITB accesses
+testsys.cpu.dtb.read_hits 0 # DTB read hits
+testsys.cpu.dtb.read_misses 0 # DTB read misses
+testsys.cpu.dtb.read_acv 0 # DTB read access violations
+testsys.cpu.dtb.read_accesses 0 # DTB read accesses
+testsys.cpu.dtb.write_hits 0 # DTB write hits
+testsys.cpu.dtb.write_misses 0 # DTB write misses
+testsys.cpu.dtb.write_acv 0 # DTB write access violations
+testsys.cpu.dtb.write_accesses 0 # DTB write accesses
+testsys.cpu.dtb.data_hits 0 # DTB hits
+testsys.cpu.dtb.data_misses 0 # DTB misses
+testsys.cpu.dtb.data_acv 0 # DTB access violations
+testsys.cpu.dtb.data_accesses 0 # DTB accesses
+testsys.cpu.itb.fetch_hits 0 # ITB hits
+testsys.cpu.itb.fetch_misses 0 # ITB misses
+testsys.cpu.itb.fetch_acv 0 # ITB acv
+testsys.cpu.itb.fetch_accesses 0 # ITB accesses
+testsys.cpu.itb.read_hits 0 # DTB read hits
+testsys.cpu.itb.read_misses 0 # DTB read misses
+testsys.cpu.itb.read_acv 0 # DTB read access violations
+testsys.cpu.itb.read_accesses 0 # DTB read accesses
+testsys.cpu.itb.write_hits 0 # DTB write hits
+testsys.cpu.itb.write_misses 0 # DTB write misses
+testsys.cpu.itb.write_acv 0 # DTB write access violations
+testsys.cpu.itb.write_accesses 0 # DTB write accesses
+testsys.cpu.itb.data_hits 0 # DTB hits
+testsys.cpu.itb.data_misses 0 # DTB misses
+testsys.cpu.itb.data_acv 0 # DTB access violations
+testsys.cpu.itb.data_accesses 0 # DTB accesses
+testsys.cpu.numCycles 0 # number of cpu cycles simulated
+testsys.cpu.numWorkItemsStarted 0 # number of work items this cpu started
+testsys.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
+testsys.cpu.num_insts 0 # Number of instructions executed
+testsys.cpu.num_int_alu_accesses 0 # Number of integer alu accesses
+testsys.cpu.num_fp_alu_accesses 0 # Number of float alu accesses
+testsys.cpu.num_func_calls 0 # number of times a function call or return occured
+testsys.cpu.num_conditional_control_insts 0 # number of instructions that are conditional controls
+testsys.cpu.num_int_insts 0 # number of integer instructions
+testsys.cpu.num_fp_insts 0 # number of float instructions
+testsys.cpu.num_int_register_reads 0 # number of times the integer registers were read
+testsys.cpu.num_int_register_writes 0 # number of times the integer registers were written
+testsys.cpu.num_fp_register_reads 0 # number of times the floating registers were read
+testsys.cpu.num_fp_register_writes 0 # number of times the floating registers were written
+testsys.cpu.num_mem_refs 0 # number of memory refs
+testsys.cpu.num_load_insts 0 # Number of load instructions
+testsys.cpu.num_store_insts 0 # Number of store instructions
+testsys.cpu.num_idle_cycles 0 # Number of idle cycles
+testsys.cpu.num_busy_cycles 0 # Number of busy cycles
+testsys.cpu.not_idle_fraction 0 # Percentage of non-idle cycles
+testsys.cpu.idle_fraction 1 # Percentage of idle cycles
+testsys.cpu.kern.inst.arm 0 # number of arm instructions executed
+testsys.cpu.kern.inst.quiesce 0 # number of quiesce instructions executed
+testsys.cpu.kern.inst.hwrei 0 # number of hwrei instructions executed
+testsys.cpu.kern.mode_switch::kernel 0 # number of protection mode switches
+testsys.cpu.kern.mode_switch::user 0 # number of protection mode switches
+testsys.cpu.kern.mode_switch::idle 0 # number of protection mode switches
+testsys.cpu.kern.mode_good::kernel 0
+testsys.cpu.kern.mode_good::user 0
+testsys.cpu.kern.mode_good::idle 0
+testsys.cpu.kern.mode_switch_good::kernel no_value # fraction of useful protection mode switches
+testsys.cpu.kern.mode_switch_good::user no_value # fraction of useful protection mode switches
+testsys.cpu.kern.mode_switch_good::idle no_value # fraction of useful protection mode switches
+testsys.cpu.kern.mode_switch_good::total no_value # fraction of useful protection mode switches
+testsys.cpu.kern.mode_ticks::kernel 0 # number of ticks spent at the given mode
+testsys.cpu.kern.mode_ticks::user 0 # number of ticks spent at the given mode
+testsys.cpu.kern.mode_ticks::idle 0 # number of ticks spent at the given mode
+testsys.cpu.kern.swap_context 0 # number of times the context was actually changed
+testsys.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA
+testsys.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA
+testsys.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA
+testsys.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA
+testsys.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU
+testsys.tsunami.ethernet.coalescedSwi no_value # average number of Swi's coalesced into each post
+testsys.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR
+testsys.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU
+testsys.tsunami.ethernet.coalescedRxIdle no_value # average number of RxIdle's coalesced into each post
+testsys.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR
+testsys.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU
+testsys.tsunami.ethernet.coalescedRxOk no_value # average number of RxOk's coalesced into each post
+testsys.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR
+testsys.tsunami.ethernet.postedRxDesc 0 # number of RxDesc interrupts posted to CPU
+testsys.tsunami.ethernet.coalescedRxDesc no_value # average number of RxDesc's coalesced into each post
+testsys.tsunami.ethernet.totalRxDesc 0 # total number of RxDesc written to ISR
+testsys.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU
+testsys.tsunami.ethernet.coalescedTxOk no_value # average number of TxOk's coalesced into each post
+testsys.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR
+testsys.tsunami.ethernet.postedTxIdle 0 # number of TxIdle interrupts posted to CPU
+testsys.tsunami.ethernet.coalescedTxIdle no_value # average number of TxIdle's coalesced into each post
+testsys.tsunami.ethernet.totalTxIdle 0 # total number of TxIdle written to ISR
+testsys.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU
+testsys.tsunami.ethernet.coalescedTxDesc no_value # average number of TxDesc's coalesced into each post
+testsys.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR
+testsys.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU
+testsys.tsunami.ethernet.coalescedRxOrn no_value # average number of RxOrn's coalesced into each post
+testsys.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR
+testsys.tsunami.ethernet.coalescedTotal no_value # average number of interrupts coalesced into each post
+testsys.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU
+testsys.tsunami.ethernet.droppedPackets 0 # number of packets dropped
+drivesys.physmem.bytes_read 0 # Number of bytes read from this memory
+drivesys.physmem.bytes_inst_read 0 # Number of instructions bytes read from this memory
+drivesys.physmem.bytes_written 0 # Number of bytes written to this memory
+drivesys.physmem.num_reads 0 # Number of read requests responded to by this memory
+drivesys.physmem.num_writes 0 # Number of write requests responded to by this memory
+drivesys.physmem.num_other 0 # Number of other requests responded to by this memory
+drivesys.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
+drivesys.disk0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
+drivesys.disk0.dma_read_txs 0 # Number of DMA read transactions (not PRD).
+drivesys.disk0.dma_write_full_pages 0 # Number of full page size DMA writes.
+drivesys.disk0.dma_write_bytes 0 # Number of bytes transfered via DMA writes.
+drivesys.disk0.dma_write_txs 0 # Number of DMA write transactions.
+drivesys.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
+drivesys.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
+drivesys.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD).
+drivesys.disk2.dma_write_full_pages 0 # Number of full page size DMA writes.
+drivesys.disk2.dma_write_bytes 0 # Number of bytes transfered via DMA writes.
+drivesys.disk2.dma_write_txs 0 # Number of DMA write transactions.
+drivesys.cpu.dtb.fetch_hits 0 # ITB hits
+drivesys.cpu.dtb.fetch_misses 0 # ITB misses
+drivesys.cpu.dtb.fetch_acv 0 # ITB acv
+drivesys.cpu.dtb.fetch_accesses 0 # ITB accesses
+drivesys.cpu.dtb.read_hits 0 # DTB read hits
+drivesys.cpu.dtb.read_misses 0 # DTB read misses
+drivesys.cpu.dtb.read_acv 0 # DTB read access violations
+drivesys.cpu.dtb.read_accesses 0 # DTB read accesses
+drivesys.cpu.dtb.write_hits 0 # DTB write hits
+drivesys.cpu.dtb.write_misses 0 # DTB write misses
+drivesys.cpu.dtb.write_acv 0 # DTB write access violations
+drivesys.cpu.dtb.write_accesses 0 # DTB write accesses
+drivesys.cpu.dtb.data_hits 0 # DTB hits
+drivesys.cpu.dtb.data_misses 0 # DTB misses
+drivesys.cpu.dtb.data_acv 0 # DTB access violations
+drivesys.cpu.dtb.data_accesses 0 # DTB accesses
+drivesys.cpu.itb.fetch_hits 0 # ITB hits
+drivesys.cpu.itb.fetch_misses 0 # ITB misses
+drivesys.cpu.itb.fetch_acv 0 # ITB acv
+drivesys.cpu.itb.fetch_accesses 0 # ITB accesses
+drivesys.cpu.itb.read_hits 0 # DTB read hits
+drivesys.cpu.itb.read_misses 0 # DTB read misses
+drivesys.cpu.itb.read_acv 0 # DTB read access violations
+drivesys.cpu.itb.read_accesses 0 # DTB read accesses
+drivesys.cpu.itb.write_hits 0 # DTB write hits
+drivesys.cpu.itb.write_misses 0 # DTB write misses
+drivesys.cpu.itb.write_acv 0 # DTB write access violations
+drivesys.cpu.itb.write_accesses 0 # DTB write accesses
+drivesys.cpu.itb.data_hits 0 # DTB hits
+drivesys.cpu.itb.data_misses 0 # DTB misses
+drivesys.cpu.itb.data_acv 0 # DTB access violations
+drivesys.cpu.itb.data_accesses 0 # DTB accesses
+drivesys.cpu.numCycles 0 # number of cpu cycles simulated
+drivesys.cpu.numWorkItemsStarted 0 # number of work items this cpu started
+drivesys.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
+drivesys.cpu.num_insts 0 # Number of instructions executed
+drivesys.cpu.num_int_alu_accesses 0 # Number of integer alu accesses
+drivesys.cpu.num_fp_alu_accesses 0 # Number of float alu accesses
+drivesys.cpu.num_func_calls 0 # number of times a function call or return occured
+drivesys.cpu.num_conditional_control_insts 0 # number of instructions that are conditional controls
+drivesys.cpu.num_int_insts 0 # number of integer instructions
+drivesys.cpu.num_fp_insts 0 # number of float instructions
+drivesys.cpu.num_int_register_reads 0 # number of times the integer registers were read
+drivesys.cpu.num_int_register_writes 0 # number of times the integer registers were written
+drivesys.cpu.num_fp_register_reads 0 # number of times the floating registers were read
+drivesys.cpu.num_fp_register_writes 0 # number of times the floating registers were written
+drivesys.cpu.num_mem_refs 0 # number of memory refs
+drivesys.cpu.num_load_insts 0 # Number of load instructions
+drivesys.cpu.num_store_insts 0 # Number of store instructions
+drivesys.cpu.num_idle_cycles 0 # Number of idle cycles
+drivesys.cpu.num_busy_cycles 0 # Number of busy cycles
+drivesys.cpu.not_idle_fraction 0 # Percentage of non-idle cycles
+drivesys.cpu.idle_fraction 1 # Percentage of idle cycles
+drivesys.cpu.kern.inst.arm 0 # number of arm instructions executed
+drivesys.cpu.kern.inst.quiesce 0 # number of quiesce instructions executed
+drivesys.cpu.kern.inst.hwrei 0 # number of hwrei instructions executed
+drivesys.cpu.kern.mode_switch::kernel 0 # number of protection mode switches
+drivesys.cpu.kern.mode_switch::user 0 # number of protection mode switches
+drivesys.cpu.kern.mode_switch::idle 0 # number of protection mode switches
+drivesys.cpu.kern.mode_good::kernel 0
+drivesys.cpu.kern.mode_good::user 0
+drivesys.cpu.kern.mode_good::idle 0
+drivesys.cpu.kern.mode_switch_good::kernel no_value # fraction of useful protection mode switches
+drivesys.cpu.kern.mode_switch_good::user no_value # fraction of useful protection mode switches
+drivesys.cpu.kern.mode_switch_good::idle no_value # fraction of useful protection mode switches
+drivesys.cpu.kern.mode_switch_good::total no_value # fraction of useful protection mode switches
+drivesys.cpu.kern.mode_ticks::kernel 0 # number of ticks spent at the given mode
+drivesys.cpu.kern.mode_ticks::user 0 # number of ticks spent at the given mode
+drivesys.cpu.kern.mode_ticks::idle 0 # number of ticks spent at the given mode
+drivesys.cpu.kern.swap_context 0 # number of times the context was actually changed
+drivesys.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA
+drivesys.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA
+drivesys.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA
+drivesys.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA
+drivesys.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU
+drivesys.tsunami.ethernet.coalescedSwi no_value # average number of Swi's coalesced into each post
+drivesys.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR
+drivesys.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU
+drivesys.tsunami.ethernet.coalescedRxIdle no_value # average number of RxIdle's coalesced into each post
+drivesys.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR
+drivesys.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU
+drivesys.tsunami.ethernet.coalescedRxOk no_value # average number of RxOk's coalesced into each post
+drivesys.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR
+drivesys.tsunami.ethernet.postedRxDesc 0 # number of RxDesc interrupts posted to CPU
+drivesys.tsunami.ethernet.coalescedRxDesc no_value # average number of RxDesc's coalesced into each post
+drivesys.tsunami.ethernet.totalRxDesc 0 # total number of RxDesc written to ISR
+drivesys.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU
+drivesys.tsunami.ethernet.coalescedTxOk no_value # average number of TxOk's coalesced into each post
+drivesys.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR
+drivesys.tsunami.ethernet.postedTxIdle 0 # number of TxIdle interrupts posted to CPU
+drivesys.tsunami.ethernet.coalescedTxIdle no_value # average number of TxIdle's coalesced into each post
+drivesys.tsunami.ethernet.totalTxIdle 0 # total number of TxIdle written to ISR
+drivesys.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU
+drivesys.tsunami.ethernet.coalescedTxDesc no_value # average number of TxDesc's coalesced into each post
+drivesys.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR
+drivesys.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU
+drivesys.tsunami.ethernet.coalescedRxOrn no_value # average number of RxOrn's coalesced into each post
+drivesys.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR
+drivesys.tsunami.ethernet.coalescedTotal no_value # average number of interrupts coalesced into each post
+drivesys.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU
+drivesys.tsunami.ethernet.droppedPackets 0 # number of packets dropped
+
+---------- End Simulation Statistics ----------
diff --git a/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/testsys.terminal b/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/testsys.terminal
new file mode 100644
index 000000000..9468ea620
--- /dev/null
+++ b/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/testsys.terminal
@@ -0,0 +1,123 @@
+M5 console: m5AlphaAccess @ 0xFFFFFD0200000000
+ Got Configuration 623
+ memsize 8000000 pages 4000
+ First free page after ROM 0xFFFFFC0000018000
+ HWRPB 0xFFFFFC0000018000 l1pt 0xFFFFFC0000040000 l2pt 0xFFFFFC0000042000 l3pt_rpb 0xFFFFFC0000044000 l3pt_kernel 0xFFFFFC0000048000 l2reserv 0xFFFFFC0000046000
+ kstart = 0xFFFFFC0000310000, kend = 0xFFFFFC0000855898, kentry = 0xFFFFFC0000310000, numCPUs = 0x1
+ CPU Clock at 1000000 MHz IntrClockFrequency=1024
+ Booting with 1 processor(s)
+ KSP: 0x20043FE8 PTBR 0x20
+ Console Callback at 0x0, fixup at 0x0, crb offset: 0x510
+ Memory cluster 0 [0 - 392]
+ Memory cluster 1 [392 - 15992]
+ Initalizing mdt_bitmap addr 0xFFFFFC0000038000 mem_pages 4000
+ ConsoleDispatch at virt 10000658 phys 18658 val FFFFFC00000100A8
+ unix_boot_mem ends at FFFFFC0000076000
+ k_argc = 0
+ jumping to kernel at 0xFFFFFC0000310000, (PCBB 0xFFFFFC0000018180 pfn 1067)
+ CallbackFixup 0 18000, t7=FFFFFC000070C000
+ Linux version 2.6.13 (hsul@zed.eecs.umich.edu) (gcc version 3.4.3) #1 SMP Sun Oct 8 19:52:07 EDT 2006
+ Booting GENERIC on Tsunami variation DP264 using machine vector DP264 from SRM
+ Major Options: SMP LEGACY_START VERBOSE_MCHECK
+ Command line: root=/dev/hda1 console=ttyS0
+ memcluster 0, usage 1, start 0, end 392
+ memcluster 1, usage 0, start 392, end 16384
+ freeing pages 1069:16384
+ reserving pages 1069:1070
+ SMP: 1 CPUs probed -- cpu_present_mask = 1
+ Built 1 zonelists
+ Kernel command line: root=/dev/hda1 console=ttyS0
+ PID hash table entries: 1024 (order: 10, 32768 bytes)
+ Using epoch = 1900
+ Console: colour dummy device 80x25
+ Dentry cache hash table entries: 32768 (order: 5, 262144 bytes)
+ Inode-cache hash table entries: 16384 (order: 4, 131072 bytes)
+ Memory: 118784k/131072k available (3314k kernel code, 8952k reserved, 983k data, 224k init)
+ Mount-cache hash table entries: 512
+ SMP mode deactivated.
+ Brought up 1 CPUs
+ SMP: Total of 1 processors activated (1998756.81 BogoMIPS).
+ NET: Registered protocol family 16
+ EISA bus registered
+ pci: enabling save/restore of SRM state
+ SCSI subsystem initialized
+ srm_env: version 0.0.5 loaded successfully
+ Installing knfsd (copyright (C) 1996 okir@monad.swb.de).
+ Initializing Cryptographic API
+ rtc: Standard PC (1900) epoch (1900) detected
+ Real Time Clock Driver v1.12
+ Serial: 8250/16550 driver $Revision: 1.90 $ 1 ports, IRQ sharing disabled
+ ttyS0 at I/O 0x3f8 (irq = 4) is a 8250
+ io scheduler noop registered
+ io scheduler anticipatory registered
+ io scheduler deadline registered
+ io scheduler cfq registered
+ loop: loaded (max 8 devices)
+ nbd: registered device at major 43
+ ns83820.c: National Semiconductor DP83820 10/100/1000 driver.
+ PCI: Setting latency timer of device 0000:00:01.0 to 64
+ eth0: ns83820.c: 0x22c: 00000000, subsystem: 0000:0000
+ eth0: enabling optical transceiver
+ eth0: using 64 bit addressing.
+ eth0: ns83820 v0.22: DP83820 v1.3: 00:90:00:00:00:01 io=0x09000000 irq=30 f=h,sg
+ tun: Universal TUN/TAP device driver, 1.6
+ tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com>
+ Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2
+ ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx
+ PIIX4: IDE controller at PCI slot 0000:00:00.0
+ PIIX4: chipset revision 0
+ PIIX4: 100% native mode on irq 31
+ PCI: Setting latency timer of device 0000:00:00.0 to 64
+ ide0: BM-DMA at 0x8400-0x8407, BIOS settings: hda:DMA, hdb:DMA
+ ide1: BM-DMA at 0x8408-0x840f, BIOS settings: hdc:DMA, hdd:DMA
+ hda: M5 IDE Disk, ATA DISK drive
+ hdb: M5 IDE Disk, ATA DISK drive
+ ide0 at 0x8410-0x8417,0x8422 on irq 31
+ hda: max request size: 128KiB
+ hda: 101808 sectors (52 MB), CHS=101/16/63, UDMA(33)
+ hda: cache flushes not supported
+ hda: hda1
+ hdb: max request size: 128KiB
+ hdb: 4177920 sectors (2139 MB), CHS=4144/16/63, UDMA(33)
+ hdb: cache flushes not supported
+ hdb: unknown partition table
+ mice: PS/2 mouse device common for all mice
+ NET: Registered protocol family 2
+ IP route cache hash table entries: 4096 (order: 2, 32768 bytes)
+ TCP established hash table entries: 16384 (order: 5, 262144 bytes)
+ TCP bind hash table entries: 16384 (order: 5, 262144 bytes)
+ TCP: Hash tables configured (established 16384 bind 16384)
+ TCP reno registered
+ ip_conntrack version 2.1 (512 buckets, 4096 max) - 296 bytes per conntrack
+ ip_tables: (C) 2000-2002 Netfilter core team
+ arp_tables: (C) 2002 David S. Miller
+ TCP bic registered
+ Initializing IPsec netlink socket
+ NET: Registered protocol family 1
+ NET: Registered protocol family 17
+ NET: Registered protocol family 15
+ Bridge firewalling registered
+ 802.1Q VLAN Support v1.8 Ben Greear <greearb@candelatech.com>
+ All bugs added by David S. Miller <davem@redhat.com>
+ VFS: Mounted root (ext2 filesystem) readonly.
+ Freeing unused kernel memory: 224k freed
+ init started: BusyBox v1.1.0 (2007.03.04-01:07+0000) multi-call binary
+mounting filesystems...
+EXT2-fs warning: checktime reached, running e2fsck is recommended
+ loading script...
+setting up network...
+eth0: link now 1000F mbps, full duplex and up.
+ waiting for server...server ready
+starting test...
+netperf warmup
+/benchmarks/netperf-bin/netperf -H 10.0.0.1 -t TCP_STREAM -l -100k
+TCP STREAM TEST to 10.0.0.1 : dirty data
+Recv Send Send
+Socket Socket Message Elapsed
+Size Size Size Time Throughput
+bytes bytes bytes secs. 10^6bits/sec
+
+5000000 5000000 5000000 1.29 30.91
+netperf benchmark
+/benchmarks/netperf-bin/netperf -H 10.0.0.1 -t TCP_STREAM -k16384,0 -K16384,0 -- -m 65536 -M 65536 -s 262144 -S 262144
+TCP STREAM TEST to 10.0.0.1 : dirty data