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authorNilay Vaish <nilay@cs.wisc.edu>2014-10-11 16:18:51 -0500
committerNilay Vaish <nilay@cs.wisc.edu>2014-10-11 16:18:51 -0500
commit1efe42fa97ed03662666cafee1b9dec9dfe524e9 (patch)
treedd35dfa8f257445840ea3afe71ebdce4d8e4030e /tests/quick/fs/80.netperf-stream
parent8e07b36d2b6c1db8c4196336acc66d16e63f8ff3 (diff)
downloadgem5-1efe42fa97ed03662666cafee1b9dec9dfe524e9.tar.xz
stats: updates due to changes to x86, stale configs.
Diffstat (limited to 'tests/quick/fs/80.netperf-stream')
-rw-r--r--tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini20
1 files changed, 10 insertions, 10 deletions
diff --git a/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini b/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini
index c8bf9fdf3..d12ae3672 100644
--- a/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini
+++ b/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini
@@ -74,9 +74,6 @@ max_loads_any_thread=0
numThreads=1
profile=0
progress_interval=0
-simpoint_interval=100000000
-simpoint_profile=false
-simpoint_profile_file=simpoint.bb.gz
simpoint_start_insts=
simulate_data_stalls=false
simulate_inst_stalls=false
@@ -191,7 +188,7 @@ master=drivesys.membus.slave[3]
slave=drivesys.iobus.master[29]
[drivesys.iobus]
-type=NoncoherentBus
+type=NoncoherentXBar
clk_domain=drivesys.clk_domain
eventq_index=0
header_cycles=1
@@ -202,11 +199,12 @@ master=drivesys.tsunami.cchip.pio drivesys.tsunami.pchip.pio drivesys.tsunami.fa
slave=drivesys.bridge.master drivesys.tsunami.ide.dma drivesys.tsunami.ethernet.dma
[drivesys.membus]
-type=CoherentBus
+type=CoherentXBar
children=badaddr_responder
clk_domain=drivesys.clk_domain
eventq_index=0
header_cycles=1
+snoop_filter=Null
system=drivesys
use_default_range=false
width=8
@@ -329,6 +327,7 @@ HeaderType=0
InterruptLine=30
InterruptPin=1
LatencyTimer=0
+LegacyIOBase=0
MSICAPBaseOffset=0
MSICAPCapId=0
MSICAPMaskBits=0
@@ -793,6 +792,7 @@ HeaderType=0
InterruptLine=31
InterruptPin=1
LatencyTimer=0
+LegacyIOBase=0
MSICAPBaseOffset=0
MSICAPCapId=0
MSICAPMaskBits=0
@@ -1003,9 +1003,6 @@ max_loads_any_thread=0
numThreads=1
profile=0
progress_interval=0
-simpoint_interval=100000000
-simpoint_profile=false
-simpoint_profile_file=simpoint.bb.gz
simpoint_start_insts=
simulate_data_stalls=false
simulate_inst_stalls=false
@@ -1120,7 +1117,7 @@ master=testsys.membus.slave[3]
slave=testsys.iobus.master[29]
[testsys.iobus]
-type=NoncoherentBus
+type=NoncoherentXBar
clk_domain=testsys.clk_domain
eventq_index=0
header_cycles=1
@@ -1131,11 +1128,12 @@ master=testsys.tsunami.cchip.pio testsys.tsunami.pchip.pio testsys.tsunami.fake_
slave=testsys.bridge.master testsys.tsunami.ide.dma testsys.tsunami.ethernet.dma
[testsys.membus]
-type=CoherentBus
+type=CoherentXBar
children=badaddr_responder
clk_domain=testsys.clk_domain
eventq_index=0
header_cycles=1
+snoop_filter=Null
system=testsys
use_default_range=false
width=8
@@ -1258,6 +1256,7 @@ HeaderType=0
InterruptLine=30
InterruptPin=1
LatencyTimer=0
+LegacyIOBase=0
MSICAPBaseOffset=0
MSICAPCapId=0
MSICAPMaskBits=0
@@ -1722,6 +1721,7 @@ HeaderType=0
InterruptLine=31
InterruptPin=1
LatencyTimer=0
+LegacyIOBase=0
MSICAPBaseOffset=0
MSICAPCapId=0
MSICAPMaskBits=0