diff options
author | Andreas Hansson <andreas.hansson@arm.com> | 2016-10-19 06:20:04 -0400 |
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committer | Andreas Hansson <andreas.hansson@arm.com> | 2016-10-19 06:20:04 -0400 |
commit | 607c2772915628c2c67c1c5bfdefaa33ae66a06e (patch) | |
tree | f8f23fd4012f9a0053d65ac91792a7dc61d6baff /tests/quick/fs/80.netperf-stream | |
parent | 71c982ff708cc3adc7c0eccf536fea34c20cc5f0 (diff) | |
download | gem5-607c2772915628c2c67c1c5bfdefaa33ae66a06e.tar.xz |
stats: Update stats to reflect recent changes to floats
Mostly just splitting out the floats ops and corresponding
reads/writes.
Diffstat (limited to 'tests/quick/fs/80.netperf-stream')
-rw-r--r-- | tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt | 44 |
1 files changed, 30 insertions, 14 deletions
diff --git a/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt b/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt index e660dd01c..ceada1391 100644 --- a/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt +++ b/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.200409 # Nu sim_ticks 200409271000 # Number of ticks simulated final_tick 4321213476000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 11448115 # Simulator instruction rate (inst/s) -host_op_rate 11448111 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 4380279881 # Simulator tick rate (ticks/s) -host_mem_usage 499724 # Number of bytes of host memory used -host_seconds 45.75 # Real time elapsed on the host +host_inst_rate 19542475 # Simulator instruction rate (inst/s) +host_op_rate 19542467 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 7477344580 # Simulator tick rate (ticks/s) +host_mem_usage 503180 # Number of bytes of host memory used +host_seconds 26.80 # Real time elapsed on the host sim_insts 523780905 # Number of instructions simulated sim_ops 523780905 # Number of ops (including micro ops) simulated drivesys.voltage_domain.voltage 1 # Voltage in Volts @@ -178,7 +178,9 @@ drivesys.cpu.op_class::FloatAdd 141 0.00% 63.95% # Cl drivesys.cpu.op_class::FloatCmp 0 0.00% 63.95% # Class of executed instruction drivesys.cpu.op_class::FloatCvt 0 0.00% 63.95% # Class of executed instruction drivesys.cpu.op_class::FloatMult 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::FloatMultAcc 0 0.00% 63.95% # Class of executed instruction drivesys.cpu.op_class::FloatDiv 23 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::FloatMisc 0 0.00% 63.95% # Class of executed instruction drivesys.cpu.op_class::FloatSqrt 0 0.00% 63.95% # Class of executed instruction drivesys.cpu.op_class::SimdAdd 0 0.00% 63.95% # Class of executed instruction drivesys.cpu.op_class::SimdAddAcc 0 0.00% 63.95% # Class of executed instruction @@ -200,8 +202,10 @@ drivesys.cpu.op_class::SimdFloatMisc 0 0.00% 63.95% # Cl drivesys.cpu.op_class::SimdFloatMult 0 0.00% 63.95% # Class of executed instruction drivesys.cpu.op_class::SimdFloatMultAcc 0 0.00% 63.95% # Class of executed instruction drivesys.cpu.op_class::SimdFloatSqrt 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::MemRead 4026028 21.13% 85.08% # Class of executed instruction -drivesys.cpu.op_class::MemWrite 2085021 10.94% 96.02% # Class of executed instruction +drivesys.cpu.op_class::MemRead 4025389 21.13% 85.08% # Class of executed instruction +drivesys.cpu.op_class::MemWrite 2084412 10.94% 96.02% # Class of executed instruction +drivesys.cpu.op_class::FloatMemRead 639 0.00% 96.02% # Class of executed instruction +drivesys.cpu.op_class::FloatMemWrite 609 0.00% 96.02% # Class of executed instruction drivesys.cpu.op_class::IprAccess 757336 3.98% 100.00% # Class of executed instruction drivesys.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction drivesys.cpu.op_class::total 19051393 # Class of executed instruction @@ -532,7 +536,9 @@ testsys.cpu.op_class::FloatAdd 4655 0.02% 63.60% # Cl testsys.cpu.op_class::FloatCmp 1 0.00% 63.60% # Class of executed instruction testsys.cpu.op_class::FloatCvt 0 0.00% 63.60% # Class of executed instruction testsys.cpu.op_class::FloatMult 0 0.00% 63.60% # Class of executed instruction +testsys.cpu.op_class::FloatMultAcc 0 0.00% 63.60% # Class of executed instruction testsys.cpu.op_class::FloatDiv 922 0.00% 63.60% # Class of executed instruction +testsys.cpu.op_class::FloatMisc 0 0.00% 63.60% # Class of executed instruction testsys.cpu.op_class::FloatSqrt 0 0.00% 63.60% # Class of executed instruction testsys.cpu.op_class::SimdAdd 0 0.00% 63.60% # Class of executed instruction testsys.cpu.op_class::SimdAddAcc 0 0.00% 63.60% # Class of executed instruction @@ -554,8 +560,10 @@ testsys.cpu.op_class::SimdFloatMisc 0 0.00% 63.60% # Cl testsys.cpu.op_class::SimdFloatMult 0 0.00% 63.60% # Class of executed instruction testsys.cpu.op_class::SimdFloatMultAcc 0 0.00% 63.60% # Class of executed instruction testsys.cpu.op_class::SimdFloatSqrt 0 0.00% 63.60% # Class of executed instruction -testsys.cpu.op_class::MemRead 4230485 20.88% 84.48% # Class of executed instruction -testsys.cpu.op_class::MemWrite 2319388 11.45% 95.93% # Class of executed instruction +testsys.cpu.op_class::MemRead 4224290 20.85% 84.45% # Class of executed instruction +testsys.cpu.op_class::MemWrite 2313781 11.42% 95.87% # Class of executed instruction +testsys.cpu.op_class::FloatMemRead 6195 0.03% 95.90% # Class of executed instruction +testsys.cpu.op_class::FloatMemWrite 5607 0.03% 95.93% # Class of executed instruction testsys.cpu.op_class::IprAccess 824126 4.07% 100.00% # Class of executed instruction testsys.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction testsys.cpu.op_class::total 20261020 # Class of executed instruction @@ -721,11 +729,11 @@ sim_seconds 0.000407 # Nu sim_ticks 407341500 # Number of ticks simulated final_tick 4321620817500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 5887840528 # Simulator instruction rate (inst/s) -host_op_rate 5886957075 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 4576964640 # Simulator tick rate (ticks/s) -host_mem_usage 499724 # Number of bytes of host memory used -host_seconds 0.09 # Real time elapsed on the host +host_inst_rate 9980587708 # Simulator instruction rate (inst/s) +host_op_rate 9978728931 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 7757989630 # Simulator tick rate (ticks/s) +host_mem_usage 503180 # Number of bytes of host memory used +host_seconds 0.05 # Real time elapsed on the host sim_insts 523853183 # Number of instructions simulated sim_ops 523853183 # Number of ops (including micro ops) simulated drivesys.voltage_domain.voltage 1 # Voltage in Volts @@ -874,7 +882,9 @@ drivesys.cpu.op_class::FloatAdd 0 0.00% 63.60% # Cl drivesys.cpu.op_class::FloatCmp 0 0.00% 63.60% # Class of executed instruction drivesys.cpu.op_class::FloatCvt 0 0.00% 63.60% # Class of executed instruction drivesys.cpu.op_class::FloatMult 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::FloatMultAcc 0 0.00% 63.60% # Class of executed instruction drivesys.cpu.op_class::FloatDiv 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::FloatMisc 0 0.00% 63.60% # Class of executed instruction drivesys.cpu.op_class::FloatSqrt 0 0.00% 63.60% # Class of executed instruction drivesys.cpu.op_class::SimdAdd 0 0.00% 63.60% # Class of executed instruction drivesys.cpu.op_class::SimdAddAcc 0 0.00% 63.60% # Class of executed instruction @@ -898,6 +908,8 @@ drivesys.cpu.op_class::SimdFloatMultAcc 0 0.00% 63.60% # Cl drivesys.cpu.op_class::SimdFloatSqrt 0 0.00% 63.60% # Class of executed instruction drivesys.cpu.op_class::MemRead 7678 21.24% 84.84% # Class of executed instruction drivesys.cpu.op_class::MemWrite 3936 10.89% 95.73% # Class of executed instruction +drivesys.cpu.op_class::FloatMemRead 0 0.00% 95.73% # Class of executed instruction +drivesys.cpu.op_class::FloatMemWrite 0 0.00% 95.73% # Class of executed instruction drivesys.cpu.op_class::IprAccess 1545 4.27% 100.00% # Class of executed instruction drivesys.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction drivesys.cpu.op_class::total 36152 # Class of executed instruction @@ -1179,7 +1191,9 @@ testsys.cpu.op_class::FloatAdd 0 0.00% 63.58% # Cl testsys.cpu.op_class::FloatCmp 0 0.00% 63.58% # Class of executed instruction testsys.cpu.op_class::FloatCvt 0 0.00% 63.58% # Class of executed instruction testsys.cpu.op_class::FloatMult 0 0.00% 63.58% # Class of executed instruction +testsys.cpu.op_class::FloatMultAcc 0 0.00% 63.58% # Class of executed instruction testsys.cpu.op_class::FloatDiv 0 0.00% 63.58% # Class of executed instruction +testsys.cpu.op_class::FloatMisc 0 0.00% 63.58% # Class of executed instruction testsys.cpu.op_class::FloatSqrt 0 0.00% 63.58% # Class of executed instruction testsys.cpu.op_class::SimdAdd 0 0.00% 63.58% # Class of executed instruction testsys.cpu.op_class::SimdAddAcc 0 0.00% 63.58% # Class of executed instruction @@ -1203,6 +1217,8 @@ testsys.cpu.op_class::SimdFloatMultAcc 0 0.00% 63.58% # Cl testsys.cpu.op_class::SimdFloatSqrt 0 0.00% 63.58% # Class of executed instruction testsys.cpu.op_class::MemRead 7674 21.24% 84.82% # Class of executed instruction testsys.cpu.op_class::MemWrite 3938 10.90% 95.72% # Class of executed instruction +testsys.cpu.op_class::FloatMemRead 0 0.00% 95.72% # Class of executed instruction +testsys.cpu.op_class::FloatMemWrite 0 0.00% 95.72% # Class of executed instruction testsys.cpu.op_class::IprAccess 1545 4.28% 100.00% # Class of executed instruction testsys.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction testsys.cpu.op_class::total 36126 # Class of executed instruction |