diff options
| author | Nilay Vaish <nilay@cs.wisc.edu> | 2015-04-03 11:42:11 -0500 |
|---|---|---|
| committer | Nilay Vaish <nilay@cs.wisc.edu> | 2015-04-03 11:42:11 -0500 |
| commit | b5770ff5e06a2ef169a648c2abb72dde488dec98 (patch) | |
| tree | 8f90961330e57138a024d1b4d6c480ff93136c9c /tests/quick/fs | |
| parent | 4bdbdd84136d75272cb1df6444746c8ff669893e (diff) | |
| download | gem5-b5770ff5e06a2ef169a648c2abb72dde488dec98.tar.xz | |
stats: updates due to recent changesets.
Diffstat (limited to 'tests/quick/fs')
2 files changed, 1168 insertions, 1168 deletions
diff --git a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-checkpoint/stats.txt b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-checkpoint/stats.txt index 68d3c4919..52df6c391 100644 --- a/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-checkpoint/stats.txt +++ b/tests/quick/fs/10.linux-boot/ref/arm/linux/realview-simple-atomic-checkpoint/stats.txt @@ -1,127 +1,76 @@ ---------- Begin Simulation Statistics ---------- +sim_seconds 2.783867 # Number of seconds simulated +sim_ticks 2783867052000 # Number of ticks simulated final_tick 2783867052000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) -host_inst_rate 976886 # Simulator instruction rate (inst/s) -host_mem_usage 567972 # Number of bytes of host memory used -host_op_rate 1189202 # Simulator op (including micro ops) rate (op/s) -host_seconds 146.15 # Real time elapsed on the host -host_tick_rate 19047880334 # Simulator tick rate (ticks/s) sim_freq 1000000000000 # Frequency of simulated ticks +host_inst_rate 903946 # Simulator instruction rate (inst/s) +host_op_rate 1100409 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 17625645989 # Simulator tick rate (ticks/s) +host_mem_usage 615176 # Number of bytes of host memory used +host_seconds 157.94 # Real time elapsed on the host sim_insts 142772879 # Number of instructions simulated sim_ops 173803124 # Number of ops (including micro ops) simulated -sim_seconds 2.783867 # Number of seconds simulated -sim_ticks 2783867052000 # Number of ticks simulated -system.cf0.dma_read_bytes 1024 # Number of bytes transfered via DMA reads (not PRD). +system.voltage_domain.voltage 1 # Voltage in Volts +system.clk_domain.clock 1000 # Clock period in ticks +system.physmem.bytes_read::cpu.dtb.walker 448 # Number of bytes read from this memory +system.physmem.bytes_read::cpu.itb.walker 128 # Number of bytes read from this memory +system.physmem.bytes_read::cpu.inst 1210788 # Number of bytes read from this memory +system.physmem.bytes_read::cpu.data 10328292 # Number of bytes read from this memory +system.physmem.bytes_read::realview.ide 960 # Number of bytes read from this memory +system.physmem.bytes_read::total 11540616 # Number of bytes read from this memory +system.physmem.bytes_inst_read::cpu.inst 1210788 # Number of instructions bytes read from this memory +system.physmem.bytes_inst_read::total 1210788 # Number of instructions bytes read from this memory +system.physmem.bytes_written::writebacks 8837568 # Number of bytes written to this memory +system.physmem.bytes_written::cpu.data 17524 # Number of bytes written to this memory +system.physmem.bytes_written::total 8855092 # Number of bytes written to this memory +system.physmem.num_reads::cpu.dtb.walker 7 # Number of read requests responded to by this memory +system.physmem.num_reads::cpu.itb.walker 2 # Number of read requests responded to by this memory +system.physmem.num_reads::cpu.inst 27372 # Number of read requests responded to by this memory +system.physmem.num_reads::cpu.data 161899 # Number of read requests responded to by this memory +system.physmem.num_reads::realview.ide 15 # Number of read requests responded to by this memory +system.physmem.num_reads::total 189295 # Number of read requests responded to by this memory +system.physmem.num_writes::writebacks 138087 # Number of write requests responded to by this memory +system.physmem.num_writes::cpu.data 4381 # Number of write requests responded to by this memory +system.physmem.num_writes::total 142468 # Number of write requests responded to by this memory +system.physmem.bw_read::cpu.dtb.walker 161 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::cpu.itb.walker 46 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::cpu.inst 434930 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::cpu.data 3710052 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::realview.ide 345 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_read::total 4145534 # Total read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read::cpu.inst 434930 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_inst_read::total 434930 # Instruction read bandwidth from this memory (bytes/s) +system.physmem.bw_write::writebacks 3174565 # Write bandwidth from this memory (bytes/s) +system.physmem.bw_write::cpu.data 6295 # Write bandwidth from this memory (bytes/s) +system.physmem.bw_write::total 3180860 # Write bandwidth from this memory (bytes/s) +system.physmem.bw_total::writebacks 3174565 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu.dtb.walker 161 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu.itb.walker 46 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu.inst 434930 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::cpu.data 3716347 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::realview.ide 345 # Total bandwidth to/from this memory (bytes/s) +system.physmem.bw_total::total 7326394 # Total bandwidth to/from this memory (bytes/s) +system.realview.nvmem.bytes_read::cpu.inst 20 # Number of bytes read from this memory +system.realview.nvmem.bytes_read::total 20 # Number of bytes read from this memory +system.realview.nvmem.bytes_inst_read::cpu.inst 20 # Number of instructions bytes read from this memory +system.realview.nvmem.bytes_inst_read::total 20 # Number of instructions bytes read from this memory +system.realview.nvmem.num_reads::cpu.inst 5 # Number of read requests responded to by this memory +system.realview.nvmem.num_reads::total 5 # Number of read requests responded to by this memory +system.realview.nvmem.bw_read::cpu.inst 7 # Total read bandwidth from this memory (bytes/s) +system.realview.nvmem.bw_read::total 7 # Total read bandwidth from this memory (bytes/s) +system.realview.nvmem.bw_inst_read::cpu.inst 7 # Instruction read bandwidth from this memory (bytes/s) +system.realview.nvmem.bw_inst_read::total 7 # Instruction read bandwidth from this memory (bytes/s) +system.realview.nvmem.bw_total::cpu.inst 7 # Total bandwidth to/from this memory (bytes/s) +system.realview.nvmem.bw_total::total 7 # Total bandwidth to/from this memory (bytes/s) system.cf0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). +system.cf0.dma_read_bytes 1024 # Number of bytes transfered via DMA reads (not PRD). system.cf0.dma_read_txs 1 # Number of DMA read transactions (not PRD). -system.cf0.dma_write_bytes 2318336 # Number of bytes transfered via DMA writes. system.cf0.dma_write_full_pages 540 # Number of full page size DMA writes. +system.cf0.dma_write_bytes 2318336 # Number of bytes transfered via DMA writes. system.cf0.dma_write_txs 631 # Number of DMA write transactions. -system.clk_domain.clock 1000 # Clock period in ticks -system.cpu.Branches 36396981 # Number of branches fetched -system.cpu.committedInsts 142772879 # Number of instructions committed -system.cpu.committedOps 173803124 # Number of ops (including micro ops) committed -system.cpu.dcache.LoadLockedReq_accesses::cpu.data 465959 # number of LoadLockedReq accesses(hits+misses) -system.cpu.dcache.LoadLockedReq_accesses::total 465959 # number of LoadLockedReq accesses(hits+misses) -system.cpu.dcache.LoadLockedReq_hits::cpu.data 457347 # number of LoadLockedReq hits -system.cpu.dcache.LoadLockedReq_hits::total 457347 # number of LoadLockedReq hits -system.cpu.dcache.LoadLockedReq_miss_rate::cpu.data 0.018482 # miss rate for LoadLockedReq accesses -system.cpu.dcache.LoadLockedReq_miss_rate::total 0.018482 # miss rate for LoadLockedReq accesses -system.cpu.dcache.LoadLockedReq_misses::cpu.data 8612 # number of LoadLockedReq misses -system.cpu.dcache.LoadLockedReq_misses::total 8612 # number of LoadLockedReq misses -system.cpu.dcache.ReadReq_accesses::cpu.data 30525328 # number of ReadReq accesses(hits+misses) -system.cpu.dcache.ReadReq_accesses::total 30525328 # number of ReadReq accesses(hits+misses) -system.cpu.dcache.ReadReq_hits::cpu.data 30129052 # number of ReadReq hits -system.cpu.dcache.ReadReq_hits::total 30129052 # number of ReadReq hits -system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.012982 # miss rate for ReadReq accesses -system.cpu.dcache.ReadReq_miss_rate::total 0.012982 # miss rate for ReadReq accesses -system.cpu.dcache.ReadReq_misses::cpu.data 396276 # number of ReadReq misses -system.cpu.dcache.ReadReq_misses::total 396276 # number of ReadReq misses -system.cpu.dcache.SoftPFReq_accesses::cpu.data 511200 # number of SoftPFReq accesses(hits+misses) -system.cpu.dcache.SoftPFReq_accesses::total 511200 # number of SoftPFReq accesses(hits+misses) -system.cpu.dcache.SoftPFReq_hits::cpu.data 395080 # number of SoftPFReq hits -system.cpu.dcache.SoftPFReq_hits::total 395080 # number of SoftPFReq hits -system.cpu.dcache.SoftPFReq_miss_rate::cpu.data 0.227152 # miss rate for SoftPFReq accesses -system.cpu.dcache.SoftPFReq_miss_rate::total 0.227152 # miss rate for SoftPFReq accesses -system.cpu.dcache.SoftPFReq_misses::cpu.data 116120 # number of SoftPFReq misses -system.cpu.dcache.SoftPFReq_misses::total 116120 # number of SoftPFReq misses -system.cpu.dcache.StoreCondReq_accesses::cpu.data 460138 # number of StoreCondReq accesses(hits+misses) -system.cpu.dcache.StoreCondReq_accesses::total 460138 # number of StoreCondReq accesses(hits+misses) -system.cpu.dcache.StoreCondReq_hits::cpu.data 460136 # number of StoreCondReq hits -system.cpu.dcache.StoreCondReq_hits::total 460136 # number of StoreCondReq hits -system.cpu.dcache.StoreCondReq_miss_rate::cpu.data 0.000004 # miss rate for StoreCondReq accesses -system.cpu.dcache.StoreCondReq_miss_rate::total 0.000004 # miss rate for StoreCondReq accesses -system.cpu.dcache.StoreCondReq_misses::cpu.data 2 # number of StoreCondReq misses -system.cpu.dcache.StoreCondReq_misses::total 2 # number of StoreCondReq misses -system.cpu.dcache.WriteReq_accesses::cpu.data 22641788 # number of WriteReq accesses(hits+misses) -system.cpu.dcache.WriteReq_accesses::total 22641788 # number of WriteReq accesses(hits+misses) -system.cpu.dcache.WriteReq_hits::cpu.data 22340110 # number of WriteReq hits -system.cpu.dcache.WriteReq_hits::total 22340110 # number of WriteReq hits -system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.013324 # miss rate for WriteReq accesses -system.cpu.dcache.WriteReq_miss_rate::total 0.013324 # miss rate for WriteReq accesses -system.cpu.dcache.WriteReq_misses::cpu.data 301678 # number of WriteReq misses -system.cpu.dcache.WriteReq_misses::total 301678 # number of WriteReq misses -system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked -system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked -system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked -system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked -system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked -system.cpu.dcache.cache_copies 0 # number of cache copies performed -system.cpu.dcache.demand_accesses::cpu.data 53167116 # number of demand (read+write) accesses -system.cpu.dcache.demand_accesses::total 53167116 # number of demand (read+write) accesses -system.cpu.dcache.demand_hits::cpu.data 52469162 # number of demand (read+write) hits -system.cpu.dcache.demand_hits::total 52469162 # number of demand (read+write) hits -system.cpu.dcache.demand_miss_rate::cpu.data 0.013128 # miss rate for demand accesses -system.cpu.dcache.demand_miss_rate::total 0.013128 # miss rate for demand accesses -system.cpu.dcache.demand_misses::cpu.data 697954 # number of demand (read+write) misses -system.cpu.dcache.demand_misses::total 697954 # number of demand (read+write) misses -system.cpu.dcache.fast_writes 0 # number of fast writes performed -system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.dcache.overall_accesses::cpu.data 53678316 # number of overall (read+write) accesses -system.cpu.dcache.overall_accesses::total 53678316 # number of overall (read+write) accesses -system.cpu.dcache.overall_hits::cpu.data 52864242 # number of overall hits -system.cpu.dcache.overall_hits::total 52864242 # number of overall hits -system.cpu.dcache.overall_miss_rate::cpu.data 0.015166 # miss rate for overall accesses -system.cpu.dcache.overall_miss_rate::total 0.015166 # miss rate for overall accesses -system.cpu.dcache.overall_misses::cpu.data 814074 # number of overall misses -system.cpu.dcache.overall_misses::total 814074 # number of overall misses -system.cpu.dcache.tags.age_task_id_blocks_1024::0 286 # Occupied blocks per task id -system.cpu.dcache.tags.age_task_id_blocks_1024::1 196 # Occupied blocks per task id -system.cpu.dcache.tags.age_task_id_blocks_1024::2 30 # Occupied blocks per task id -system.cpu.dcache.tags.avg_refs 65.597713 # Average number of references to valid blocks. -system.cpu.dcache.tags.data_accesses 219237582 # Number of data accesses -system.cpu.dcache.tags.occ_blocks::cpu.data 511.997174 # Average occupied blocks per requestor -system.cpu.dcache.tags.occ_percent::cpu.data 0.999994 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_percent::total 0.999994 # Average percentage of cache occupancy -system.cpu.dcache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id -system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id -system.cpu.dcache.tags.replacements 819402 # number of replacements -system.cpu.dcache.tags.sampled_refs 819914 # Sample count of references to valid blocks. -system.cpu.dcache.tags.tag_accesses 219237582 # Number of tag accesses -system.cpu.dcache.tags.tagsinuse 511.997174 # Cycle average of tags in use -system.cpu.dcache.tags.total_refs 53784483 # Total number of references to valid blocks. -system.cpu.dcache.tags.warmup_cycle 23053500 # Cycle when the warmup percentage was hit. -system.cpu.dcache.writebacks::writebacks 682059 # number of writebacks -system.cpu.dcache.writebacks::total 682059 # number of writebacks -system.cpu.dstage2_mmu.stage2_tlb.accesses 0 # DTB accesses -system.cpu.dstage2_mmu.stage2_tlb.align_faults 0 # Number of TLB faults due to alignment restrictions -system.cpu.dstage2_mmu.stage2_tlb.domain_faults 0 # Number of TLB faults due to domain restrictions -system.cpu.dstage2_mmu.stage2_tlb.flush_entries 0 # Number of entries that have been flushed from TLB -system.cpu.dstage2_mmu.stage2_tlb.flush_tlb 0 # Number of times complete TLB was flushed -system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID -system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA -system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID -system.cpu.dstage2_mmu.stage2_tlb.hits 0 # DTB hits -system.cpu.dstage2_mmu.stage2_tlb.inst_accesses 0 # ITB inst accesses -system.cpu.dstage2_mmu.stage2_tlb.inst_hits 0 # ITB inst hits -system.cpu.dstage2_mmu.stage2_tlb.inst_misses 0 # ITB inst misses -system.cpu.dstage2_mmu.stage2_tlb.misses 0 # DTB misses -system.cpu.dstage2_mmu.stage2_tlb.perms_faults 0 # Number of TLB faults due to permissions restrictions -system.cpu.dstage2_mmu.stage2_tlb.prefetch_faults 0 # Number of TLB faults due to prefetch -system.cpu.dstage2_mmu.stage2_tlb.read_accesses 0 # DTB read accesses -system.cpu.dstage2_mmu.stage2_tlb.read_hits 0 # DTB read hits -system.cpu.dstage2_mmu.stage2_tlb.read_misses 0 # DTB read misses +system.cpu_clk_domain.clock 500 # Clock period in ticks +system.cpu.dstage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total 0 # Table walker requests started/completed, data/inst @@ -129,28 +78,35 @@ system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total 0 # Table walker requests started/completed, data/inst system.cpu.dstage2_mmu.stage2_tlb.walker.walkRequestOrigin::total 0 # Table walker requests started/completed, data/inst -system.cpu.dstage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested -system.cpu.dstage2_mmu.stage2_tlb.write_accesses 0 # DTB write accesses +system.cpu.dstage2_mmu.stage2_tlb.inst_hits 0 # ITB inst hits +system.cpu.dstage2_mmu.stage2_tlb.inst_misses 0 # ITB inst misses +system.cpu.dstage2_mmu.stage2_tlb.read_hits 0 # DTB read hits +system.cpu.dstage2_mmu.stage2_tlb.read_misses 0 # DTB read misses system.cpu.dstage2_mmu.stage2_tlb.write_hits 0 # DTB write hits system.cpu.dstage2_mmu.stage2_tlb.write_misses 0 # DTB write misses -system.cpu.dtb.accesses 54660704 # DTB accesses -system.cpu.dtb.align_faults 0 # Number of TLB faults due to alignment restrictions -system.cpu.dtb.domain_faults 0 # Number of TLB faults due to domain restrictions -system.cpu.dtb.flush_entries 4349 # Number of entries that have been flushed from TLB -system.cpu.dtb.flush_tlb 64 # Number of times complete TLB was flushed -system.cpu.dtb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID -system.cpu.dtb.flush_tlb_mva 917 # Number of times TLB was flushed by MVA -system.cpu.dtb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID -system.cpu.dtb.hits 54650675 # DTB hits -system.cpu.dtb.inst_accesses 0 # ITB inst accesses -system.cpu.dtb.inst_hits 0 # ITB inst hits -system.cpu.dtb.inst_misses 0 # ITB inst misses -system.cpu.dtb.misses 10029 # DTB misses -system.cpu.dtb.perms_faults 445 # Number of TLB faults due to permissions restrictions -system.cpu.dtb.prefetch_faults 1613 # Number of TLB faults due to prefetch -system.cpu.dtb.read_accesses 31534804 # DTB read accesses -system.cpu.dtb.read_hits 31526223 # DTB read hits -system.cpu.dtb.read_misses 8581 # DTB read misses +system.cpu.dstage2_mmu.stage2_tlb.flush_tlb 0 # Number of times complete TLB was flushed +system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA +system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID +system.cpu.dstage2_mmu.stage2_tlb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID +system.cpu.dstage2_mmu.stage2_tlb.flush_entries 0 # Number of entries that have been flushed from TLB +system.cpu.dstage2_mmu.stage2_tlb.align_faults 0 # Number of TLB faults due to alignment restrictions +system.cpu.dstage2_mmu.stage2_tlb.prefetch_faults 0 # Number of TLB faults due to prefetch +system.cpu.dstage2_mmu.stage2_tlb.domain_faults 0 # Number of TLB faults due to domain restrictions +system.cpu.dstage2_mmu.stage2_tlb.perms_faults 0 # Number of TLB faults due to permissions restrictions +system.cpu.dstage2_mmu.stage2_tlb.read_accesses 0 # DTB read accesses +system.cpu.dstage2_mmu.stage2_tlb.write_accesses 0 # DTB write accesses +system.cpu.dstage2_mmu.stage2_tlb.inst_accesses 0 # ITB inst accesses +system.cpu.dstage2_mmu.stage2_tlb.hits 0 # DTB hits +system.cpu.dstage2_mmu.stage2_tlb.misses 0 # DTB misses +system.cpu.dstage2_mmu.stage2_tlb.accesses 0 # DTB accesses +system.cpu.dtb.walker.walks 10029 # Table walker walks requested +system.cpu.dtb.walker.walksShort 10029 # Table walker walks initiated with short descriptors +system.cpu.dtb.walker.walkWaitTime::samples 10029 # Table walker wait (enqueue to first request) latency +system.cpu.dtb.walker.walkWaitTime::0 10029 100.00% 100.00% # Table walker wait (enqueue to first request) latency +system.cpu.dtb.walker.walkWaitTime::total 10029 # Table walker wait (enqueue to first request) latency +system.cpu.dtb.walker.walksPending::samples 6705500 # Table walker pending requests distribution +system.cpu.dtb.walker.walksPending::0 6705500 100.00% 100.00% # Table walker pending requests distribution +system.cpu.dtb.walker.walksPending::total 6705500 # Table walker pending requests distribution system.cpu.dtb.walker.walkPageSizes::4K 6354 80.79% 80.79% # Table walker page sizes translated system.cpu.dtb.walker.walkPageSizes::1M 1511 19.21% 100.00% # Table walker page sizes translated system.cpu.dtb.walker.walkPageSizes::total 7865 # Table walker page sizes translated @@ -161,86 +117,28 @@ system.cpu.dtb.walker.walkRequestOrigin_Completed::Data 7865 system.cpu.dtb.walker.walkRequestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst system.cpu.dtb.walker.walkRequestOrigin_Completed::total 7865 # Table walker requests started/completed, data/inst system.cpu.dtb.walker.walkRequestOrigin::total 17894 # Table walker requests started/completed, data/inst -system.cpu.dtb.walker.walkWaitTime::samples 10029 # Table walker wait (enqueue to first request) latency -system.cpu.dtb.walker.walkWaitTime::0 10029 100.00% 100.00% # Table walker wait (enqueue to first request) latency -system.cpu.dtb.walker.walkWaitTime::total 10029 # Table walker wait (enqueue to first request) latency -system.cpu.dtb.walker.walks 10029 # Table walker walks requested -system.cpu.dtb.walker.walksPending::samples 6705500 # Table walker pending requests distribution -system.cpu.dtb.walker.walksPending::0 6705500 100.00% 100.00% # Table walker pending requests distribution -system.cpu.dtb.walker.walksPending::total 6705500 # Table walker pending requests distribution -system.cpu.dtb.walker.walksShort 10029 # Table walker walks initiated with short descriptors -system.cpu.dtb.write_accesses 23125900 # DTB write accesses +system.cpu.dtb.inst_hits 0 # ITB inst hits +system.cpu.dtb.inst_misses 0 # ITB inst misses +system.cpu.dtb.read_hits 31526223 # DTB read hits +system.cpu.dtb.read_misses 8581 # DTB read misses system.cpu.dtb.write_hits 23124452 # DTB write hits system.cpu.dtb.write_misses 1448 # DTB write misses -system.cpu.icache.ReadReq_accesses::cpu.inst 147042453 # number of ReadReq accesses(hits+misses) -system.cpu.icache.ReadReq_accesses::total 147042453 # number of ReadReq accesses(hits+misses) -system.cpu.icache.ReadReq_hits::cpu.inst 145342721 # number of ReadReq hits -system.cpu.icache.ReadReq_hits::total 145342721 # number of ReadReq hits -system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.011559 # miss rate for ReadReq accesses -system.cpu.icache.ReadReq_miss_rate::total 0.011559 # miss rate for ReadReq accesses -system.cpu.icache.ReadReq_misses::cpu.inst 1699732 # number of ReadReq misses -system.cpu.icache.ReadReq_misses::total 1699732 # number of ReadReq misses -system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked -system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked -system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked -system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked -system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked -system.cpu.icache.cache_copies 0 # number of cache copies performed -system.cpu.icache.demand_accesses::cpu.inst 147042453 # number of demand (read+write) accesses -system.cpu.icache.demand_accesses::total 147042453 # number of demand (read+write) accesses -system.cpu.icache.demand_hits::cpu.inst 145342721 # number of demand (read+write) hits -system.cpu.icache.demand_hits::total 145342721 # number of demand (read+write) hits -system.cpu.icache.demand_miss_rate::cpu.inst 0.011559 # miss rate for demand accesses -system.cpu.icache.demand_miss_rate::total 0.011559 # miss rate for demand accesses -system.cpu.icache.demand_misses::cpu.inst 1699732 # number of demand (read+write) misses -system.cpu.icache.demand_misses::total 1699732 # number of demand (read+write) misses -system.cpu.icache.fast_writes 0 # number of fast writes performed -system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.icache.overall_accesses::cpu.inst 147042453 # number of overall (read+write) accesses -system.cpu.icache.overall_accesses::total 147042453 # number of overall (read+write) accesses -system.cpu.icache.overall_hits::cpu.inst 145342721 # number of overall hits -system.cpu.icache.overall_hits::total 145342721 # number of overall hits -system.cpu.icache.overall_miss_rate::cpu.inst 0.011559 # miss rate for overall accesses -system.cpu.icache.overall_miss_rate::total 0.011559 # miss rate for overall accesses -system.cpu.icache.overall_misses::cpu.inst 1699732 # number of overall misses -system.cpu.icache.overall_misses::total 1699732 # number of overall misses -system.cpu.icache.tags.age_task_id_blocks_1024::0 197 # Occupied blocks per task id -system.cpu.icache.tags.age_task_id_blocks_1024::1 77 # Occupied blocks per task id -system.cpu.icache.tags.age_task_id_blocks_1024::2 233 # Occupied blocks per task id -system.cpu.icache.tags.age_task_id_blocks_1024::3 5 # Occupied blocks per task id -system.cpu.icache.tags.avg_refs 85.509500 # Average number of references to valid blocks. -system.cpu.icache.tags.data_accesses 148742185 # Number of data accesses -system.cpu.icache.tags.occ_blocks::cpu.inst 511.663681 # Average occupied blocks per requestor -system.cpu.icache.tags.occ_percent::cpu.inst 0.999343 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_percent::total 0.999343 # Average percentage of cache occupancy -system.cpu.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id -system.cpu.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id -system.cpu.icache.tags.replacements 1699214 # number of replacements -system.cpu.icache.tags.sampled_refs 1699726 # Sample count of references to valid blocks. -system.cpu.icache.tags.tag_accesses 148742185 # Number of tag accesses -system.cpu.icache.tags.tagsinuse 511.663681 # Cycle average of tags in use -system.cpu.icache.tags.total_refs 145342721 # Total number of references to valid blocks. -system.cpu.icache.tags.warmup_cycle 7831491500 # Cycle when the warmup percentage was hit. -system.cpu.idle_fraction 0.968015 # Percentage of idle cycles -system.cpu.istage2_mmu.stage2_tlb.accesses 0 # DTB accesses -system.cpu.istage2_mmu.stage2_tlb.align_faults 0 # Number of TLB faults due to alignment restrictions -system.cpu.istage2_mmu.stage2_tlb.domain_faults 0 # Number of TLB faults due to domain restrictions -system.cpu.istage2_mmu.stage2_tlb.flush_entries 0 # Number of entries that have been flushed from TLB -system.cpu.istage2_mmu.stage2_tlb.flush_tlb 0 # Number of times complete TLB was flushed -system.cpu.istage2_mmu.stage2_tlb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID -system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA -system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID -system.cpu.istage2_mmu.stage2_tlb.hits 0 # DTB hits -system.cpu.istage2_mmu.stage2_tlb.inst_accesses 0 # ITB inst accesses -system.cpu.istage2_mmu.stage2_tlb.inst_hits 0 # ITB inst hits -system.cpu.istage2_mmu.stage2_tlb.inst_misses 0 # ITB inst misses -system.cpu.istage2_mmu.stage2_tlb.misses 0 # DTB misses -system.cpu.istage2_mmu.stage2_tlb.perms_faults 0 # Number of TLB faults due to permissions restrictions -system.cpu.istage2_mmu.stage2_tlb.prefetch_faults 0 # Number of TLB faults due to prefetch -system.cpu.istage2_mmu.stage2_tlb.read_accesses 0 # DTB read accesses -system.cpu.istage2_mmu.stage2_tlb.read_hits 0 # DTB read hits -system.cpu.istage2_mmu.stage2_tlb.read_misses 0 # DTB read misses +system.cpu.dtb.flush_tlb 64 # Number of times complete TLB was flushed +system.cpu.dtb.flush_tlb_mva 917 # Number of times TLB was flushed by MVA +system.cpu.dtb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID +system.cpu.dtb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID +system.cpu.dtb.flush_entries 4349 # Number of entries that have been flushed from TLB +system.cpu.dtb.align_faults 0 # Number of TLB faults due to alignment restrictions +system.cpu.dtb.prefetch_faults 1613 # Number of TLB faults due to prefetch +system.cpu.dtb.domain_faults 0 # Number of TLB faults due to domain restrictions +system.cpu.dtb.perms_faults 445 # Number of TLB faults due to permissions restrictions +system.cpu.dtb.read_accesses 31534804 # DTB read accesses +system.cpu.dtb.write_accesses 23125900 # DTB write accesses +system.cpu.dtb.inst_accesses 0 # ITB inst accesses +system.cpu.dtb.hits 54650675 # DTB hits +system.cpu.dtb.misses 10029 # DTB misses +system.cpu.dtb.accesses 54660704 # DTB accesses +system.cpu.istage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Data 0 # Table walker requests started/completed, data/inst system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::Inst 0 # Table walker requests started/completed, data/inst system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Requested::total 0 # Table walker requests started/completed, data/inst @@ -248,28 +146,35 @@ system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Data system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::Inst 0 # Table walker requests started/completed, data/inst system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin_Completed::total 0 # Table walker requests started/completed, data/inst system.cpu.istage2_mmu.stage2_tlb.walker.walkRequestOrigin::total 0 # Table walker requests started/completed, data/inst -system.cpu.istage2_mmu.stage2_tlb.walker.walks 0 # Table walker walks requested -system.cpu.istage2_mmu.stage2_tlb.write_accesses 0 # DTB write accesses +system.cpu.istage2_mmu.stage2_tlb.inst_hits 0 # ITB inst hits +system.cpu.istage2_mmu.stage2_tlb.inst_misses 0 # ITB inst misses +system.cpu.istage2_mmu.stage2_tlb.read_hits 0 # DTB read hits +system.cpu.istage2_mmu.stage2_tlb.read_misses 0 # DTB read misses system.cpu.istage2_mmu.stage2_tlb.write_hits 0 # DTB write hits system.cpu.istage2_mmu.stage2_tlb.write_misses 0 # DTB write misses -system.cpu.itb.accesses 147044108 # DTB accesses -system.cpu.itb.align_faults 0 # Number of TLB faults due to alignment restrictions -system.cpu.itb.domain_faults 0 # Number of TLB faults due to domain restrictions -system.cpu.itb.flush_entries 2913 # Number of entries that have been flushed from TLB -system.cpu.itb.flush_tlb 64 # Number of times complete TLB was flushed -system.cpu.itb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID -system.cpu.itb.flush_tlb_mva 917 # Number of times TLB was flushed by MVA -system.cpu.itb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID -system.cpu.itb.hits 147039346 # DTB hits -system.cpu.itb.inst_accesses 147044108 # ITB inst accesses -system.cpu.itb.inst_hits 147039346 # ITB inst hits -system.cpu.itb.inst_misses 4762 # ITB inst misses -system.cpu.itb.misses 4762 # DTB misses -system.cpu.itb.perms_faults 0 # Number of TLB faults due to permissions restrictions -system.cpu.itb.prefetch_faults 0 # Number of TLB faults due to prefetch -system.cpu.itb.read_accesses 0 # DTB read accesses -system.cpu.itb.read_hits 0 # DTB read hits -system.cpu.itb.read_misses 0 # DTB read misses +system.cpu.istage2_mmu.stage2_tlb.flush_tlb 0 # Number of times complete TLB was flushed +system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva 0 # Number of times TLB was flushed by MVA +system.cpu.istage2_mmu.stage2_tlb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID +system.cpu.istage2_mmu.stage2_tlb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID +system.cpu.istage2_mmu.stage2_tlb.flush_entries 0 # Number of entries that have been flushed from TLB +system.cpu.istage2_mmu.stage2_tlb.align_faults 0 # Number of TLB faults due to alignment restrictions +system.cpu.istage2_mmu.stage2_tlb.prefetch_faults 0 # Number of TLB faults due to prefetch +system.cpu.istage2_mmu.stage2_tlb.domain_faults 0 # Number of TLB faults due to domain restrictions +system.cpu.istage2_mmu.stage2_tlb.perms_faults 0 # Number of TLB faults due to permissions restrictions +system.cpu.istage2_mmu.stage2_tlb.read_accesses 0 # DTB read accesses +system.cpu.istage2_mmu.stage2_tlb.write_accesses 0 # DTB write accesses +system.cpu.istage2_mmu.stage2_tlb.inst_accesses 0 # ITB inst accesses +system.cpu.istage2_mmu.stage2_tlb.hits 0 # DTB hits +system.cpu.istage2_mmu.stage2_tlb.misses 0 # DTB misses +system.cpu.istage2_mmu.stage2_tlb.accesses 0 # DTB accesses +system.cpu.itb.walker.walks 4762 # Table walker walks requested +system.cpu.itb.walker.walksShort 4762 # Table walker walks initiated with short descriptors +system.cpu.itb.walker.walkWaitTime::samples 4762 # Table walker wait (enqueue to first request) latency +system.cpu.itb.walker.walkWaitTime::0 4762 100.00% 100.00% # Table walker wait (enqueue to first request) latency +system.cpu.itb.walker.walkWaitTime::total 4762 # Table walker wait (enqueue to first request) latency +system.cpu.itb.walker.walksPending::samples 6702500 # Table walker pending requests distribution +system.cpu.itb.walker.walksPending::0 6702500 100.00% 100.00% # Table walker pending requests distribution +system.cpu.itb.walker.walksPending::total 6702500 # Table walker pending requests distribution system.cpu.itb.walker.walkPageSizes::4K 2798 90.05% 90.05% # Table walker page sizes translated system.cpu.itb.walker.walkPageSizes::1M 309 9.95% 100.00% # Table walker page sizes translated system.cpu.itb.walker.walkPageSizes::total 3107 # Table walker page sizes translated @@ -280,166 +185,52 @@ system.cpu.itb.walker.walkRequestOrigin_Completed::Data 0 system.cpu.itb.walker.walkRequestOrigin_Completed::Inst 3107 # Table walker requests started/completed, data/inst system.cpu.itb.walker.walkRequestOrigin_Completed::total 3107 # Table walker requests started/completed, data/inst system.cpu.itb.walker.walkRequestOrigin::total 7869 # Table walker requests started/completed, data/inst -system.cpu.itb.walker.walkWaitTime::samples 4762 # Table walker wait (enqueue to first request) latency -system.cpu.itb.walker.walkWaitTime::0 4762 100.00% 100.00% # Table walker wait (enqueue to first request) latency -system.cpu.itb.walker.walkWaitTime::total 4762 # Table walker wait (enqueue to first request) latency -system.cpu.itb.walker.walks 4762 # Table walker walks requested -system.cpu.itb.walker.walksPending::samples 6702500 # Table walker pending requests distribution -system.cpu.itb.walker.walksPending::0 6702500 100.00% 100.00% # Table walker pending requests distribution -system.cpu.itb.walker.walksPending::total 6702500 # Table walker pending requests distribution -system.cpu.itb.walker.walksShort 4762 # Table walker walks initiated with short descriptors -system.cpu.itb.write_accesses 0 # DTB write accesses +system.cpu.itb.inst_hits 147039346 # ITB inst hits +system.cpu.itb.inst_misses 4762 # ITB inst misses +system.cpu.itb.read_hits 0 # DTB read hits +system.cpu.itb.read_misses 0 # DTB read misses system.cpu.itb.write_hits 0 # DTB write hits system.cpu.itb.write_misses 0 # DTB write misses -system.cpu.kern.inst.arm 0 # number of arm instructions executed -system.cpu.kern.inst.quiesce 3083 # number of quiesce instructions executed -system.cpu.l2cache.ReadExReq_accesses::cpu.data 298922 # number of ReadExReq accesses(hits+misses) -system.cpu.l2cache.ReadExReq_accesses::total 298922 # number of ReadExReq accesses(hits+misses) -system.cpu.l2cache.ReadExReq_hits::cpu.data 151058 # number of ReadExReq hits -system.cpu.l2cache.ReadExReq_hits::total 151058 # number of ReadExReq hits -system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 0.494657 # miss rate for ReadExReq accesses -system.cpu.l2cache.ReadExReq_miss_rate::total 0.494657 # miss rate for ReadExReq accesses -system.cpu.l2cache.ReadExReq_misses::cpu.data 147864 # number of ReadExReq misses -system.cpu.l2cache.ReadExReq_misses::total 147864 # number of ReadExReq misses -system.cpu.l2cache.ReadReq_accesses::cpu.dtb.walker 7608 # number of ReadReq accesses(hits+misses) -system.cpu.l2cache.ReadReq_accesses::cpu.itb.walker 3623 # number of ReadReq accesses(hits+misses) -system.cpu.l2cache.ReadReq_accesses::cpu.inst 1699714 # number of ReadReq accesses(hits+misses) -system.cpu.l2cache.ReadReq_accesses::cpu.data 521008 # number of ReadReq accesses(hits+misses) -system.cpu.l2cache.ReadReq_accesses::total 2231953 # number of ReadReq accesses(hits+misses) -system.cpu.l2cache.ReadReq_hits::cpu.dtb.walker 7601 # number of ReadReq hits -system.cpu.l2cache.ReadReq_hits::cpu.itb.walker 3621 # number of ReadReq hits -system.cpu.l2cache.ReadReq_hits::cpu.inst 1681357 # number of ReadReq hits -system.cpu.l2cache.ReadReq_hits::cpu.data 505474 # number of ReadReq hits -system.cpu.l2cache.ReadReq_hits::total 2198053 # number of ReadReq hits -system.cpu.l2cache.ReadReq_miss_rate::cpu.dtb.walker 0.000920 # miss rate for ReadReq accesses -system.cpu.l2cache.ReadReq_miss_rate::cpu.itb.walker 0.000552 # miss rate for ReadReq accesses -system.cpu.l2cache.ReadReq_miss_rate::cpu.inst 0.010800 # miss rate for ReadReq accesses -system.cpu.l2cache.ReadReq_miss_rate::cpu.data 0.029815 # miss rate for ReadReq accesses -system.cpu.l2cache.ReadReq_miss_rate::total 0.015188 # miss rate for ReadReq accesses -system.cpu.l2cache.ReadReq_misses::cpu.dtb.walker 7 # number of ReadReq misses -system.cpu.l2cache.ReadReq_misses::cpu.itb.walker 2 # number of ReadReq misses -system.cpu.l2cache.ReadReq_misses::cpu.inst 18357 # number of ReadReq misses -system.cpu.l2cache.ReadReq_misses::cpu.data 15534 # number of ReadReq misses -system.cpu.l2cache.ReadReq_misses::total 33900 # number of ReadReq misses -system.cpu.l2cache.SCUpgradeReq_accesses::cpu.data 2 # number of SCUpgradeReq accesses(hits+misses) -system.cpu.l2cache.SCUpgradeReq_accesses::total 2 # number of SCUpgradeReq accesses(hits+misses) -system.cpu.l2cache.SCUpgradeReq_miss_rate::cpu.data 1 # miss rate for SCUpgradeReq accesses -system.cpu.l2cache.SCUpgradeReq_miss_rate::total 1 # miss rate for SCUpgradeReq accesses -system.cpu.l2cache.SCUpgradeReq_misses::cpu.data 2 # number of SCUpgradeReq misses -system.cpu.l2cache.SCUpgradeReq_misses::total 2 # number of SCUpgradeReq misses -system.cpu.l2cache.UpgradeReq_accesses::cpu.data 2756 # number of UpgradeReq accesses(hits+misses) -system.cpu.l2cache.UpgradeReq_accesses::total 2756 # number of UpgradeReq accesses(hits+misses) -system.cpu.l2cache.UpgradeReq_hits::cpu.data 28 # number of UpgradeReq hits -system.cpu.l2cache.UpgradeReq_hits::total 28 # number of UpgradeReq hits -system.cpu.l2cache.UpgradeReq_miss_rate::cpu.data 0.989840 # miss rate for UpgradeReq accesses -system.cpu.l2cache.UpgradeReq_miss_rate::total 0.989840 # miss rate for UpgradeReq accesses -system.cpu.l2cache.UpgradeReq_misses::cpu.data 2728 # number of UpgradeReq misses -system.cpu.l2cache.UpgradeReq_misses::total 2728 # number of UpgradeReq misses -system.cpu.l2cache.Writeback_accesses::writebacks 682059 # number of Writeback accesses(hits+misses) -system.cpu.l2cache.Writeback_accesses::total 682059 # number of Writeback accesses(hits+misses) -system.cpu.l2cache.Writeback_hits::writebacks 682059 # number of Writeback hits -system.cpu.l2cache.Writeback_hits::total 682059 # number of Writeback hits -system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked -system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked -system.cpu.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked -system.cpu.l2cache.blocked::no_targets 0 # number of cycles access was blocked -system.cpu.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked -system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked -system.cpu.l2cache.cache_copies 0 # number of cache copies performed -system.cpu.l2cache.demand_accesses::cpu.dtb.walker 7608 # number of demand (read+write) accesses -system.cpu.l2cache.demand_accesses::cpu.itb.walker 3623 # number of demand (read+write) accesses -system.cpu.l2cache.demand_accesses::cpu.inst 1699714 # number of demand (read+write) accesses -system.cpu.l2cache.demand_accesses::cpu.data 819930 # number of demand (read+write) accesses -system.cpu.l2cache.demand_accesses::total 2530875 # number of demand (read+write) accesses -system.cpu.l2cache.demand_hits::cpu.dtb.walker 7601 # number of demand (read+write) hits -system.cpu.l2cache.demand_hits::cpu.itb.walker 3621 # number of demand (read+write) hits -system.cpu.l2cache.demand_hits::cpu.inst 1681357 # number of demand (read+write) hits -system.cpu.l2cache.demand_hits::cpu.data 656532 # number of demand (read+write) hits -system.cpu.l2cache.demand_hits::total 2349111 # number of demand (read+write) hits -system.cpu.l2cache.demand_miss_rate::cpu.dtb.walker 0.000920 # miss rate for demand accesses -system.cpu.l2cache.demand_miss_rate::cpu.itb.walker 0.000552 # miss rate for demand accesses -system.cpu.l2cache.demand_miss_rate::cpu.inst 0.010800 # miss rate for demand accesses -system.cpu.l2cache.demand_miss_rate::cpu.data 0.199283 # miss rate for demand accesses -system.cpu.l2cache.demand_miss_rate::total 0.071819 # miss rate for demand accesses -system.cpu.l2cache.demand_misses::cpu.dtb.walker 7 # number of demand (read+write) misses -system.cpu.l2cache.demand_misses::cpu.itb.walker 2 # number of demand (read+write) misses -system.cpu.l2cache.demand_misses::cpu.inst 18357 # number of demand (read+write) misses -system.cpu.l2cache.demand_misses::cpu.data 163398 # number of demand (read+write) misses -system.cpu.l2cache.demand_misses::total 181764 # number of demand (read+write) misses -system.cpu.l2cache.fast_writes 0 # number of fast writes performed -system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate -system.cpu.l2cache.overall_accesses::cpu.dtb.walker 7608 # number of overall (read+write) accesses -system.cpu.l2cache.overall_accesses::cpu.itb.walker 3623 # number of overall (read+write) accesses -system.cpu.l2cache.overall_accesses::cpu.inst 1699714 # number of overall (read+write) accesses -system.cpu.l2cache.overall_accesses::cpu.data 819930 # number of overall (read+write) accesses -system.cpu.l2cache.overall_accesses::total 2530875 # number of overall (read+write) accesses -system.cpu.l2cache.overall_hits::cpu.dtb.walker 7601 # number of overall hits -system.cpu.l2cache.overall_hits::cpu.itb.walker 3621 # number of overall hits -system.cpu.l2cache.overall_hits::cpu.inst 1681357 # number of overall hits -system.cpu.l2cache.overall_hits::cpu.data 656532 # number of overall hits -system.cpu.l2cache.overall_hits::total 2349111 # number of overall hits -system.cpu.l2cache.overall_miss_rate::cpu.dtb.walker 0.000920 # miss rate for overall accesses -system.cpu.l2cache.overall_miss_rate::cpu.itb.walker 0.000552 # miss rate for overall accesses -system.cpu.l2cache.overall_miss_rate::cpu.inst 0.010800 # miss rate for overall accesses -system.cpu.l2cache.overall_miss_rate::cpu.data 0.199283 # miss rate for overall accesses -system.cpu.l2cache.overall_miss_rate::total 0.071819 # miss rate for overall accesses -system.cpu.l2cache.overall_misses::cpu.dtb.walker 7 # number of overall misses -system.cpu.l2cache.overall_misses::cpu.itb.walker 2 # number of overall misses -system.cpu.l2cache.overall_misses::cpu.inst 18357 # number of overall misses -system.cpu.l2cache.overall_misses::cpu.data 163398 # number of overall misses -system.cpu.l2cache.overall_misses::total 181764 # number of overall misses -system.cpu.l2cache.tags.age_task_id_blocks_1023::4 5 # Occupied blocks per task id -system.cpu.l2cache.tags.age_task_id_blocks_1024::0 40 # Occupied blocks per task id -system.cpu.l2cache.tags.age_task_id_blocks_1024::1 180 # Occupied blocks per task id -system.cpu.l2cache.tags.age_task_id_blocks_1024::2 3716 # Occupied blocks per task id -system.cpu.l2cache.tags.age_task_id_blocks_1024::3 10700 # Occupied blocks per task id -system.cpu.l2cache.tags.age_task_id_blocks_1024::4 50640 # Occupied blocks per task id -system.cpu.l2cache.tags.avg_refs 15.560628 # Average number of references to valid blocks. -system.cpu.l2cache.tags.data_accesses 26204344 # Number of data accesses -system.cpu.l2cache.tags.occ_blocks::writebacks 48893.401643 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.dtb.walker 2.931998 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.itb.walker 0.004345 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.inst 9064.654943 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_blocks::cpu.data 7194.316179 # Average occupied blocks per requestor -system.cpu.l2cache.tags.occ_percent::writebacks 0.746054 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::cpu.dtb.walker 0.000045 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::cpu.itb.walker 0.000000 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::cpu.inst 0.138316 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::cpu.data 0.109777 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_percent::total 0.994191 # Average percentage of cache occupancy -system.cpu.l2cache.tags.occ_task_id_blocks::1023 5 # Occupied blocks per task id -system.cpu.l2cache.tags.occ_task_id_blocks::1024 65276 # Occupied blocks per task id -system.cpu.l2cache.tags.occ_task_id_percent::1023 0.000076 # Percentage of cache occupancy per task id -system.cpu.l2cache.tags.occ_task_id_percent::1024 0.996033 # Percentage of cache occupancy per task id -system.cpu.l2cache.tags.replacements 110026 # number of replacements -system.cpu.l2cache.tags.sampled_refs 175307 # Sample count of references to valid blocks. -system.cpu.l2cache.tags.tag_accesses 26204344 # Number of tag accesses -system.cpu.l2cache.tags.tagsinuse 65155.309107 # Cycle average of tags in use -system.cpu.l2cache.tags.total_refs 2727887 # Total number of references to valid blocks. -system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. -system.cpu.l2cache.writebacks::writebacks 101897 # number of writebacks -system.cpu.l2cache.writebacks::total 101897 # number of writebacks -system.cpu.not_idle_fraction 0.031985 # Percentage of non-idle cycles +system.cpu.itb.flush_tlb 64 # Number of times complete TLB was flushed +system.cpu.itb.flush_tlb_mva 917 # Number of times TLB was flushed by MVA +system.cpu.itb.flush_tlb_mva_asid 0 # Number of times TLB was flushed by MVA & ASID +system.cpu.itb.flush_tlb_asid 0 # Number of times TLB was flushed by ASID +system.cpu.itb.flush_entries 2913 # Number of entries that have been flushed from TLB +system.cpu.itb.align_faults 0 # Number of TLB faults due to alignment restrictions +system.cpu.itb.prefetch_faults 0 # Number of TLB faults due to prefetch +system.cpu.itb.domain_faults 0 # Number of TLB faults due to domain restrictions +system.cpu.itb.perms_faults 0 # Number of TLB faults due to permissions restrictions +system.cpu.itb.read_accesses 0 # DTB read accesses +system.cpu.itb.write_accesses 0 # DTB write accesses +system.cpu.itb.inst_accesses 147044108 # ITB inst accesses +system.cpu.itb.hits 147039346 # DTB hits +system.cpu.itb.misses 4762 # DTB misses +system.cpu.itb.accesses 147044108 # DTB accesses system.cpu.numCycles 5567737188 # number of cpu cycles simulated -system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed system.cpu.numWorkItemsStarted 0 # number of work items this cpu started -system.cpu.num_busy_cycles 178083441.067325 # Number of busy cycles -system.cpu.num_cc_register_reads 530854003 # number of times the CC registers were read -system.cpu.num_cc_register_writes 62364299 # number of times the CC registers were written -system.cpu.num_conditional_control_insts 18730330 # number of instructions that are conditional controls +system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed +system.cpu.committedInsts 142772879 # Number of instructions committed +system.cpu.committedOps 173803124 # Number of ops (including micro ops) committed +system.cpu.num_int_alu_accesses 153162683 # Number of integer alu accesses system.cpu.num_fp_alu_accesses 11484 # Number of float alu accesses -system.cpu.num_fp_insts 11484 # number of float instructions -system.cpu.num_fp_register_reads 8772 # number of times the floating registers were read -system.cpu.num_fp_register_writes 2716 # number of times the floating registers were written system.cpu.num_func_calls 16873899 # number of times a function call or return occured -system.cpu.num_idle_cycles 5389653746.932674 # Number of idle cycles -system.cpu.num_int_alu_accesses 153162683 # Number of integer alu accesses +system.cpu.num_conditional_control_insts 18730330 # number of instructions that are conditional controls system.cpu.num_int_insts 153162683 # number of integer instructions +system.cpu.num_fp_insts 11484 # number of float instructions system.cpu.num_int_register_reads 285059803 # number of times the integer registers were read system.cpu.num_int_register_writes 107179480 # number of times the integer registers were written -system.cpu.num_load_insts 31855884 # Number of load instructions +system.cpu.num_fp_register_reads 8772 # number of times the floating registers were read +system.cpu.num_fp_register_writes 2716 # number of times the floating registers were written +system.cpu.num_cc_register_reads 530854003 # number of times the CC registers were read +system.cpu.num_cc_register_writes 62364299 # number of times the CC registers were written system.cpu.num_mem_refs 55939276 # number of memory refs +system.cpu.num_load_insts 31855884 # Number of load instructions system.cpu.num_store_insts 24083392 # Number of store instructions +system.cpu.num_idle_cycles 5389653746.932674 # Number of idle cycles +system.cpu.num_busy_cycles 178083441.067325 # Number of busy cycles +system.cpu.not_idle_fraction 0.031985 # Percentage of non-idle cycles +system.cpu.idle_fraction 0.968015 # Percentage of idle cycles +system.cpu.Branches 36396981 # Number of branches fetched system.cpu.op_class::No_OpClass 2337 0.00% 0.00% # Class of executed instruction system.cpu.op_class::IntAlu 121152838 68.36% 68.36% # Class of executed instruction system.cpu.op_class::IntMult 116892 0.07% 68.43% # Class of executed instruction @@ -475,6 +266,277 @@ system.cpu.op_class::MemWrite 24083392 13.59% 100.00% # Cl system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction system.cpu.op_class::total 177219912 # Class of executed instruction +system.cpu.kern.inst.arm 0 # number of arm instructions executed +system.cpu.kern.inst.quiesce 3083 # number of quiesce instructions executed +system.cpu.dcache.tags.replacements 819402 # number of replacements +system.cpu.dcache.tags.tagsinuse 511.997174 # Cycle average of tags in use +system.cpu.dcache.tags.total_refs 53784483 # Total number of references to valid blocks. +system.cpu.dcache.tags.sampled_refs 819914 # Sample count of references to valid blocks. +system.cpu.dcache.tags.avg_refs 65.597713 # Average number of references to valid blocks. +system.cpu.dcache.tags.warmup_cycle 23053500 # Cycle when the warmup percentage was hit. +system.cpu.dcache.tags.occ_blocks::cpu.data 511.997174 # Average occupied blocks per requestor +system.cpu.dcache.tags.occ_percent::cpu.data 0.999994 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_percent::total 0.999994 # Average percentage of cache occupancy +system.cpu.dcache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::0 286 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::1 196 # Occupied blocks per task id +system.cpu.dcache.tags.age_task_id_blocks_1024::2 30 # Occupied blocks per task id +system.cpu.dcache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id +system.cpu.dcache.tags.tag_accesses 219237582 # Number of tag accesses +system.cpu.dcache.tags.data_accesses 219237582 # Number of data accesses +system.cpu.dcache.ReadReq_hits::cpu.data 30129052 # number of ReadReq hits +system.cpu.dcache.ReadReq_hits::total 30129052 # number of ReadReq hits +system.cpu.dcache.WriteReq_hits::cpu.data 22340110 # number of WriteReq hits +system.cpu.dcache.WriteReq_hits::total 22340110 # number of WriteReq hits +system.cpu.dcache.SoftPFReq_hits::cpu.data 395080 # number of SoftPFReq hits +system.cpu.dcache.SoftPFReq_hits::total 395080 # number of SoftPFReq hits +system.cpu.dcache.LoadLockedReq_hits::cpu.data 457347 # number of LoadLockedReq hits +system.cpu.dcache.LoadLockedReq_hits::total 457347 # number of LoadLockedReq hits +system.cpu.dcache.StoreCondReq_hits::cpu.data 460136 # number of StoreCondReq hits +system.cpu.dcache.StoreCondReq_hits::total 460136 # number of StoreCondReq hits +system.cpu.dcache.demand_hits::cpu.data 52469162 # number of demand (read+write) hits +system.cpu.dcache.demand_hits::total 52469162 # number of demand (read+write) hits +system.cpu.dcache.overall_hits::cpu.data 52864242 # number of overall hits +system.cpu.dcache.overall_hits::total 52864242 # number of overall hits +system.cpu.dcache.ReadReq_misses::cpu.data 396276 # number of ReadReq misses +system.cpu.dcache.ReadReq_misses::total 396276 # number of ReadReq misses +system.cpu.dcache.WriteReq_misses::cpu.data 301678 # number of WriteReq misses +system.cpu.dcache.WriteReq_misses::total 301678 # number of WriteReq misses +system.cpu.dcache.SoftPFReq_misses::cpu.data 116120 # number of SoftPFReq misses +system.cpu.dcache.SoftPFReq_misses::total 116120 # number of SoftPFReq misses +system.cpu.dcache.LoadLockedReq_misses::cpu.data 8612 # number of LoadLockedReq misses +system.cpu.dcache.LoadLockedReq_misses::total 8612 # number of LoadLockedReq misses +system.cpu.dcache.StoreCondReq_misses::cpu.data 2 # number of StoreCondReq misses +system.cpu.dcache.StoreCondReq_misses::total 2 # number of StoreCondReq misses +system.cpu.dcache.demand_misses::cpu.data 697954 # number of demand (read+write) misses +system.cpu.dcache.demand_misses::total 697954 # number of demand (read+write) misses +system.cpu.dcache.overall_misses::cpu.data 814074 # number of overall misses +system.cpu.dcache.overall_misses::total 814074 # number of overall misses +system.cpu.dcache.ReadReq_accesses::cpu.data 30525328 # number of ReadReq accesses(hits+misses) +system.cpu.dcache.ReadReq_accesses::total 30525328 # number of ReadReq accesses(hits+misses) +system.cpu.dcache.WriteReq_accesses::cpu.data 22641788 # number of WriteReq accesses(hits+misses) +system.cpu.dcache.WriteReq_accesses::total 22641788 # number of WriteReq accesses(hits+misses) +system.cpu.dcache.SoftPFReq_accesses::cpu.data 511200 # number of SoftPFReq accesses(hits+misses) +system.cpu.dcache.SoftPFReq_accesses::total 511200 # number of SoftPFReq accesses(hits+misses) +system.cpu.dcache.LoadLockedReq_accesses::cpu.data 465959 # number of LoadLockedReq accesses(hits+misses) +system.cpu.dcache.LoadLockedReq_accesses::total 465959 # number of LoadLockedReq accesses(hits+misses) +system.cpu.dcache.StoreCondReq_accesses::cpu.data 460138 # number of StoreCondReq accesses(hits+misses) +system.cpu.dcache.StoreCondReq_accesses::total 460138 # number of StoreCondReq accesses(hits+misses) +system.cpu.dcache.demand_accesses::cpu.data 53167116 # number of demand (read+write) accesses +system.cpu.dcache.demand_accesses::total 53167116 # number of demand (read+write) accesses +system.cpu.dcache.overall_accesses::cpu.data 53678316 # number of overall (read+write) accesses +system.cpu.dcache.overall_accesses::total 53678316 # number of overall (read+write) accesses +system.cpu.dcache.ReadReq_miss_rate::cpu.data 0.012982 # miss rate for ReadReq accesses +system.cpu.dcache.ReadReq_miss_rate::total 0.012982 # miss rate for ReadReq accesses +system.cpu.dcache.WriteReq_miss_rate::cpu.data 0.013324 # miss rate for WriteReq accesses +system.cpu.dcache.WriteReq_miss_rate::total 0.013324 # miss rate for WriteReq accesses +system.cpu.dcache.SoftPFReq_miss_rate::cpu.data 0.227152 # miss rate for SoftPFReq accesses +system.cpu.dcache.SoftPFReq_miss_rate::total 0.227152 # miss rate for SoftPFReq accesses +system.cpu.dcache.LoadLockedReq_miss_rate::cpu.data 0.018482 # miss rate for LoadLockedReq accesses +system.cpu.dcache.LoadLockedReq_miss_rate::total 0.018482 # miss rate for LoadLockedReq accesses +system.cpu.dcache.StoreCondReq_miss_rate::cpu.data 0.000004 # miss rate for StoreCondReq accesses +system.cpu.dcache.StoreCondReq_miss_rate::total 0.000004 # miss rate for StoreCondReq accesses +system.cpu.dcache.demand_miss_rate::cpu.data 0.013128 # miss rate for demand accesses +system.cpu.dcache.demand_miss_rate::total 0.013128 # miss rate for demand accesses +system.cpu.dcache.overall_miss_rate::cpu.data 0.015166 # miss rate for overall accesses +system.cpu.dcache.overall_miss_rate::total 0.015166 # miss rate for overall accesses +system.cpu.dcache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked +system.cpu.dcache.blocked_cycles::no_targets 0 # number of cycles access was blocked +system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked +system.cpu.dcache.blocked::no_targets 0 # number of cycles access was blocked +system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu.dcache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked +system.cpu.dcache.fast_writes 0 # number of fast writes performed +system.cpu.dcache.cache_copies 0 # number of cache copies performed +system.cpu.dcache.writebacks::writebacks 682059 # number of writebacks +system.cpu.dcache.writebacks::total 682059 # number of writebacks +system.cpu.dcache.no_allocate_misses 0 # Number of misses that were no-allocate +system.cpu.icache.tags.replacements 1699214 # number of replacements +system.cpu.icache.tags.tagsinuse 511.663681 # Cycle average of tags in use +system.cpu.icache.tags.total_refs 145342721 # Total number of references to valid blocks. +system.cpu.icache.tags.sampled_refs 1699726 # Sample count of references to valid blocks. +system.cpu.icache.tags.avg_refs 85.509500 # Average number of references to valid blocks. +system.cpu.icache.tags.warmup_cycle 7831491500 # Cycle when the warmup percentage was hit. +system.cpu.icache.tags.occ_blocks::cpu.inst 511.663681 # Average occupied blocks per requestor +system.cpu.icache.tags.occ_percent::cpu.inst 0.999343 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_percent::total 0.999343 # Average percentage of cache occupancy +system.cpu.icache.tags.occ_task_id_blocks::1024 512 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::0 197 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::1 77 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::2 233 # Occupied blocks per task id +system.cpu.icache.tags.age_task_id_blocks_1024::3 5 # Occupied blocks per task id +system.cpu.icache.tags.occ_task_id_percent::1024 1 # Percentage of cache occupancy per task id +system.cpu.icache.tags.tag_accesses 148742185 # Number of tag accesses +system.cpu.icache.tags.data_accesses 148742185 # Number of data accesses +system.cpu.icache.ReadReq_hits::cpu.inst 145342721 # number of ReadReq hits +system.cpu.icache.ReadReq_hits::total 145342721 # number of ReadReq hits +system.cpu.icache.demand_hits::cpu.inst 145342721 # number of demand (read+write) hits +system.cpu.icache.demand_hits::total 145342721 # number of demand (read+write) hits +system.cpu.icache.overall_hits::cpu.inst 145342721 # number of overall hits +system.cpu.icache.overall_hits::total 145342721 # number of overall hits +system.cpu.icache.ReadReq_misses::cpu.inst 1699732 # number of ReadReq misses +system.cpu.icache.ReadReq_misses::total 1699732 # number of ReadReq misses +system.cpu.icache.demand_misses::cpu.inst 1699732 # number of demand (read+write) misses +system.cpu.icache.demand_misses::total 1699732 # number of demand (read+write) misses +system.cpu.icache.overall_misses::cpu.inst 1699732 # number of overall misses +system.cpu.icache.overall_misses::total 1699732 # number of overall misses +system.cpu.icache.ReadReq_accesses::cpu.inst 147042453 # number of ReadReq accesses(hits+misses) +system.cpu.icache.ReadReq_accesses::total 147042453 # number of ReadReq accesses(hits+misses) +system.cpu.icache.demand_accesses::cpu.inst 147042453 # number of demand (read+write) accesses +system.cpu.icache.demand_accesses::total 147042453 # number of demand (read+write) accesses +system.cpu.icache.overall_accesses::cpu.inst 147042453 # number of overall (read+write) accesses +system.cpu.icache.overall_accesses::total 147042453 # number of overall (read+write) accesses +system.cpu.icache.ReadReq_miss_rate::cpu.inst 0.011559 # miss rate for ReadReq accesses +system.cpu.icache.ReadReq_miss_rate::total 0.011559 # miss rate for ReadReq accesses +system.cpu.icache.demand_miss_rate::cpu.inst 0.011559 # miss rate for demand accesses +system.cpu.icache.demand_miss_rate::total 0.011559 # miss rate for demand accesses +system.cpu.icache.overall_miss_rate::cpu.inst 0.011559 # miss rate for overall accesses +system.cpu.icache.overall_miss_rate::total 0.011559 # miss rate for overall accesses +system.cpu.icache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked +system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked +system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked +system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked +system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked +system.cpu.icache.fast_writes 0 # number of fast writes performed +system.cpu.icache.cache_copies 0 # number of cache copies performed +system.cpu.icache.no_allocate_misses 0 # Number of misses that were no-allocate +system.cpu.l2cache.tags.replacements 110026 # number of replacements +system.cpu.l2cache.tags.tagsinuse 65155.309107 # Cycle average of tags in use +system.cpu.l2cache.tags.total_refs 2727887 # Total number of references to valid blocks. +system.cpu.l2cache.tags.sampled_refs 175307 # Sample count of references to valid blocks. +system.cpu.l2cache.tags.avg_refs 15.560628 # Average number of references to valid blocks. +system.cpu.l2cache.tags.warmup_cycle 0 # Cycle when the warmup percentage was hit. +system.cpu.l2cache.tags.occ_blocks::writebacks 48893.401643 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.dtb.walker 2.931998 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.itb.walker 0.004345 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.inst 9064.654943 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_blocks::cpu.data 7194.316179 # Average occupied blocks per requestor +system.cpu.l2cache.tags.occ_percent::writebacks 0.746054 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::cpu.dtb.walker 0.000045 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::cpu.itb.walker 0.000000 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::cpu.inst 0.138316 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::cpu.data 0.109777 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_percent::total 0.994191 # Average percentage of cache occupancy +system.cpu.l2cache.tags.occ_task_id_blocks::1023 5 # Occupied blocks per task id +system.cpu.l2cache.tags.occ_task_id_blocks::1024 65276 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1023::4 5 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::0 40 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::1 180 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::2 3716 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::3 10700 # Occupied blocks per task id +system.cpu.l2cache.tags.age_task_id_blocks_1024::4 50640 # Occupied blocks per task id +system.cpu.l2cache.tags.occ_task_id_percent::1023 0.000076 # Percentage of cache occupancy per task id +system.cpu.l2cache.tags.occ_task_id_percent::1024 0.996033 # Percentage of cache occupancy per task id +system.cpu.l2cache.tags.tag_accesses 26204344 # Number of tag accesses +system.cpu.l2cache.tags.data_accesses 26204344 # Number of data accesses +system.cpu.l2cache.ReadReq_hits::cpu.dtb.walker 7601 # number of ReadReq hits +system.cpu.l2cache.ReadReq_hits::cpu.itb.walker 3621 # number of ReadReq hits +system.cpu.l2cache.ReadReq_hits::cpu.inst 1681357 # number of ReadReq hits +system.cpu.l2cache.ReadReq_hits::cpu.data 505474 # number of ReadReq hits +system.cpu.l2cache.ReadReq_hits::total 2198053 # number of ReadReq hits +system.cpu.l2cache.Writeback_hits::writebacks 682059 # number of Writeback hits +system.cpu.l2cache.Writeback_hits::total 682059 # number of Writeback hits +system.cpu.l2cache.UpgradeReq_hits::cpu.data 28 # number of UpgradeReq hits +system.cpu.l2cache.UpgradeReq_hits::total 28 # number of UpgradeReq hits +system.cpu.l2cache.ReadExReq_hits::cpu.data 151058 # number of ReadExReq hits +system.cpu.l2cache.ReadExReq_hits::total 151058 # number of ReadExReq hits +system.cpu.l2cache.demand_hits::cpu.dtb.walker 7601 # number of demand (read+write) hits +system.cpu.l2cache.demand_hits::cpu.itb.walker 3621 # number of demand (read+write) hits +system.cpu.l2cache.demand_hits::cpu.inst 1681357 # number of demand (read+write) hits +system.cpu.l2cache.demand_hits::cpu.data 656532 # number of demand (read+write) hits +system.cpu.l2cache.demand_hits::total 2349111 # number of demand (read+write) hits +system.cpu.l2cache.overall_hits::cpu.dtb.walker 7601 # number of overall hits +system.cpu.l2cache.overall_hits::cpu.itb.walker 3621 # number of overall hits +system.cpu.l2cache.overall_hits::cpu.inst 1681357 # number of overall hits +system.cpu.l2cache.overall_hits::cpu.data 656532 # number of overall hits +system.cpu.l2cache.overall_hits::total 2349111 # number of overall hits +system.cpu.l2cache.ReadReq_misses::cpu.dtb.walker 7 # number of ReadReq misses +system.cpu.l2cache.ReadReq_misses::cpu.itb.walker 2 # number of ReadReq misses +system.cpu.l2cache.ReadReq_misses::cpu.inst 18357 # number of ReadReq misses +system.cpu.l2cache.ReadReq_misses::cpu.data 15534 # number of ReadReq misses +system.cpu.l2cache.ReadReq_misses::total 33900 # number of ReadReq misses +system.cpu.l2cache.UpgradeReq_misses::cpu.data 2728 # number of UpgradeReq misses +system.cpu.l2cache.UpgradeReq_misses::total 2728 # number of UpgradeReq misses +system.cpu.l2cache.SCUpgradeReq_misses::cpu.data 2 # number of SCUpgradeReq misses +system.cpu.l2cache.SCUpgradeReq_misses::total 2 # number of SCUpgradeReq misses +system.cpu.l2cache.ReadExReq_misses::cpu.data 147864 # number of ReadExReq misses +system.cpu.l2cache.ReadExReq_misses::total 147864 # number of ReadExReq misses +system.cpu.l2cache.demand_misses::cpu.dtb.walker 7 # number of demand (read+write) misses +system.cpu.l2cache.demand_misses::cpu.itb.walker 2 # number of demand (read+write) misses +system.cpu.l2cache.demand_misses::cpu.inst 18357 # number of demand (read+write) misses +system.cpu.l2cache.demand_misses::cpu.data 163398 # number of demand (read+write) misses +system.cpu.l2cache.demand_misses::total 181764 # number of demand (read+write) misses +system.cpu.l2cache.overall_misses::cpu.dtb.walker 7 # number of overall misses +system.cpu.l2cache.overall_misses::cpu.itb.walker 2 # number of overall misses +system.cpu.l2cache.overall_misses::cpu.inst 18357 # number of overall misses +system.cpu.l2cache.overall_misses::cpu.data 163398 # number of overall misses +system.cpu.l2cache.overall_misses::total 181764 # number of overall misses +system.cpu.l2cache.ReadReq_accesses::cpu.dtb.walker 7608 # number of ReadReq accesses(hits+misses) +system.cpu.l2cache.ReadReq_accesses::cpu.itb.walker 3623 # number of ReadReq accesses(hits+misses) +system.cpu.l2cache.ReadReq_accesses::cpu.inst 1699714 # number of ReadReq accesses(hits+misses) +system.cpu.l2cache.ReadReq_accesses::cpu.data 521008 # number of ReadReq accesses(hits+misses) +system.cpu.l2cache.ReadReq_accesses::total 2231953 # number of ReadReq accesses(hits+misses) +system.cpu.l2cache.Writeback_accesses::writebacks 682059 # number of Writeback accesses(hits+misses) +system.cpu.l2cache.Writeback_accesses::total 682059 # number of Writeback accesses(hits+misses) +system.cpu.l2cache.UpgradeReq_accesses::cpu.data 2756 # number of UpgradeReq accesses(hits+misses) +system.cpu.l2cache.UpgradeReq_accesses::total 2756 # number of UpgradeReq accesses(hits+misses) +system.cpu.l2cache.SCUpgradeReq_accesses::cpu.data 2 # number of SCUpgradeReq accesses(hits+misses) +system.cpu.l2cache.SCUpgradeReq_accesses::total 2 # number of SCUpgradeReq accesses(hits+misses) +system.cpu.l2cache.ReadExReq_accesses::cpu.data 298922 # number of ReadExReq accesses(hits+misses) +system.cpu.l2cache.ReadExReq_accesses::total 298922 # number of ReadExReq accesses(hits+misses) +system.cpu.l2cache.demand_accesses::cpu.dtb.walker 7608 # number of demand (read+write) accesses +system.cpu.l2cache.demand_accesses::cpu.itb.walker 3623 # number of demand (read+write) accesses +system.cpu.l2cache.demand_accesses::cpu.inst 1699714 # number of demand (read+write) accesses +system.cpu.l2cache.demand_accesses::cpu.data 819930 # number of demand (read+write) accesses +system.cpu.l2cache.demand_accesses::total 2530875 # number of demand (read+write) accesses +system.cpu.l2cache.overall_accesses::cpu.dtb.walker 7608 # number of overall (read+write) accesses +system.cpu.l2cache.overall_accesses::cpu.itb.walker 3623 # number of overall (read+write) accesses +system.cpu.l2cache.overall_accesses::cpu.inst 1699714 # number of overall (read+write) accesses +system.cpu.l2cache.overall_accesses::cpu.data 819930 # number of overall (read+write) accesses +system.cpu.l2cache.overall_accesses::total 2530875 # number of overall (read+write) accesses +system.cpu.l2cache.ReadReq_miss_rate::cpu.dtb.walker 0.000920 # miss rate for ReadReq accesses +system.cpu.l2cache.ReadReq_miss_rate::cpu.itb.walker 0.000552 # miss rate for ReadReq accesses +system.cpu.l2cache.ReadReq_miss_rate::cpu.inst 0.010800 # miss rate for ReadReq accesses +system.cpu.l2cache.ReadReq_miss_rate::cpu.data 0.029815 # miss rate for ReadReq accesses +system.cpu.l2cache.ReadReq_miss_rate::total 0.015188 # miss rate for ReadReq accesses +system.cpu.l2cache.UpgradeReq_miss_rate::cpu.data 0.989840 # miss rate for UpgradeReq accesses +system.cpu.l2cache.UpgradeReq_miss_rate::total 0.989840 # miss rate for UpgradeReq accesses +system.cpu.l2cache.SCUpgradeReq_miss_rate::cpu.data 1 # miss rate for SCUpgradeReq accesses +system.cpu.l2cache.SCUpgradeReq_miss_rate::total 1 # miss rate for SCUpgradeReq accesses +system.cpu.l2cache.ReadExReq_miss_rate::cpu.data 0.494657 # miss rate for ReadExReq accesses +system.cpu.l2cache.ReadExReq_miss_rate::total 0.494657 # miss rate for ReadExReq accesses +system.cpu.l2cache.demand_miss_rate::cpu.dtb.walker 0.000920 # miss rate for demand accesses +system.cpu.l2cache.demand_miss_rate::cpu.itb.walker 0.000552 # miss rate for demand accesses +system.cpu.l2cache.demand_miss_rate::cpu.inst 0.010800 # miss rate for demand accesses +system.cpu.l2cache.demand_miss_rate::cpu.data 0.199283 # miss rate for demand accesses +system.cpu.l2cache.demand_miss_rate::total 0.071819 # miss rate for demand accesses +system.cpu.l2cache.overall_miss_rate::cpu.dtb.walker 0.000920 # miss rate for overall accesses +system.cpu.l2cache.overall_miss_rate::cpu.itb.walker 0.000552 # miss rate for overall accesses +system.cpu.l2cache.overall_miss_rate::cpu.inst 0.010800 # miss rate for overall accesses +system.cpu.l2cache.overall_miss_rate::cpu.data 0.199283 # miss rate for overall accesses +system.cpu.l2cache.overall_miss_rate::total 0.071819 # miss rate for overall accesses +system.cpu.l2cache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked +system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked +system.cpu.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked +system.cpu.l2cache.blocked::no_targets 0 # number of cycles access was blocked +system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked +system.cpu.l2cache.fast_writes 0 # number of fast writes performed +system.cpu.l2cache.cache_copies 0 # number of cache copies performed +system.cpu.l2cache.writebacks::writebacks 101897 # number of writebacks +system.cpu.l2cache.writebacks::total 101897 # number of writebacks +system.cpu.l2cache.no_allocate_misses 0 # Number of misses that were no-allocate +system.cpu.toL2Bus.trans_dist::ReadReq 2288542 # Transaction distribution +system.cpu.toL2Bus.trans_dist::ReadResp 2288542 # Transaction distribution +system.cpu.toL2Bus.trans_dist::WriteReq 27546 # Transaction distribution +system.cpu.toL2Bus.trans_dist::WriteResp 27546 # Transaction distribution +system.cpu.toL2Bus.trans_dist::Writeback 682059 # Transaction distribution +system.cpu.toL2Bus.trans_dist::UpgradeReq 2756 # Transaction distribution +system.cpu.toL2Bus.trans_dist::SCUpgradeReq 2 # Transaction distribution +system.cpu.toL2Bus.trans_dist::UpgradeResp 2758 # Transaction distribution +system.cpu.toL2Bus.trans_dist::ReadExReq 298922 # Transaction distribution +system.cpu.toL2Bus.trans_dist::ReadExResp 298922 # Transaction distribution system.cpu.toL2Bus.pkt_count_system.cpu.icache.mem_side::system.cpu.l2cache.cpu_side 3417508 # Packet count per connected master and slave (bytes) system.cpu.toL2Bus.pkt_count_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_side 2444657 # Packet count per connected master and slave (bytes) system.cpu.toL2Bus.pkt_count_system.cpu.itb.walker.dma::system.cpu.l2cache.cpu_side 18430 # Packet count per connected master and slave (bytes) @@ -485,6 +547,7 @@ system.cpu.toL2Bus.pkt_size_system.cpu.dcache.mem_side::system.cpu.l2cache.cpu_s system.cpu.toL2Bus.pkt_size_system.cpu.itb.walker.dma::system.cpu.l2cache.cpu_side 36860 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.pkt_size_system.cpu.dtb.walker.dma::system.cpu.l2cache.cpu_side 74000 # Cumulative packet size per connected master and slave (bytes) system.cpu.toL2Bus.pkt_size::total 205239845 # Cumulative packet size per connected master and slave (bytes) +system.cpu.toL2Bus.snoops 36631 # Total snoops (count) system.cpu.toL2Bus.snoop_fanout::samples 3268658 # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::mean 3.011156 # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::stdev 0.105030 # Request fanout histogram @@ -498,18 +561,11 @@ system.cpu.toL2Bus.snoop_fanout::overflows 0 0.00% 100.00% # system.cpu.toL2Bus.snoop_fanout::min_value 3 # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::max_value 4 # Request fanout histogram system.cpu.toL2Bus.snoop_fanout::total 3268658 # Request fanout histogram -system.cpu.toL2Bus.snoops 36631 # Total snoops (count) -system.cpu.toL2Bus.trans_dist::ReadReq 2288542 # Transaction distribution -system.cpu.toL2Bus.trans_dist::ReadResp 2288542 # Transaction distribution -system.cpu.toL2Bus.trans_dist::WriteReq 27546 # Transaction distribution -system.cpu.toL2Bus.trans_dist::WriteResp 27546 # Transaction distribution -system.cpu.toL2Bus.trans_dist::Writeback 682059 # Transaction distribution -system.cpu.toL2Bus.trans_dist::UpgradeReq 2756 # Transaction distribution -system.cpu.toL2Bus.trans_dist::SCUpgradeReq 2 # Transaction distribution -system.cpu.toL2Bus.trans_dist::UpgradeResp 2758 # Transaction distribution -system.cpu.toL2Bus.trans_dist::ReadExReq 298922 # Transaction distribution -system.cpu.toL2Bus.trans_dist::ReadExResp 298922 # Transaction distribution -system.cpu_clk_domain.clock 500 # Clock period in ticks +system.iobus.trans_dist::ReadReq 30164 # Transaction distribution +system.iobus.trans_dist::ReadResp 30164 # Transaction distribution +system.iobus.trans_dist::WriteReq 59002 # Transaction distribution +system.iobus.trans_dist::WriteResp 22778 # Transaction distribution +system.iobus.trans_dist::WriteInvalidateResp 36224 # Transaction distribution system.iobus.pkt_count_system.bridge.master::system.realview.uart.pio 54116 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.bridge.master::system.realview.realview_io.pio 116 # Packet count per connected master and slave (bytes) system.iobus.pkt_count_system.bridge.master::system.realview.timer0.pio 34 # Packet count per connected master and slave (bytes) @@ -560,60 +616,67 @@ system.iobus.pkt_size_system.bridge.master::total 159061 system.iobus.pkt_size_system.realview.ide.dma::system.iocache.cpu_side 2321152 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size_system.realview.ide.dma::total 2321152 # Cumulative packet size per connected master and slave (bytes) system.iobus.pkt_size::total 2480213 # Cumulative packet size per connected master and slave (bytes) -system.iobus.trans_dist::ReadReq 30164 # Transaction distribution -system.iobus.trans_dist::ReadResp 30164 # Transaction distribution -system.iobus.trans_dist::WriteReq 59002 # Transaction distribution -system.iobus.trans_dist::WriteResp 22778 # Transaction distribution -system.iobus.trans_dist::WriteInvalidateResp 36224 # Transaction distribution -system.iocache.ReadReq_accesses::realview.ide 240 # number of ReadReq accesses(hits+misses) -system.iocache.ReadReq_accesses::total 240 # number of ReadReq accesses(hits+misses) -system.iocache.ReadReq_miss_rate::realview.ide 1 # miss rate for ReadReq accesses -system.iocache.ReadReq_miss_rate::total 1 # miss rate for ReadReq accesses +system.iocache.tags.replacements 36430 # number of replacements +system.iocache.tags.tagsinuse 0.909961 # Cycle average of tags in use +system.iocache.tags.total_refs 0 # Total number of references to valid blocks. +system.iocache.tags.sampled_refs 36446 # Sample count of references to valid blocks. +system.iocache.tags.avg_refs 0 # Average number of references to valid blocks. +system.iocache.tags.warmup_cycle 227409731009 # Cycle when the warmup percentage was hit. +system.iocache.tags.occ_blocks::realview.ide 0.909961 # Average occupied blocks per requestor +system.iocache.tags.occ_percent::realview.ide 0.056873 # Average percentage of cache occupancy +system.iocache.tags.occ_percent::total 0.056873 # Average percentage of cache occupancy +system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id +system.iocache.tags.age_task_id_blocks_1023::3 16 # Occupied blocks per task id +system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id +system.iocache.tags.tag_accesses 328176 # Number of tag accesses +system.iocache.tags.data_accesses 328176 # Number of data accesses system.iocache.ReadReq_misses::realview.ide 240 # number of ReadReq misses system.iocache.ReadReq_misses::total 240 # number of ReadReq misses -system.iocache.WriteInvalidateReq_accesses::realview.ide 36224 # number of WriteInvalidateReq accesses(hits+misses) -system.iocache.WriteInvalidateReq_accesses::total 36224 # number of WriteInvalidateReq accesses(hits+misses) -system.iocache.WriteInvalidateReq_miss_rate::realview.ide 1 # miss rate for WriteInvalidateReq accesses -system.iocache.WriteInvalidateReq_miss_rate::total 1 # miss rate for WriteInvalidateReq accesses system.iocache.WriteInvalidateReq_misses::realview.ide 36224 # number of WriteInvalidateReq misses system.iocache.WriteInvalidateReq_misses::total 36224 # number of WriteInvalidateReq misses -system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked -system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked -system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked -system.iocache.blocked::no_targets 0 # number of cycles access was blocked -system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked -system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked -system.iocache.cache_copies 0 # number of cache copies performed -system.iocache.demand_accesses::realview.ide 240 # number of demand (read+write) accesses -system.iocache.demand_accesses::total 240 # number of demand (read+write) accesses -system.iocache.demand_miss_rate::realview.ide 1 # miss rate for demand accesses -system.iocache.demand_miss_rate::total 1 # miss rate for demand accesses system.iocache.demand_misses::realview.ide 240 # number of demand (read+write) misses system.iocache.demand_misses::total 240 # number of demand (read+write) misses -system.iocache.fast_writes 0 # number of fast writes performed -system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate +system.iocache.overall_misses::realview.ide 240 # number of overall misses +system.iocache.overall_misses::total 240 # number of overall misses +system.iocache.ReadReq_accesses::realview.ide 240 # number of ReadReq accesses(hits+misses) +system.iocache.ReadReq_accesses::total 240 # number of ReadReq accesses(hits+misses) +system.iocache.WriteInvalidateReq_accesses::realview.ide 36224 # number of WriteInvalidateReq accesses(hits+misses) +system.iocache.WriteInvalidateReq_accesses::total 36224 # number of WriteInvalidateReq accesses(hits+misses) +system.iocache.demand_accesses::realview.ide 240 # number of demand (read+write) accesses +system.iocache.demand_accesses::total 240 # number of demand (read+write) accesses system.iocache.overall_accesses::realview.ide 240 # number of overall (read+write) accesses system.iocache.overall_accesses::total 240 # number of overall (read+write) accesses +system.iocache.ReadReq_miss_rate::realview.ide 1 # miss rate for ReadReq accesses +system.iocache.ReadReq_miss_rate::total 1 # miss rate for ReadReq accesses +system.iocache.WriteInvalidateReq_miss_rate::realview.ide 1 # miss rate for WriteInvalidateReq accesses +system.iocache.WriteInvalidateReq_miss_rate::total 1 # miss rate for WriteInvalidateReq accesses +system.iocache.demand_miss_rate::realview.ide 1 # miss rate for demand accesses +system.iocache.demand_miss_rate::total 1 # miss rate for demand accesses system.iocache.overall_miss_rate::realview.ide 1 # miss rate for overall accesses system.iocache.overall_miss_rate::total 1 # miss rate for overall accesses -system.iocache.overall_misses::realview.ide 240 # number of overall misses -system.iocache.overall_misses::total 240 # number of overall misses -system.iocache.tags.age_task_id_blocks_1023::3 16 # Occupied blocks per task id -system.iocache.tags.avg_refs 0 # Average number of references to valid blocks. -system.iocache.tags.data_accesses 328176 # Number of data accesses -system.iocache.tags.occ_blocks::realview.ide 0.909961 # Average occupied blocks per requestor -system.iocache.tags.occ_percent::realview.ide 0.056873 # Average percentage of cache occupancy -system.iocache.tags.occ_percent::total 0.056873 # Average percentage of cache occupancy -system.iocache.tags.occ_task_id_blocks::1023 16 # Occupied blocks per task id -system.iocache.tags.occ_task_id_percent::1023 1 # Percentage of cache occupancy per task id -system.iocache.tags.replacements 36430 # number of replacements -system.iocache.tags.sampled_refs 36446 # Sample count of references to valid blocks. -system.iocache.tags.tag_accesses 328176 # Number of tag accesses -system.iocache.tags.tagsinuse 0.909961 # Cycle average of tags in use -system.iocache.tags.total_refs 0 # Total number of references to valid blocks. -system.iocache.tags.warmup_cycle 227409731009 # Cycle when the warmup percentage was hit. +system.iocache.blocked_cycles::no_mshrs 0 # number of cycles access was blocked +system.iocache.blocked_cycles::no_targets 0 # number of cycles access was blocked +system.iocache.blocked::no_mshrs 0 # number of cycles access was blocked +system.iocache.blocked::no_targets 0 # number of cycles access was blocked +system.iocache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked +system.iocache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked +system.iocache.fast_writes 0 # number of fast writes performed +system.iocache.cache_copies 0 # number of cache copies performed system.iocache.writebacks::writebacks 36190 # number of writebacks system.iocache.writebacks::total 36190 # number of writebacks +system.iocache.no_allocate_misses 0 # Number of misses that were no-allocate +system.membus.trans_dist::ReadReq 74227 # Transaction distribution +system.membus.trans_dist::ReadResp 74227 # Transaction distribution +system.membus.trans_dist::WriteReq 27546 # Transaction distribution +system.membus.trans_dist::WriteResp 27546 # Transaction distribution +system.membus.trans_dist::Writeback 138087 # Transaction distribution +system.membus.trans_dist::WriteInvalidateReq 36224 # Transaction distribution +system.membus.trans_dist::WriteInvalidateResp 36224 # Transaction distribution +system.membus.trans_dist::UpgradeReq 4507 # Transaction distribution +system.membus.trans_dist::SCUpgradeReq 2 # Transaction distribution +system.membus.trans_dist::UpgradeResp 4509 # Transaction distribution +system.membus.trans_dist::ReadExReq 146085 # Transaction distribution +system.membus.trans_dist::ReadExResp 146085 # Transaction distribution system.membus.pkt_count_system.cpu.l2cache.mem_side::system.bridge.slave 105404 # Packet count per connected master and slave (bytes) system.membus.pkt_count_system.cpu.l2cache.mem_side::system.realview.nvmem.port 10 # Packet count per connected master and slave (bytes) system.membus.pkt_count_system.cpu.l2cache.mem_side::system.realview.gic.pio 1946 # Packet count per connected master and slave (bytes) @@ -630,6 +693,7 @@ system.membus.pkt_size_system.cpu.l2cache.mem_side::total 18259289 system.membus.pkt_size_system.iocache.mem_side::system.physmem.port 4649856 # Cumulative packet size per connected master and slave (bytes) system.membus.pkt_size_system.iocache.mem_side::total 4649856 # Cumulative packet size per connected master and slave (bytes) system.membus.pkt_size::total 22909145 # Cumulative packet size per connected master and slave (bytes) +system.membus.snoops 0 # Total snoops (count) system.membus.snoop_fanout::samples 359045 # Request fanout histogram system.membus.snoop_fanout::mean 1 # Request fanout histogram system.membus.snoop_fanout::stdev 0 # Request fanout histogram @@ -641,100 +705,36 @@ system.membus.snoop_fanout::overflows 0 0.00% 100.00% # Re system.membus.snoop_fanout::min_value 1 # Request fanout histogram system.membus.snoop_fanout::max_value 1 # Request fanout histogram system.membus.snoop_fanout::total 359045 # Request fanout histogram -system.membus.snoops 0 # Total snoops (count) -system.membus.trans_dist::ReadReq 74227 # Transaction distribution -system.membus.trans_dist::ReadResp 74227 # Transaction distribution -system.membus.trans_dist::WriteReq 27546 # Transaction distribution -system.membus.trans_dist::WriteResp 27546 # Transaction distribution -system.membus.trans_dist::Writeback 138087 # Transaction distribution -system.membus.trans_dist::WriteInvalidateReq 36224 # Transaction distribution -system.membus.trans_dist::WriteInvalidateResp 36224 # Transaction distribution -system.membus.trans_dist::UpgradeReq 4507 # Transaction distribution -system.membus.trans_dist::SCUpgradeReq 2 # Transaction distribution -system.membus.trans_dist::UpgradeResp 4509 # Transaction distribution -system.membus.trans_dist::ReadExReq 146085 # Transaction distribution -system.membus.trans_dist::ReadExResp 146085 # Transaction distribution -system.physmem.bw_inst_read::cpu.inst 434930 # Instruction read bandwidth from this memory (bytes/s) -system.physmem.bw_inst_read::total 434930 # Instruction read bandwidth from this memory (bytes/s) -system.physmem.bw_read::cpu.dtb.walker 161 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::cpu.itb.walker 46 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::cpu.inst 434930 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::cpu.data 3710052 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::realview.ide 345 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_read::total 4145534 # Total read bandwidth from this memory (bytes/s) -system.physmem.bw_total::writebacks 3174565 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu.dtb.walker 161 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu.itb.walker 46 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu.inst 434930 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::cpu.data 3716347 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::realview.ide 345 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_total::total 7326394 # Total bandwidth to/from this memory (bytes/s) -system.physmem.bw_write::writebacks 3174565 # Write bandwidth from this memory (bytes/s) -system.physmem.bw_write::cpu.data 6295 # Write bandwidth from this memory (bytes/s) -system.physmem.bw_write::total 3180860 # Write bandwidth from this memory (bytes/s) -system.physmem.bytes_inst_read::cpu.inst 1210788 # Number of instructions bytes read from this memory -system.physmem.bytes_inst_read::total 1210788 # Number of instructions bytes read from this memory -system.physmem.bytes_read::cpu.dtb.walker 448 # Number of bytes read from this memory -system.physmem.bytes_read::cpu.itb.walker 128 # Number of bytes read from this memory -system.physmem.bytes_read::cpu.inst 1210788 # Number of bytes read from this memory -system.physmem.bytes_read::cpu.data 10328292 # Number of bytes read from this memory -system.physmem.bytes_read::realview.ide 960 # Number of bytes read from this memory -system.physmem.bytes_read::total 11540616 # Number of bytes read from this memory -system.physmem.bytes_written::writebacks 8837568 # Number of bytes written to this memory -system.physmem.bytes_written::cpu.data 17524 # Number of bytes written to this memory -system.physmem.bytes_written::total 8855092 # Number of bytes written to this memory -system.physmem.num_reads::cpu.dtb.walker 7 # Number of read requests responded to by this memory -system.physmem.num_reads::cpu.itb.walker 2 # Number of read requests responded to by this memory -system.physmem.num_reads::cpu.inst 27372 # Number of read requests responded to by this memory -system.physmem.num_reads::cpu.data 161899 # Number of read requests responded to by this memory -system.physmem.num_reads::realview.ide 15 # Number of read requests responded to by this memory -system.physmem.num_reads::total 189295 # Number of read requests responded to by this memory -system.physmem.num_writes::writebacks 138087 # Number of write requests responded to by this memory -system.physmem.num_writes::cpu.data 4381 # Number of write requests responded to by this memory -system.physmem.num_writes::total 142468 # Number of write requests responded to by this memory -system.realview.ethernet.coalescedRxDesc nan # average number of RxDesc's coalesced into each post -system.realview.ethernet.coalescedRxIdle nan # average number of RxIdle's coalesced into each post -system.realview.ethernet.coalescedRxOk nan # average number of RxOk's coalesced into each post -system.realview.ethernet.coalescedRxOrn nan # average number of RxOrn's coalesced into each post -system.realview.ethernet.coalescedSwi nan # average number of Swi's coalesced into each post -system.realview.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post -system.realview.ethernet.coalescedTxDesc nan # average number of TxDesc's coalesced into each post -system.realview.ethernet.coalescedTxIdle nan # average number of TxIdle's coalesced into each post -system.realview.ethernet.coalescedTxOk nan # average number of TxOk's coalesced into each post system.realview.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA system.realview.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA system.realview.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA system.realview.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA -system.realview.ethernet.droppedPackets 0 # number of packets dropped -system.realview.ethernet.postedInterrupts 0 # number of posts to CPU -system.realview.ethernet.postedRxDesc 0 # number of RxDesc interrupts posted to CPU -system.realview.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU -system.realview.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU -system.realview.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU system.realview.ethernet.postedSwi 0 # number of software interrupts posted to CPU -system.realview.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU -system.realview.ethernet.postedTxIdle 0 # number of TxIdle interrupts posted to CPU -system.realview.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU -system.realview.ethernet.totalRxDesc 0 # total number of RxDesc written to ISR +system.realview.ethernet.coalescedSwi nan # average number of Swi's coalesced into each post +system.realview.ethernet.totalSwi 0 # total number of Swi written to ISR +system.realview.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU +system.realview.ethernet.coalescedRxIdle nan # average number of RxIdle's coalesced into each post system.realview.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR +system.realview.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU +system.realview.ethernet.coalescedRxOk nan # average number of RxOk's coalesced into each post system.realview.ethernet.totalRxOk 0 # total number of RxOk written to ISR -system.realview.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR -system.realview.ethernet.totalSwi 0 # total number of Swi written to ISR -system.realview.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR -system.realview.ethernet.totalTxIdle 0 # total number of TxIdle written to ISR +system.realview.ethernet.postedRxDesc 0 # number of RxDesc interrupts posted to CPU +system.realview.ethernet.coalescedRxDesc nan # average number of RxDesc's coalesced into each post +system.realview.ethernet.totalRxDesc 0 # total number of RxDesc written to ISR +system.realview.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU +system.realview.ethernet.coalescedTxOk nan # average number of TxOk's coalesced into each post system.realview.ethernet.totalTxOk 0 # total number of TxOk written to ISR -system.realview.nvmem.bw_inst_read::cpu.inst 7 # Instruction read bandwidth from this memory (bytes/s) -system.realview.nvmem.bw_inst_read::total 7 # Instruction read bandwidth from this memory (bytes/s) -system.realview.nvmem.bw_read::cpu.inst 7 # Total read bandwidth from this memory (bytes/s) -system.realview.nvmem.bw_read::total 7 # Total read bandwidth from this memory (bytes/s) -system.realview.nvmem.bw_total::cpu.inst 7 # Total bandwidth to/from this memory (bytes/s) -system.realview.nvmem.bw_total::total 7 # Total bandwidth to/from this memory (bytes/s) -system.realview.nvmem.bytes_inst_read::cpu.inst 20 # Number of instructions bytes read from this memory -system.realview.nvmem.bytes_inst_read::total 20 # Number of instructions bytes read from this memory -system.realview.nvmem.bytes_read::cpu.inst 20 # Number of bytes read from this memory -system.realview.nvmem.bytes_read::total 20 # Number of bytes read from this memory -system.realview.nvmem.num_reads::cpu.inst 5 # Number of read requests responded to by this memory -system.realview.nvmem.num_reads::total 5 # Number of read requests responded to by this memory -system.voltage_domain.voltage 1 # Voltage in Volts +system.realview.ethernet.postedTxIdle 0 # number of TxIdle interrupts posted to CPU +system.realview.ethernet.coalescedTxIdle nan # average number of TxIdle's coalesced into each post +system.realview.ethernet.totalTxIdle 0 # total number of TxIdle written to ISR +system.realview.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU +system.realview.ethernet.coalescedTxDesc nan # average number of TxDesc's coalesced into each post +system.realview.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR +system.realview.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU +system.realview.ethernet.coalescedRxOrn nan # average number of RxOrn's coalesced into each post +system.realview.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR +system.realview.ethernet.coalescedTotal nan # average number of interrupts coalesced into each post +system.realview.ethernet.postedInterrupts 0 # number of posts to CPU +system.realview.ethernet.droppedPackets 0 # number of packets dropped ---------- End Simulation Statistics ---------- diff --git a/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt b/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt index 3b5938eca..456f8f93d 100644 --- a/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt +++ b/tests/quick/fs/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stats.txt @@ -4,13 +4,306 @@ sim_seconds 0.200409 # Nu sim_ticks 200409271000 # Number of ticks simulated final_tick 4321213476000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 15445218 # Simulator instruction rate (inst/s) -host_op_rate 15445213 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 5909651303 # Simulator tick rate (ticks/s) -host_mem_usage 534848 # Number of bytes of host memory used -host_seconds 33.91 # Real time elapsed on the host +host_inst_rate 10268281 # Simulator instruction rate (inst/s) +host_op_rate 10268278 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 3928851236 # Simulator tick rate (ticks/s) +host_mem_usage 533084 # Number of bytes of host memory used +host_seconds 51.01 # Real time elapsed on the host sim_insts 523780905 # Number of instructions simulated sim_ops 523780905 # Number of ops (including micro ops) simulated +drivesys.voltage_domain.voltage 1 # Voltage in Volts +drivesys.clk_domain.clock 1000 # Clock period in ticks +drivesys.physmem.bytes_read::cpu.inst 76205572 # Number of bytes read from this memory +drivesys.physmem.bytes_read::cpu.data 26284292 # Number of bytes read from this memory +drivesys.physmem.bytes_read::tsunami.ethernet 57260550 # Number of bytes read from this memory +drivesys.physmem.bytes_read::total 159750414 # Number of bytes read from this memory +drivesys.physmem.bytes_inst_read::cpu.inst 76205572 # Number of instructions bytes read from this memory +drivesys.physmem.bytes_inst_read::total 76205572 # Number of instructions bytes read from this memory +drivesys.physmem.bytes_written::cpu.data 14619632 # Number of bytes written to this memory +drivesys.physmem.bytes_written::tsunami.ethernet 1064 # Number of bytes written to this memory +drivesys.physmem.bytes_written::total 14620696 # Number of bytes written to this memory +drivesys.physmem.num_reads::cpu.inst 19051393 # Number of read requests responded to by this memory +drivesys.physmem.num_reads::cpu.data 3647049 # Number of read requests responded to by this memory +drivesys.physmem.num_reads::tsunami.ethernet 2385839 # Number of read requests responded to by this memory +drivesys.physmem.num_reads::total 25084281 # Number of read requests responded to by this memory +drivesys.physmem.num_writes::cpu.data 2024776 # Number of write requests responded to by this memory +drivesys.physmem.num_writes::tsunami.ethernet 37 # Number of write requests responded to by this memory +drivesys.physmem.num_writes::total 2024813 # Number of write requests responded to by this memory +drivesys.physmem.bw_read::cpu.inst 380249734 # Total read bandwidth from this memory (bytes/s) +drivesys.physmem.bw_read::cpu.data 131153074 # Total read bandwidth from this memory (bytes/s) +drivesys.physmem.bw_read::tsunami.ethernet 285718069 # Total read bandwidth from this memory (bytes/s) +drivesys.physmem.bw_read::total 797120878 # Total read bandwidth from this memory (bytes/s) +drivesys.physmem.bw_inst_read::cpu.inst 380249734 # Instruction read bandwidth from this memory (bytes/s) +drivesys.physmem.bw_inst_read::total 380249734 # Instruction read bandwidth from this memory (bytes/s) +drivesys.physmem.bw_write::cpu.data 72948881 # Write bandwidth from this memory (bytes/s) +drivesys.physmem.bw_write::tsunami.ethernet 5309 # Write bandwidth from this memory (bytes/s) +drivesys.physmem.bw_write::total 72954190 # Write bandwidth from this memory (bytes/s) +drivesys.physmem.bw_total::cpu.inst 380249734 # Total bandwidth to/from this memory (bytes/s) +drivesys.physmem.bw_total::cpu.data 204101955 # Total bandwidth to/from this memory (bytes/s) +drivesys.physmem.bw_total::tsunami.ethernet 285723379 # Total bandwidth to/from this memory (bytes/s) +drivesys.physmem.bw_total::total 870075068 # Total bandwidth to/from this memory (bytes/s) +drivesys.cpu.clk_domain.clock 250 # Clock period in ticks +drivesys.cpu.dtb.fetch_hits 0 # ITB hits +drivesys.cpu.dtb.fetch_misses 0 # ITB misses +drivesys.cpu.dtb.fetch_acv 0 # ITB acv +drivesys.cpu.dtb.fetch_accesses 0 # ITB accesses +drivesys.cpu.dtb.read_hits 3725273 # DTB read hits +drivesys.cpu.dtb.read_misses 487 # DTB read misses +drivesys.cpu.dtb.read_acv 30 # DTB read access violations +drivesys.cpu.dtb.read_accesses 267991 # DTB read accesses +drivesys.cpu.dtb.write_hits 2084079 # DTB write hits +drivesys.cpu.dtb.write_misses 82 # DTB write misses +drivesys.cpu.dtb.write_acv 10 # DTB write access violations +drivesys.cpu.dtb.write_accesses 133239 # DTB write accesses +drivesys.cpu.dtb.data_hits 5809352 # DTB hits +drivesys.cpu.dtb.data_misses 569 # DTB misses +drivesys.cpu.dtb.data_acv 40 # DTB access violations +drivesys.cpu.dtb.data_accesses 401230 # DTB accesses +drivesys.cpu.itb.fetch_hits 4197628 # ITB hits +drivesys.cpu.itb.fetch_misses 194 # ITB misses +drivesys.cpu.itb.fetch_acv 22 # ITB acv +drivesys.cpu.itb.fetch_accesses 4197822 # ITB accesses +drivesys.cpu.itb.read_hits 0 # DTB read hits +drivesys.cpu.itb.read_misses 0 # DTB read misses +drivesys.cpu.itb.read_acv 0 # DTB read access violations +drivesys.cpu.itb.read_accesses 0 # DTB read accesses +drivesys.cpu.itb.write_hits 0 # DTB write hits +drivesys.cpu.itb.write_misses 0 # DTB write misses +drivesys.cpu.itb.write_acv 0 # DTB write access violations +drivesys.cpu.itb.write_accesses 0 # DTB write accesses +drivesys.cpu.itb.data_hits 0 # DTB hits +drivesys.cpu.itb.data_misses 0 # DTB misses +drivesys.cpu.itb.data_acv 0 # DTB access violations +drivesys.cpu.itb.data_accesses 0 # DTB accesses +drivesys.cpu.numCycles 801651324 # number of cpu cycles simulated +drivesys.cpu.numWorkItemsStarted 0 # number of work items this cpu started +drivesys.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed +drivesys.cpu.committedInsts 19050784 # Number of instructions committed +drivesys.cpu.committedOps 19050784 # Number of ops (including micro ops) committed +drivesys.cpu.num_int_alu_accesses 17740632 # Number of integer alu accesses +drivesys.cpu.num_fp_alu_accesses 1412 # Number of float alu accesses +drivesys.cpu.num_func_calls 1265024 # number of times a function call or return occured +drivesys.cpu.num_conditional_control_insts 1264985 # number of instructions that are conditional controls +drivesys.cpu.num_int_insts 17740632 # number of integer instructions +drivesys.cpu.num_fp_insts 1412 # number of float instructions +drivesys.cpu.num_int_register_reads 23072330 # number of times the integer registers were read +drivesys.cpu.num_int_register_writes 13981107 # number of times the integer registers were written +drivesys.cpu.num_fp_register_reads 760 # number of times the floating registers were read +drivesys.cpu.num_fp_register_writes 766 # number of times the floating registers were written +drivesys.cpu.num_mem_refs 5830788 # number of memory refs +drivesys.cpu.num_load_insts 3746196 # Number of load instructions +drivesys.cpu.num_store_insts 2084592 # Number of store instructions +drivesys.cpu.num_idle_cycles 782619252.927065 # Number of idle cycles +drivesys.cpu.num_busy_cycles 19032071.072935 # Number of busy cycles +drivesys.cpu.not_idle_fraction 0.023741 # Percentage of non-idle cycles +drivesys.cpu.idle_fraction 0.976259 # Percentage of idle cycles +drivesys.cpu.Branches 2793313 # Number of branches fetched +drivesys.cpu.op_class::No_OpClass 623554 3.27% 3.27% # Class of executed instruction +drivesys.cpu.op_class::IntAlu 11538627 60.57% 63.84% # Class of executed instruction +drivesys.cpu.op_class::IntMult 20663 0.11% 63.95% # Class of executed instruction +drivesys.cpu.op_class::IntDiv 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::FloatAdd 141 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::FloatCmp 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::FloatCvt 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::FloatMult 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::FloatDiv 23 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::FloatSqrt 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::SimdAdd 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::SimdAddAcc 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::SimdAlu 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::SimdCmp 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::SimdCvt 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::SimdMisc 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::SimdMult 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::SimdMultAcc 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::SimdShift 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::SimdShiftAcc 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::SimdSqrt 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::SimdFloatAdd 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::SimdFloatAlu 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::SimdFloatCmp 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::SimdFloatCvt 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::SimdFloatDiv 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::SimdFloatMisc 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::SimdFloatMult 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::SimdFloatMultAcc 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::SimdFloatSqrt 0 0.00% 63.95% # Class of executed instruction +drivesys.cpu.op_class::MemRead 4026028 21.13% 85.08% # Class of executed instruction +drivesys.cpu.op_class::MemWrite 2085021 10.94% 96.02% # Class of executed instruction +drivesys.cpu.op_class::IprAccess 757336 3.98% 100.00% # Class of executed instruction +drivesys.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction +drivesys.cpu.op_class::total 19051393 # Class of executed instruction +drivesys.cpu.kern.inst.arm 0 # number of arm instructions executed +drivesys.cpu.kern.inst.quiesce 19876 # number of quiesce instructions executed +drivesys.cpu.kern.inst.hwrei 143591 # number of hwrei instructions executed +drivesys.cpu.kern.ipl_count::0 60359 42.42% 42.42% # number of times we switched to this ipl +drivesys.cpu.kern.ipl_count::21 19727 13.86% 56.28% # number of times we switched to this ipl +drivesys.cpu.kern.ipl_count::22 205 0.14% 56.42% # number of times we switched to this ipl +drivesys.cpu.kern.ipl_count::31 62011 43.58% 100.00% # number of times we switched to this ipl +drivesys.cpu.kern.ipl_count::total 142302 # number of times we switched to this ipl +drivesys.cpu.kern.ipl_good::0 60359 42.91% 42.91% # number of times we switched to this ipl from a different ipl +drivesys.cpu.kern.ipl_good::21 19727 14.03% 56.94% # number of times we switched to this ipl from a different ipl +drivesys.cpu.kern.ipl_good::22 205 0.15% 57.09% # number of times we switched to this ipl from a different ipl +drivesys.cpu.kern.ipl_good::31 60360 42.91% 100.00% # number of times we switched to this ipl from a different ipl +drivesys.cpu.kern.ipl_good::total 140651 # number of times we switched to this ipl from a different ipl +drivesys.cpu.kern.ipl_ticks::0 197399332500 98.50% 98.50% # number of cycles we spent at this ipl +drivesys.cpu.kern.ipl_ticks::21 798910750 0.40% 98.90% # number of cycles we spent at this ipl +drivesys.cpu.kern.ipl_ticks::22 4407500 0.00% 98.90% # number of cycles we spent at this ipl +drivesys.cpu.kern.ipl_ticks::31 2205211250 1.10% 100.00% # number of cycles we spent at this ipl +drivesys.cpu.kern.ipl_ticks::total 200407862000 # number of cycles we spent at this ipl +drivesys.cpu.kern.ipl_used::0 1 # fraction of swpipl calls that actually changed the ipl +drivesys.cpu.kern.ipl_used::21 1 # fraction of swpipl calls that actually changed the ipl +drivesys.cpu.kern.ipl_used::22 1 # fraction of swpipl calls that actually changed the ipl +drivesys.cpu.kern.ipl_used::31 0.973376 # fraction of swpipl calls that actually changed the ipl +drivesys.cpu.kern.ipl_used::total 0.988398 # fraction of swpipl calls that actually changed the ipl +drivesys.cpu.kern.syscall::2 1 4.55% 4.55% # number of syscalls executed +drivesys.cpu.kern.syscall::6 3 13.64% 18.18% # number of syscalls executed +drivesys.cpu.kern.syscall::17 2 9.09% 27.27% # number of syscalls executed +drivesys.cpu.kern.syscall::97 1 4.55% 31.82% # number of syscalls executed +drivesys.cpu.kern.syscall::99 2 9.09% 40.91% # number of syscalls executed +drivesys.cpu.kern.syscall::101 2 9.09% 50.00% # number of syscalls executed +drivesys.cpu.kern.syscall::102 3 13.64% 63.64% # number of syscalls executed +drivesys.cpu.kern.syscall::104 1 4.55% 68.18% # number of syscalls executed +drivesys.cpu.kern.syscall::105 3 13.64% 81.82% # number of syscalls executed +drivesys.cpu.kern.syscall::106 1 4.55% 86.36% # number of syscalls executed +drivesys.cpu.kern.syscall::118 2 9.09% 95.45% # number of syscalls executed +drivesys.cpu.kern.syscall::150 1 4.55% 100.00% # number of syscalls executed +drivesys.cpu.kern.syscall::total 22 # number of syscalls executed +drivesys.cpu.kern.callpal::swpctx 72 0.06% 0.06% # number of callpals executed +drivesys.cpu.kern.callpal::tbi 5 0.00% 0.06% # number of callpals executed +drivesys.cpu.kern.callpal::swpipl 102333 83.31% 83.37% # number of callpals executed +drivesys.cpu.kern.callpal::rdps 354 0.29% 83.66% # number of callpals executed +drivesys.cpu.kern.callpal::rdusp 1 0.00% 83.66% # number of callpals executed +drivesys.cpu.kern.callpal::rti 20038 16.31% 99.97% # number of callpals executed +drivesys.cpu.kern.callpal::callsys 25 0.02% 99.99% # number of callpals executed +drivesys.cpu.kern.callpal::imb 7 0.01% 100.00% # number of callpals executed +drivesys.cpu.kern.callpal::total 122835 # number of callpals executed +drivesys.cpu.kern.mode_switch::kernel 214 # number of protection mode switches +drivesys.cpu.kern.mode_switch::user 140 # number of protection mode switches +drivesys.cpu.kern.mode_switch::idle 19896 # number of protection mode switches +drivesys.cpu.kern.mode_good::kernel 144 +drivesys.cpu.kern.mode_good::user 140 +drivesys.cpu.kern.mode_good::idle 4 +drivesys.cpu.kern.mode_switch_good::kernel 0.672897 # fraction of useful protection mode switches +drivesys.cpu.kern.mode_switch_good::user 1 # fraction of useful protection mode switches +drivesys.cpu.kern.mode_switch_good::idle 0.000201 # fraction of useful protection mode switches +drivesys.cpu.kern.mode_switch_good::total 0.014222 # fraction of useful protection mode switches +drivesys.cpu.kern.mode_ticks::kernel 78134250 2.63% 2.63% # number of ticks spent at the given mode +drivesys.cpu.kern.mode_ticks::user 319668250 10.78% 13.41% # number of ticks spent at the given mode +drivesys.cpu.kern.mode_ticks::idle 2567942000 86.59% 100.00% # number of ticks spent at the given mode +drivesys.cpu.kern.swap_context 72 # number of times the context was actually changed +drivesys.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). +drivesys.disk0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). +drivesys.disk0.dma_read_txs 0 # Number of DMA read transactions (not PRD). +drivesys.disk0.dma_write_full_pages 0 # Number of full page size DMA writes. +drivesys.disk0.dma_write_bytes 0 # Number of bytes transfered via DMA writes. +drivesys.disk0.dma_write_txs 0 # Number of DMA write transactions. +drivesys.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). +drivesys.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). +drivesys.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD). +drivesys.disk2.dma_write_full_pages 0 # Number of full page size DMA writes. +drivesys.disk2.dma_write_bytes 0 # Number of bytes transfered via DMA writes. +drivesys.disk2.dma_write_txs 0 # Number of DMA write transactions. +drivesys.iobus.trans_dist::ReadReq 2484469 # Transaction distribution +drivesys.iobus.trans_dist::ReadResp 2484469 # Transaction distribution +drivesys.iobus.trans_dist::WriteReq 39723 # Transaction distribution +drivesys.iobus.trans_dist::WriteResp 39723 # Transaction distribution +drivesys.iobus.pkt_count_drivesys.bridge.master::drivesys.tsunami.cchip.pio 197670 # Packet count per connected master and slave (bytes) +drivesys.iobus.pkt_count_drivesys.bridge.master::drivesys.tsunami.ethernet.pio 78962 # Packet count per connected master and slave (bytes) +drivesys.iobus.pkt_count_drivesys.bridge.master::total 276632 # Packet count per connected master and slave (bytes) +drivesys.iobus.pkt_count_drivesys.tsunami.ethernet.dma::drivesys.iobridge.slave 4771752 # Packet count per connected master and slave (bytes) +drivesys.iobus.pkt_count_drivesys.tsunami.ethernet.dma::total 4771752 # Packet count per connected master and slave (bytes) +drivesys.iobus.pkt_count::total 5048384 # Packet count per connected master and slave (bytes) +drivesys.iobus.pkt_size_drivesys.bridge.master::drivesys.tsunami.cchip.pio 790680 # Cumulative packet size per connected master and slave (bytes) +drivesys.iobus.pkt_size_drivesys.bridge.master::drivesys.tsunami.ethernet.pio 157924 # Cumulative packet size per connected master and slave (bytes) +drivesys.iobus.pkt_size_drivesys.bridge.master::total 948604 # Cumulative packet size per connected master and slave (bytes) +drivesys.iobus.pkt_size_drivesys.tsunami.ethernet.dma::drivesys.iobridge.slave 57261614 # Cumulative packet size per connected master and slave (bytes) +drivesys.iobus.pkt_size_drivesys.tsunami.ethernet.dma::total 57261614 # Cumulative packet size per connected master and slave (bytes) +drivesys.iobus.pkt_size::total 58210218 # Cumulative packet size per connected master and slave (bytes) +drivesys.membus.trans_dist::ReadReq 25081955 # Transaction distribution +drivesys.membus.trans_dist::ReadResp 25182911 # Transaction distribution +drivesys.membus.trans_dist::WriteReq 1963575 # Transaction distribution +drivesys.membus.trans_dist::WriteResp 1963575 # Transaction distribution +drivesys.membus.trans_dist::LoadLockedReq 100956 # Transaction distribution +drivesys.membus.trans_dist::StoreCondReq 100924 # Transaction distribution +drivesys.membus.trans_dist::StoreCondResp 100924 # Transaction distribution +drivesys.membus.pkt_count_drivesys.cpu.icache_port::drivesys.physmem.port 38102786 # Packet count per connected master and slave (bytes) +drivesys.membus.pkt_count_drivesys.cpu.icache_port::total 38102786 # Packet count per connected master and slave (bytes) +drivesys.membus.pkt_count_drivesys.cpu.dcache_port::drivesys.bridge.slave 276632 # Packet count per connected master and slave (bytes) +drivesys.membus.pkt_count_drivesys.cpu.dcache_port::drivesys.physmem.port 11343650 # Packet count per connected master and slave (bytes) +drivesys.membus.pkt_count_drivesys.cpu.dcache_port::total 11620282 # Packet count per connected master and slave (bytes) +drivesys.membus.pkt_count_drivesys.iobridge.master::drivesys.physmem.port 4771752 # Packet count per connected master and slave (bytes) +drivesys.membus.pkt_count_drivesys.iobridge.master::total 4771752 # Packet count per connected master and slave (bytes) +drivesys.membus.pkt_count::total 54494820 # Packet count per connected master and slave (bytes) +drivesys.membus.pkt_size_drivesys.cpu.icache_port::drivesys.physmem.port 76205572 # Cumulative packet size per connected master and slave (bytes) +drivesys.membus.pkt_size_drivesys.cpu.icache_port::total 76205572 # Cumulative packet size per connected master and slave (bytes) +drivesys.membus.pkt_size_drivesys.cpu.dcache_port::drivesys.bridge.slave 948604 # Cumulative packet size per connected master and slave (bytes) +drivesys.membus.pkt_size_drivesys.cpu.dcache_port::drivesys.physmem.port 40903924 # Cumulative packet size per connected master and slave (bytes) +drivesys.membus.pkt_size_drivesys.cpu.dcache_port::total 41852528 # Cumulative packet size per connected master and slave (bytes) +drivesys.membus.pkt_size_drivesys.iobridge.master::drivesys.physmem.port 57261614 # Cumulative packet size per connected master and slave (bytes) +drivesys.membus.pkt_size_drivesys.iobridge.master::total 57261614 # Cumulative packet size per connected master and slave (bytes) +drivesys.membus.pkt_size::total 175319714 # Cumulative packet size per connected master and slave (bytes) +drivesys.membus.snoops 0 # Total snoops (count) +drivesys.membus.snoop_fanout::samples 27109094 # Request fanout histogram +drivesys.membus.snoop_fanout::mean 0.790778 # Request fanout histogram +drivesys.membus.snoop_fanout::stdev 0.406753 # Request fanout histogram +drivesys.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram +drivesys.membus.snoop_fanout::0 5671825 20.92% 20.92% # Request fanout histogram +drivesys.membus.snoop_fanout::1 21437269 79.08% 100.00% # Request fanout histogram +drivesys.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram +drivesys.membus.snoop_fanout::min_value 0 # Request fanout histogram +drivesys.membus.snoop_fanout::max_value 1 # Request fanout histogram +drivesys.membus.snoop_fanout::total 27109094 # Request fanout histogram +drivesys.tsunami.ethernet.clk_domain.clock 2000 # Clock period in ticks +drivesys.tsunami.ethernet.txBytes 798 # Bytes Transmitted +drivesys.tsunami.ethernet.rxBytes 960 # Bytes Received +drivesys.tsunami.ethernet.txPackets 5 # Number of Packets Transmitted +drivesys.tsunami.ethernet.rxPackets 8 # Number of Packets Received +drivesys.tsunami.ethernet.txIpChecksums 2 # Number of tx IP Checksums done by device +drivesys.tsunami.ethernet.rxIpChecksums 8 # Number of rx IP Checksums done by device +drivesys.tsunami.ethernet.txTcpChecksums 2 # Number of tx TCP Checksums done by device +drivesys.tsunami.ethernet.rxTcpChecksums 8 # Number of rx TCP Checksums done by device +drivesys.tsunami.ethernet.txUdpChecksums 0 # Number of tx UDP Checksums done by device +drivesys.tsunami.ethernet.rxUdpChecksums 0 # Number of rx UDP Checksums done by device +drivesys.tsunami.ethernet.descDMAReads 2385810 # Number of descriptors the device read w/ DMA +drivesys.tsunami.ethernet.descDMAWrites 13 # Number of descriptors the device wrote w/ DMA +drivesys.tsunami.ethernet.descDmaReadBytes 57259440 # number of descriptor bytes read w/ DMA +drivesys.tsunami.ethernet.descDmaWriteBytes 104 # number of descriptor bytes write w/ DMA +drivesys.tsunami.ethernet.totBandwidth 70176 # Total Bandwidth (bits/s) +drivesys.tsunami.ethernet.totPackets 13 # Total Packets +drivesys.tsunami.ethernet.totBytes 1758 # Total Bytes +drivesys.tsunami.ethernet.totPPS 65 # Total Tranmission Rate (packets/s) +drivesys.tsunami.ethernet.txBandwidth 31855 # Transmit Bandwidth (bits/s) +drivesys.tsunami.ethernet.rxBandwidth 38322 # Receive Bandwidth (bits/s) +drivesys.tsunami.ethernet.txPPS 25 # Packet Tranmission Rate (packets/s) +drivesys.tsunami.ethernet.rxPPS 40 # Packet Reception Rate (packets/s) +drivesys.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU +drivesys.tsunami.ethernet.coalescedSwi 0 # average number of Swi's coalesced into each post +drivesys.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR +drivesys.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU +drivesys.tsunami.ethernet.coalescedRxIdle 0 # average number of RxIdle's coalesced into each post +drivesys.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR +drivesys.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU +drivesys.tsunami.ethernet.coalescedRxOk 0 # average number of RxOk's coalesced into each post +drivesys.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR +drivesys.tsunami.ethernet.postedRxDesc 8 # number of RxDesc interrupts posted to CPU +drivesys.tsunami.ethernet.coalescedRxDesc 0 # average number of RxDesc's coalesced into each post +drivesys.tsunami.ethernet.totalRxDesc 8 # total number of RxDesc written to ISR +drivesys.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU +drivesys.tsunami.ethernet.coalescedTxOk 0 # average number of TxOk's coalesced into each post +drivesys.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR +drivesys.tsunami.ethernet.postedTxIdle 19726 # number of TxIdle interrupts posted to CPU +drivesys.tsunami.ethernet.coalescedTxIdle 1 # average number of TxIdle's coalesced into each post +drivesys.tsunami.ethernet.totalTxIdle 2385810 # total number of TxIdle written to ISR +drivesys.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU +drivesys.tsunami.ethernet.coalescedTxDesc 0 # average number of TxDesc's coalesced into each post +drivesys.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR +drivesys.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU +drivesys.tsunami.ethernet.coalescedRxOrn 0 # average number of RxOrn's coalesced into each post +drivesys.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR +drivesys.tsunami.ethernet.coalescedTotal 1 # average number of interrupts coalesced into each post +drivesys.tsunami.ethernet.postedInterrupts 2385831 # number of posts to CPU +drivesys.tsunami.ethernet.droppedPackets 0 # number of packets dropped testsys.voltage_domain.voltage 1 # Voltage in Volts testsys.clk_domain.clock 1000 # Clock period in ticks testsys.physmem.bytes_read::cpu.inst 81044080 # Number of bytes read from this memory @@ -42,52 +335,6 @@ testsys.physmem.bw_total::cpu.inst 404392869 # To testsys.physmem.bw_total::cpu.data 221698925 # Total bandwidth to/from this memory (bytes/s) testsys.physmem.bw_total::tsunami.ethernet 285722301 # Total bandwidth to/from this memory (bytes/s) testsys.physmem.bw_total::total 911814095 # Total bandwidth to/from this memory (bytes/s) -testsys.membus.trans_dist::ReadReq 26478762 # Transaction distribution -testsys.membus.trans_dist::ReadResp 26587372 # Transaction distribution -testsys.membus.trans_dist::WriteReq 2189273 # Transaction distribution -testsys.membus.trans_dist::WriteResp 2189273 # Transaction distribution -testsys.membus.trans_dist::LoadLockedReq 108610 # Transaction distribution -testsys.membus.trans_dist::StoreCondReq 108528 # Transaction distribution -testsys.membus.trans_dist::StoreCondResp 108528 # Transaction distribution -testsys.membus.pkt_count_testsys.cpu.icache_port::testsys.physmem.port 40522040 # Packet count per connected master and slave (bytes) -testsys.membus.pkt_count_testsys.cpu.icache_port::total 40522040 # Packet count per connected master and slave (bytes) -testsys.membus.pkt_count_testsys.cpu.dcache_port::testsys.bridge.slave 275298 # Packet count per connected master and slave (bytes) -testsys.membus.pkt_count_testsys.cpu.dcache_port::testsys.physmem.port 12201274 # Packet count per connected master and slave (bytes) -testsys.membus.pkt_count_testsys.cpu.dcache_port::total 12476572 # Packet count per connected master and slave (bytes) -testsys.membus.pkt_count_testsys.iobridge.master::testsys.physmem.port 4771734 # Packet count per connected master and slave (bytes) -testsys.membus.pkt_count_testsys.iobridge.master::total 4771734 # Packet count per connected master and slave (bytes) -testsys.membus.pkt_count::total 57770346 # Packet count per connected master and slave (bytes) -testsys.membus.pkt_size_testsys.cpu.icache_port::testsys.physmem.port 81044080 # Cumulative packet size per connected master and slave (bytes) -testsys.membus.pkt_size_testsys.cpu.icache_port::total 81044080 # Cumulative packet size per connected master and slave (bytes) -testsys.membus.pkt_size_testsys.cpu.dcache_port::testsys.bridge.slave 942152 # Cumulative packet size per connected master and slave (bytes) -testsys.membus.pkt_size_testsys.cpu.dcache_port::testsys.physmem.port 44430520 # Cumulative packet size per connected master and slave (bytes) -testsys.membus.pkt_size_testsys.cpu.dcache_port::total 45372672 # Cumulative packet size per connected master and slave (bytes) -testsys.membus.pkt_size_testsys.iobridge.master::testsys.physmem.port 57261398 # Cumulative packet size per connected master and slave (bytes) -testsys.membus.pkt_size_testsys.iobridge.master::total 57261398 # Cumulative packet size per connected master and slave (bytes) -testsys.membus.pkt_size::total 183678150 # Cumulative packet size per connected master and slave (bytes) -testsys.membus.snoops 0 # Total snoops (count) -testsys.membus.snoop_fanout::samples 28747524 # Request fanout histogram -testsys.membus.snoop_fanout::mean 0.787786 # Request fanout histogram -testsys.membus.snoop_fanout::stdev 0.408876 # Request fanout histogram -testsys.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram -testsys.membus.snoop_fanout::0 6100637 21.22% 21.22% # Request fanout histogram -testsys.membus.snoop_fanout::1 22646887 78.78% 100.00% # Request fanout histogram -testsys.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram -testsys.membus.snoop_fanout::min_value 0 # Request fanout histogram -testsys.membus.snoop_fanout::max_value 1 # Request fanout histogram -testsys.membus.snoop_fanout::total 28747524 # Request fanout histogram -testsys.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). -testsys.disk0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). -testsys.disk0.dma_read_txs 0 # Number of DMA read transactions (not PRD). -testsys.disk0.dma_write_full_pages 0 # Number of full page size DMA writes. -testsys.disk0.dma_write_bytes 0 # Number of bytes transfered via DMA writes. -testsys.disk0.dma_write_txs 0 # Number of DMA write transactions. -testsys.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). -testsys.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). -testsys.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD). -testsys.disk2.dma_write_full_pages 0 # Number of full page size DMA writes. -testsys.disk2.dma_write_bytes 0 # Number of bytes transfered via DMA writes. -testsys.disk2.dma_write_txs 0 # Number of DMA write transactions. testsys.cpu.clk_domain.clock 500 # Clock period in ticks testsys.cpu.dtb.fetch_hits 0 # ITB hits testsys.cpu.dtb.fetch_misses 0 # ITB misses @@ -248,6 +495,72 @@ testsys.cpu.kern.mode_ticks::kernel 994253000 59.96% 59.96% # nu testsys.cpu.kern.mode_ticks::user 533088000 32.15% 92.11% # number of ticks spent at the given mode testsys.cpu.kern.mode_ticks::idle 130749000 7.89% 100.00% # number of ticks spent at the given mode testsys.cpu.kern.swap_context 438 # number of times the context was actually changed +testsys.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). +testsys.disk0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). +testsys.disk0.dma_read_txs 0 # Number of DMA read transactions (not PRD). +testsys.disk0.dma_write_full_pages 0 # Number of full page size DMA writes. +testsys.disk0.dma_write_bytes 0 # Number of bytes transfered via DMA writes. +testsys.disk0.dma_write_txs 0 # Number of DMA write transactions. +testsys.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). +testsys.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). +testsys.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD). +testsys.disk2.dma_write_full_pages 0 # Number of full page size DMA writes. +testsys.disk2.dma_write_bytes 0 # Number of bytes transfered via DMA writes. +testsys.disk2.dma_write_txs 0 # Number of DMA write transactions. +testsys.iobus.trans_dist::ReadReq 2483943 # Transaction distribution +testsys.iobus.trans_dist::ReadResp 2483943 # Transaction distribution +testsys.iobus.trans_dist::WriteReq 39573 # Transaction distribution +testsys.iobus.trans_dist::WriteResp 39573 # Transaction distribution +testsys.iobus.pkt_count_testsys.bridge.master::testsys.tsunami.cchip.pio 196204 # Packet count per connected master and slave (bytes) +testsys.iobus.pkt_count_testsys.bridge.master::testsys.tsunami.io.pio 336 # Packet count per connected master and slave (bytes) +testsys.iobus.pkt_count_testsys.bridge.master::testsys.tsunami.uart.pio 428 # Packet count per connected master and slave (bytes) +testsys.iobus.pkt_count_testsys.bridge.master::testsys.tsunami.ethernet.pio 78330 # Packet count per connected master and slave (bytes) +testsys.iobus.pkt_count_testsys.bridge.master::total 275298 # Packet count per connected master and slave (bytes) +testsys.iobus.pkt_count_testsys.tsunami.ethernet.dma::testsys.iobridge.slave 4771734 # Packet count per connected master and slave (bytes) +testsys.iobus.pkt_count_testsys.tsunami.ethernet.dma::total 4771734 # Packet count per connected master and slave (bytes) +testsys.iobus.pkt_count::total 5047032 # Packet count per connected master and slave (bytes) +testsys.iobus.pkt_size_testsys.bridge.master::testsys.tsunami.cchip.pio 784816 # Cumulative packet size per connected master and slave (bytes) +testsys.iobus.pkt_size_testsys.bridge.master::testsys.tsunami.io.pio 462 # Cumulative packet size per connected master and slave (bytes) +testsys.iobus.pkt_size_testsys.bridge.master::testsys.tsunami.uart.pio 214 # Cumulative packet size per connected master and slave (bytes) +testsys.iobus.pkt_size_testsys.bridge.master::testsys.tsunami.ethernet.pio 156660 # Cumulative packet size per connected master and slave (bytes) +testsys.iobus.pkt_size_testsys.bridge.master::total 942152 # Cumulative packet size per connected master and slave (bytes) +testsys.iobus.pkt_size_testsys.tsunami.ethernet.dma::testsys.iobridge.slave 57261398 # Cumulative packet size per connected master and slave (bytes) +testsys.iobus.pkt_size_testsys.tsunami.ethernet.dma::total 57261398 # Cumulative packet size per connected master and slave (bytes) +testsys.iobus.pkt_size::total 58203550 # Cumulative packet size per connected master and slave (bytes) +testsys.membus.trans_dist::ReadReq 26478762 # Transaction distribution +testsys.membus.trans_dist::ReadResp 26587372 # Transaction distribution +testsys.membus.trans_dist::WriteReq 2189273 # Transaction distribution +testsys.membus.trans_dist::WriteResp 2189273 # Transaction distribution +testsys.membus.trans_dist::LoadLockedReq 108610 # Transaction distribution +testsys.membus.trans_dist::StoreCondReq 108528 # Transaction distribution +testsys.membus.trans_dist::StoreCondResp 108528 # Transaction distribution +testsys.membus.pkt_count_testsys.cpu.icache_port::testsys.physmem.port 40522040 # Packet count per connected master and slave (bytes) +testsys.membus.pkt_count_testsys.cpu.icache_port::total 40522040 # Packet count per connected master and slave (bytes) +testsys.membus.pkt_count_testsys.cpu.dcache_port::testsys.bridge.slave 275298 # Packet count per connected master and slave (bytes) +testsys.membus.pkt_count_testsys.cpu.dcache_port::testsys.physmem.port 12201274 # Packet count per connected master and slave (bytes) +testsys.membus.pkt_count_testsys.cpu.dcache_port::total 12476572 # Packet count per connected master and slave (bytes) +testsys.membus.pkt_count_testsys.iobridge.master::testsys.physmem.port 4771734 # Packet count per connected master and slave (bytes) +testsys.membus.pkt_count_testsys.iobridge.master::total 4771734 # Packet count per connected master and slave (bytes) +testsys.membus.pkt_count::total 57770346 # Packet count per connected master and slave (bytes) +testsys.membus.pkt_size_testsys.cpu.icache_port::testsys.physmem.port 81044080 # Cumulative packet size per connected master and slave (bytes) +testsys.membus.pkt_size_testsys.cpu.icache_port::total 81044080 # Cumulative packet size per connected master and slave (bytes) +testsys.membus.pkt_size_testsys.cpu.dcache_port::testsys.bridge.slave 942152 # Cumulative packet size per connected master and slave (bytes) +testsys.membus.pkt_size_testsys.cpu.dcache_port::testsys.physmem.port 44430520 # Cumulative packet size per connected master and slave (bytes) +testsys.membus.pkt_size_testsys.cpu.dcache_port::total 45372672 # Cumulative packet size per connected master and slave (bytes) +testsys.membus.pkt_size_testsys.iobridge.master::testsys.physmem.port 57261398 # Cumulative packet size per connected master and slave (bytes) +testsys.membus.pkt_size_testsys.iobridge.master::total 57261398 # Cumulative packet size per connected master and slave (bytes) +testsys.membus.pkt_size::total 183678150 # Cumulative packet size per connected master and slave (bytes) +testsys.membus.snoops 0 # Total snoops (count) +testsys.membus.snoop_fanout::samples 28747524 # Request fanout histogram +testsys.membus.snoop_fanout::mean 0.787786 # Request fanout histogram +testsys.membus.snoop_fanout::stdev 0.408876 # Request fanout histogram +testsys.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram +testsys.membus.snoop_fanout::0 6100637 21.22% 21.22% # Request fanout histogram +testsys.membus.snoop_fanout::1 22646887 78.78% 100.00% # Request fanout histogram +testsys.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram +testsys.membus.snoop_fanout::min_value 0 # Request fanout histogram +testsys.membus.snoop_fanout::max_value 1 # Request fanout histogram +testsys.membus.snoop_fanout::total 28747524 # Request fanout histogram testsys.tsunami.ethernet.clk_domain.clock 2000 # Clock period in ticks testsys.tsunami.ethernet.txBytes 960 # Bytes Transmitted testsys.tsunami.ethernet.rxBytes 798 # Bytes Received @@ -298,124 +611,70 @@ testsys.tsunami.ethernet.totalRxOrn 0 # to testsys.tsunami.ethernet.coalescedTotal 1 # average number of interrupts coalesced into each post testsys.tsunami.ethernet.postedInterrupts 2385819 # number of posts to CPU testsys.tsunami.ethernet.droppedPackets 0 # number of packets dropped -testsys.iobus.trans_dist::ReadReq 2483943 # Transaction distribution -testsys.iobus.trans_dist::ReadResp 2483943 # Transaction distribution -testsys.iobus.trans_dist::WriteReq 39573 # Transaction distribution -testsys.iobus.trans_dist::WriteResp 39573 # Transaction distribution -testsys.iobus.pkt_count_testsys.bridge.master::testsys.tsunami.cchip.pio 196204 # Packet count per connected master and slave (bytes) -testsys.iobus.pkt_count_testsys.bridge.master::testsys.tsunami.io.pio 336 # Packet count per connected master and slave (bytes) -testsys.iobus.pkt_count_testsys.bridge.master::testsys.tsunami.uart.pio 428 # Packet count per connected master and slave (bytes) -testsys.iobus.pkt_count_testsys.bridge.master::testsys.tsunami.ethernet.pio 78330 # Packet count per connected master and slave (bytes) -testsys.iobus.pkt_count_testsys.bridge.master::total 275298 # Packet count per connected master and slave (bytes) -testsys.iobus.pkt_count_testsys.tsunami.ethernet.dma::testsys.iobridge.slave 4771734 # Packet count per connected master and slave (bytes) -testsys.iobus.pkt_count_testsys.tsunami.ethernet.dma::total 4771734 # Packet count per connected master and slave (bytes) -testsys.iobus.pkt_count::total 5047032 # Packet count per connected master and slave (bytes) -testsys.iobus.pkt_size_testsys.bridge.master::testsys.tsunami.cchip.pio 784816 # Cumulative packet size per connected master and slave (bytes) -testsys.iobus.pkt_size_testsys.bridge.master::testsys.tsunami.io.pio 462 # Cumulative packet size per connected master and slave (bytes) -testsys.iobus.pkt_size_testsys.bridge.master::testsys.tsunami.uart.pio 214 # Cumulative packet size per connected master and slave (bytes) -testsys.iobus.pkt_size_testsys.bridge.master::testsys.tsunami.ethernet.pio 156660 # Cumulative packet size per connected master and slave (bytes) -testsys.iobus.pkt_size_testsys.bridge.master::total 942152 # Cumulative packet size per connected master and slave (bytes) -testsys.iobus.pkt_size_testsys.tsunami.ethernet.dma::testsys.iobridge.slave 57261398 # Cumulative packet size per connected master and slave (bytes) -testsys.iobus.pkt_size_testsys.tsunami.ethernet.dma::total 57261398 # Cumulative packet size per connected master and slave (bytes) -testsys.iobus.pkt_size::total 58203550 # Cumulative packet size per connected master and slave (bytes) + +---------- End Simulation Statistics ---------- + +---------- Begin Simulation Statistics ---------- +sim_seconds 0.000407 # Number of seconds simulated +sim_ticks 407341500 # Number of ticks simulated +final_tick 4321620817500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) +sim_freq 1000000000000 # Frequency of simulated ticks +host_inst_rate 5226750004 # Simulator instruction rate (inst/s) +host_op_rate 5225740576 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 4062718512 # Simulator tick rate (ticks/s) +host_mem_usage 533084 # Number of bytes of host memory used +host_seconds 0.10 # Real time elapsed on the host +sim_insts 523853183 # Number of instructions simulated +sim_ops 523853183 # Number of ops (including micro ops) simulated drivesys.voltage_domain.voltage 1 # Voltage in Volts drivesys.clk_domain.clock 1000 # Clock period in ticks -drivesys.physmem.bytes_read::cpu.inst 76205572 # Number of bytes read from this memory -drivesys.physmem.bytes_read::cpu.data 26284292 # Number of bytes read from this memory -drivesys.physmem.bytes_read::tsunami.ethernet 57260550 # Number of bytes read from this memory -drivesys.physmem.bytes_read::total 159750414 # Number of bytes read from this memory -drivesys.physmem.bytes_inst_read::cpu.inst 76205572 # Number of instructions bytes read from this memory -drivesys.physmem.bytes_inst_read::total 76205572 # Number of instructions bytes read from this memory -drivesys.physmem.bytes_written::cpu.data 14619632 # Number of bytes written to this memory -drivesys.physmem.bytes_written::tsunami.ethernet 1064 # Number of bytes written to this memory -drivesys.physmem.bytes_written::total 14620696 # Number of bytes written to this memory -drivesys.physmem.num_reads::cpu.inst 19051393 # Number of read requests responded to by this memory -drivesys.physmem.num_reads::cpu.data 3647049 # Number of read requests responded to by this memory -drivesys.physmem.num_reads::tsunami.ethernet 2385839 # Number of read requests responded to by this memory -drivesys.physmem.num_reads::total 25084281 # Number of read requests responded to by this memory -drivesys.physmem.num_writes::cpu.data 2024776 # Number of write requests responded to by this memory -drivesys.physmem.num_writes::tsunami.ethernet 37 # Number of write requests responded to by this memory -drivesys.physmem.num_writes::total 2024813 # Number of write requests responded to by this memory -drivesys.physmem.bw_read::cpu.inst 380249734 # Total read bandwidth from this memory (bytes/s) -drivesys.physmem.bw_read::cpu.data 131153074 # Total read bandwidth from this memory (bytes/s) -drivesys.physmem.bw_read::tsunami.ethernet 285718069 # Total read bandwidth from this memory (bytes/s) -drivesys.physmem.bw_read::total 797120878 # Total read bandwidth from this memory (bytes/s) -drivesys.physmem.bw_inst_read::cpu.inst 380249734 # Instruction read bandwidth from this memory (bytes/s) -drivesys.physmem.bw_inst_read::total 380249734 # Instruction read bandwidth from this memory (bytes/s) -drivesys.physmem.bw_write::cpu.data 72948881 # Write bandwidth from this memory (bytes/s) -drivesys.physmem.bw_write::tsunami.ethernet 5309 # Write bandwidth from this memory (bytes/s) -drivesys.physmem.bw_write::total 72954190 # Write bandwidth from this memory (bytes/s) -drivesys.physmem.bw_total::cpu.inst 380249734 # Total bandwidth to/from this memory (bytes/s) -drivesys.physmem.bw_total::cpu.data 204101955 # Total bandwidth to/from this memory (bytes/s) -drivesys.physmem.bw_total::tsunami.ethernet 285723379 # Total bandwidth to/from this memory (bytes/s) -drivesys.physmem.bw_total::total 870075068 # Total bandwidth to/from this memory (bytes/s) -drivesys.membus.trans_dist::ReadReq 25081955 # Transaction distribution -drivesys.membus.trans_dist::ReadResp 25182911 # Transaction distribution -drivesys.membus.trans_dist::WriteReq 1963575 # Transaction distribution -drivesys.membus.trans_dist::WriteResp 1963575 # Transaction distribution -drivesys.membus.trans_dist::LoadLockedReq 100956 # Transaction distribution -drivesys.membus.trans_dist::StoreCondReq 100924 # Transaction distribution -drivesys.membus.trans_dist::StoreCondResp 100924 # Transaction distribution -drivesys.membus.pkt_count_drivesys.cpu.icache_port::drivesys.physmem.port 38102786 # Packet count per connected master and slave (bytes) -drivesys.membus.pkt_count_drivesys.cpu.icache_port::total 38102786 # Packet count per connected master and slave (bytes) -drivesys.membus.pkt_count_drivesys.cpu.dcache_port::drivesys.bridge.slave 276632 # Packet count per connected master and slave (bytes) -drivesys.membus.pkt_count_drivesys.cpu.dcache_port::drivesys.physmem.port 11343650 # Packet count per connected master and slave (bytes) -drivesys.membus.pkt_count_drivesys.cpu.dcache_port::total 11620282 # Packet count per connected master and slave (bytes) -drivesys.membus.pkt_count_drivesys.iobridge.master::drivesys.physmem.port 4771752 # Packet count per connected master and slave (bytes) -drivesys.membus.pkt_count_drivesys.iobridge.master::total 4771752 # Packet count per connected master and slave (bytes) -drivesys.membus.pkt_count::total 54494820 # Packet count per connected master and slave (bytes) -drivesys.membus.pkt_size_drivesys.cpu.icache_port::drivesys.physmem.port 76205572 # Cumulative packet size per connected master and slave (bytes) -drivesys.membus.pkt_size_drivesys.cpu.icache_port::total 76205572 # Cumulative packet size per connected master and slave (bytes) -drivesys.membus.pkt_size_drivesys.cpu.dcache_port::drivesys.bridge.slave 948604 # Cumulative packet size per connected master and slave (bytes) -drivesys.membus.pkt_size_drivesys.cpu.dcache_port::drivesys.physmem.port 40903924 # Cumulative packet size per connected master and slave (bytes) -drivesys.membus.pkt_size_drivesys.cpu.dcache_port::total 41852528 # Cumulative packet size per connected master and slave (bytes) -drivesys.membus.pkt_size_drivesys.iobridge.master::drivesys.physmem.port 57261614 # Cumulative packet size per connected master and slave (bytes) -drivesys.membus.pkt_size_drivesys.iobridge.master::total 57261614 # Cumulative packet size per connected master and slave (bytes) -drivesys.membus.pkt_size::total 175319714 # Cumulative packet size per connected master and slave (bytes) -drivesys.membus.snoops 0 # Total snoops (count) -drivesys.membus.snoop_fanout::samples 27109094 # Request fanout histogram -drivesys.membus.snoop_fanout::mean 0.790778 # Request fanout histogram -drivesys.membus.snoop_fanout::stdev 0.406753 # Request fanout histogram -drivesys.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram -drivesys.membus.snoop_fanout::0 5671825 20.92% 20.92% # Request fanout histogram -drivesys.membus.snoop_fanout::1 21437269 79.08% 100.00% # Request fanout histogram -drivesys.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram -drivesys.membus.snoop_fanout::min_value 0 # Request fanout histogram -drivesys.membus.snoop_fanout::max_value 1 # Request fanout histogram -drivesys.membus.snoop_fanout::total 27109094 # Request fanout histogram -drivesys.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). -drivesys.disk0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). -drivesys.disk0.dma_read_txs 0 # Number of DMA read transactions (not PRD). -drivesys.disk0.dma_write_full_pages 0 # Number of full page size DMA writes. -drivesys.disk0.dma_write_bytes 0 # Number of bytes transfered via DMA writes. -drivesys.disk0.dma_write_txs 0 # Number of DMA write transactions. -drivesys.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). -drivesys.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). -drivesys.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD). -drivesys.disk2.dma_write_full_pages 0 # Number of full page size DMA writes. -drivesys.disk2.dma_write_bytes 0 # Number of bytes transfered via DMA writes. -drivesys.disk2.dma_write_txs 0 # Number of DMA write transactions. +drivesys.physmem.bytes_read::cpu.inst 144608 # Number of bytes read from this memory +drivesys.physmem.bytes_read::cpu.data 49952 # Number of bytes read from this memory +drivesys.physmem.bytes_read::tsunami.ethernet 116400 # Number of bytes read from this memory +drivesys.physmem.bytes_read::total 310960 # Number of bytes read from this memory +drivesys.physmem.bytes_inst_read::cpu.inst 144608 # Number of instructions bytes read from this memory +drivesys.physmem.bytes_inst_read::total 144608 # Number of instructions bytes read from this memory +drivesys.physmem.bytes_written::cpu.data 27688 # Number of bytes written to this memory +drivesys.physmem.bytes_written::total 27688 # Number of bytes written to this memory +drivesys.physmem.num_reads::cpu.inst 36152 # Number of read requests responded to by this memory +drivesys.physmem.num_reads::cpu.data 6909 # Number of read requests responded to by this memory +drivesys.physmem.num_reads::tsunami.ethernet 4850 # Number of read requests responded to by this memory +drivesys.physmem.num_reads::total 47911 # Number of read requests responded to by this memory +drivesys.physmem.num_writes::cpu.data 3812 # Number of write requests responded to by this memory +drivesys.physmem.num_writes::total 3812 # Number of write requests responded to by this memory +drivesys.physmem.bw_read::cpu.inst 355004339 # Total read bandwidth from this memory (bytes/s) +drivesys.physmem.bw_read::cpu.data 122629293 # Total read bandwidth from this memory (bytes/s) +drivesys.physmem.bw_read::tsunami.ethernet 285755318 # Total read bandwidth from this memory (bytes/s) +drivesys.physmem.bw_read::total 763388950 # Total read bandwidth from this memory (bytes/s) +drivesys.physmem.bw_inst_read::cpu.inst 355004339 # Instruction read bandwidth from this memory (bytes/s) +drivesys.physmem.bw_inst_read::total 355004339 # Instruction read bandwidth from this memory (bytes/s) +drivesys.physmem.bw_write::cpu.data 67972451 # Write bandwidth from this memory (bytes/s) +drivesys.physmem.bw_write::total 67972451 # Write bandwidth from this memory (bytes/s) +drivesys.physmem.bw_total::cpu.inst 355004339 # Total bandwidth to/from this memory (bytes/s) +drivesys.physmem.bw_total::cpu.data 190601743 # Total bandwidth to/from this memory (bytes/s) +drivesys.physmem.bw_total::tsunami.ethernet 285755318 # Total bandwidth to/from this memory (bytes/s) +drivesys.physmem.bw_total::total 831361401 # Total bandwidth to/from this memory (bytes/s) drivesys.cpu.clk_domain.clock 250 # Clock period in ticks drivesys.cpu.dtb.fetch_hits 0 # ITB hits drivesys.cpu.dtb.fetch_misses 0 # ITB misses drivesys.cpu.dtb.fetch_acv 0 # ITB acv drivesys.cpu.dtb.fetch_accesses 0 # ITB accesses -drivesys.cpu.dtb.read_hits 3725273 # DTB read hits -drivesys.cpu.dtb.read_misses 487 # DTB read misses -drivesys.cpu.dtb.read_acv 30 # DTB read access violations -drivesys.cpu.dtb.read_accesses 267991 # DTB read accesses -drivesys.cpu.dtb.write_hits 2084079 # DTB write hits -drivesys.cpu.dtb.write_misses 82 # DTB write misses -drivesys.cpu.dtb.write_acv 10 # DTB write access violations -drivesys.cpu.dtb.write_accesses 133239 # DTB write accesses -drivesys.cpu.dtb.data_hits 5809352 # DTB hits -drivesys.cpu.dtb.data_misses 569 # DTB misses -drivesys.cpu.dtb.data_acv 40 # DTB access violations -drivesys.cpu.dtb.data_accesses 401230 # DTB accesses -drivesys.cpu.itb.fetch_hits 4197628 # ITB hits -drivesys.cpu.itb.fetch_misses 194 # ITB misses -drivesys.cpu.itb.fetch_acv 22 # ITB acv -drivesys.cpu.itb.fetch_accesses 4197822 # ITB accesses +drivesys.cpu.dtb.read_hits 7069 # DTB read hits +drivesys.cpu.dtb.read_misses 0 # DTB read misses +drivesys.cpu.dtb.read_acv 0 # DTB read access violations +drivesys.cpu.dtb.read_accesses 0 # DTB read accesses +drivesys.cpu.dtb.write_hits 3933 # DTB write hits +drivesys.cpu.dtb.write_misses 0 # DTB write misses +drivesys.cpu.dtb.write_acv 0 # DTB write access violations +drivesys.cpu.dtb.write_accesses 0 # DTB write accesses +drivesys.cpu.dtb.data_hits 11002 # DTB hits +drivesys.cpu.dtb.data_misses 0 # DTB misses +drivesys.cpu.dtb.data_acv 0 # DTB access violations +drivesys.cpu.dtb.data_accesses 0 # DTB accesses +drivesys.cpu.itb.fetch_hits 5992 # ITB hits +drivesys.cpu.itb.fetch_misses 0 # ITB misses +drivesys.cpu.itb.fetch_acv 0 # ITB acv +drivesys.cpu.itb.fetch_accesses 5992 # ITB accesses drivesys.cpu.itb.read_hits 0 # DTB read hits drivesys.cpu.itb.read_misses 0 # DTB read misses drivesys.cpu.itb.read_acv 0 # DTB read access violations @@ -428,146 +687,172 @@ drivesys.cpu.itb.data_hits 0 # DT drivesys.cpu.itb.data_misses 0 # DTB misses drivesys.cpu.itb.data_acv 0 # DTB access violations drivesys.cpu.itb.data_accesses 0 # DTB accesses -drivesys.cpu.numCycles 801651324 # number of cpu cycles simulated +drivesys.cpu.numCycles 1626281 # number of cpu cycles simulated drivesys.cpu.numWorkItemsStarted 0 # number of work items this cpu started drivesys.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed -drivesys.cpu.committedInsts 19050784 # Number of instructions committed -drivesys.cpu.committedOps 19050784 # Number of ops (including micro ops) committed -drivesys.cpu.num_int_alu_accesses 17740632 # Number of integer alu accesses -drivesys.cpu.num_fp_alu_accesses 1412 # Number of float alu accesses -drivesys.cpu.num_func_calls 1265024 # number of times a function call or return occured -drivesys.cpu.num_conditional_control_insts 1264985 # number of instructions that are conditional controls -drivesys.cpu.num_int_insts 17740632 # number of integer instructions -drivesys.cpu.num_fp_insts 1412 # number of float instructions -drivesys.cpu.num_int_register_reads 23072330 # number of times the integer registers were read -drivesys.cpu.num_int_register_writes 13981107 # number of times the integer registers were written -drivesys.cpu.num_fp_register_reads 760 # number of times the floating registers were read -drivesys.cpu.num_fp_register_writes 766 # number of times the floating registers were written -drivesys.cpu.num_mem_refs 5830788 # number of memory refs -drivesys.cpu.num_load_insts 3746196 # Number of load instructions -drivesys.cpu.num_store_insts 2084592 # Number of store instructions -drivesys.cpu.num_idle_cycles 782619252.927065 # Number of idle cycles -drivesys.cpu.num_busy_cycles 19032071.072935 # Number of busy cycles -drivesys.cpu.not_idle_fraction 0.023741 # Percentage of non-idle cycles -drivesys.cpu.idle_fraction 0.976259 # Percentage of idle cycles -drivesys.cpu.Branches 2793313 # Number of branches fetched -drivesys.cpu.op_class::No_OpClass 623554 3.27% 3.27% # Class of executed instruction -drivesys.cpu.op_class::IntAlu 11538627 60.57% 63.84% # Class of executed instruction -drivesys.cpu.op_class::IntMult 20663 0.11% 63.95% # Class of executed instruction -drivesys.cpu.op_class::IntDiv 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::FloatAdd 141 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::FloatCmp 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::FloatCvt 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::FloatMult 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::FloatDiv 23 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::FloatSqrt 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::SimdAdd 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::SimdAddAcc 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::SimdAlu 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::SimdCmp 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::SimdCvt 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::SimdMisc 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::SimdMult 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::SimdMultAcc 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::SimdShift 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::SimdShiftAcc 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::SimdSqrt 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::SimdFloatAdd 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::SimdFloatAlu 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::SimdFloatCmp 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::SimdFloatCvt 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::SimdFloatDiv 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::SimdFloatMisc 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::SimdFloatMult 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::SimdFloatMultAcc 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::SimdFloatSqrt 0 0.00% 63.95% # Class of executed instruction -drivesys.cpu.op_class::MemRead 4026028 21.13% 85.08% # Class of executed instruction -drivesys.cpu.op_class::MemWrite 2085021 10.94% 96.02% # Class of executed instruction -drivesys.cpu.op_class::IprAccess 757336 3.98% 100.00% # Class of executed instruction +drivesys.cpu.committedInsts 36152 # Number of instructions committed +drivesys.cpu.committedOps 36152 # Number of ops (including micro ops) committed +drivesys.cpu.num_int_alu_accesses 33516 # Number of integer alu accesses +drivesys.cpu.num_fp_alu_accesses 0 # Number of float alu accesses +drivesys.cpu.num_func_calls 2388 # number of times a function call or return occured +drivesys.cpu.num_conditional_control_insts 2347 # number of instructions that are conditional controls +drivesys.cpu.num_int_insts 33516 # number of integer instructions +drivesys.cpu.num_fp_insts 0 # number of float instructions +drivesys.cpu.num_int_register_reads 43772 # number of times the integer registers were read +drivesys.cpu.num_int_register_writes 26499 # number of times the integer registers were written +drivesys.cpu.num_fp_register_reads 0 # number of times the floating registers were read +drivesys.cpu.num_fp_register_writes 0 # number of times the floating registers were written +drivesys.cpu.num_mem_refs 11043 # number of memory refs +drivesys.cpu.num_load_insts 7109 # Number of load instructions +drivesys.cpu.num_store_insts 3934 # Number of store instructions +drivesys.cpu.num_idle_cycles 1590238.371734 # Number of idle cycles +drivesys.cpu.num_busy_cycles 36042.628266 # Number of busy cycles +drivesys.cpu.not_idle_fraction 0.022163 # Percentage of non-idle cycles +drivesys.cpu.idle_fraction 0.977837 # Percentage of idle cycles +drivesys.cpu.Branches 5243 # Number of branches fetched +drivesys.cpu.op_class::No_OpClass 1262 3.49% 3.49% # Class of executed instruction +drivesys.cpu.op_class::IntAlu 21687 59.99% 63.48% # Class of executed instruction +drivesys.cpu.op_class::IntMult 44 0.12% 63.60% # Class of executed instruction +drivesys.cpu.op_class::IntDiv 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::FloatAdd 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::FloatCmp 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::FloatCvt 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::FloatMult 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::FloatDiv 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::FloatSqrt 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::SimdAdd 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::SimdAddAcc 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::SimdAlu 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::SimdCmp 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::SimdCvt 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::SimdMisc 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::SimdMult 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::SimdMultAcc 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::SimdShift 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::SimdShiftAcc 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::SimdSqrt 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::SimdFloatAdd 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::SimdFloatAlu 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::SimdFloatCmp 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::SimdFloatCvt 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::SimdFloatDiv 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::SimdFloatMisc 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::SimdFloatMult 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::SimdFloatMultAcc 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::SimdFloatSqrt 0 0.00% 63.60% # Class of executed instruction +drivesys.cpu.op_class::MemRead 7678 21.24% 84.84% # Class of executed instruction +drivesys.cpu.op_class::MemWrite 3936 10.89% 95.73% # Class of executed instruction +drivesys.cpu.op_class::IprAccess 1545 4.27% 100.00% # Class of executed instruction drivesys.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction -drivesys.cpu.op_class::total 19051393 # Class of executed instruction +drivesys.cpu.op_class::total 36152 # Class of executed instruction drivesys.cpu.kern.inst.arm 0 # number of arm instructions executed -drivesys.cpu.kern.inst.quiesce 19876 # number of quiesce instructions executed -drivesys.cpu.kern.inst.hwrei 143591 # number of hwrei instructions executed -drivesys.cpu.kern.ipl_count::0 60359 42.42% 42.42% # number of times we switched to this ipl -drivesys.cpu.kern.ipl_count::21 19727 13.86% 56.28% # number of times we switched to this ipl -drivesys.cpu.kern.ipl_count::22 205 0.14% 56.42% # number of times we switched to this ipl -drivesys.cpu.kern.ipl_count::31 62011 43.58% 100.00% # number of times we switched to this ipl -drivesys.cpu.kern.ipl_count::total 142302 # number of times we switched to this ipl -drivesys.cpu.kern.ipl_good::0 60359 42.91% 42.91% # number of times we switched to this ipl from a different ipl -drivesys.cpu.kern.ipl_good::21 19727 14.03% 56.94% # number of times we switched to this ipl from a different ipl -drivesys.cpu.kern.ipl_good::22 205 0.15% 57.09% # number of times we switched to this ipl from a different ipl -drivesys.cpu.kern.ipl_good::31 60360 42.91% 100.00% # number of times we switched to this ipl from a different ipl -drivesys.cpu.kern.ipl_good::total 140651 # number of times we switched to this ipl from a different ipl -drivesys.cpu.kern.ipl_ticks::0 197399332500 98.50% 98.50% # number of cycles we spent at this ipl -drivesys.cpu.kern.ipl_ticks::21 798910750 0.40% 98.90% # number of cycles we spent at this ipl -drivesys.cpu.kern.ipl_ticks::22 4407500 0.00% 98.90% # number of cycles we spent at this ipl -drivesys.cpu.kern.ipl_ticks::31 2205211250 1.10% 100.00% # number of cycles we spent at this ipl -drivesys.cpu.kern.ipl_ticks::total 200407862000 # number of cycles we spent at this ipl +drivesys.cpu.kern.inst.quiesce 41 # number of quiesce instructions executed +drivesys.cpu.kern.inst.hwrei 295 # number of hwrei instructions executed +drivesys.cpu.kern.ipl_count::0 123 41.84% 41.84% # number of times we switched to this ipl +drivesys.cpu.kern.ipl_count::21 40 13.61% 55.44% # number of times we switched to this ipl +drivesys.cpu.kern.ipl_count::22 1 0.34% 55.78% # number of times we switched to this ipl +drivesys.cpu.kern.ipl_count::31 130 44.22% 100.00% # number of times we switched to this ipl +drivesys.cpu.kern.ipl_count::total 294 # number of times we switched to this ipl +drivesys.cpu.kern.ipl_good::0 123 42.86% 42.86% # number of times we switched to this ipl from a different ipl +drivesys.cpu.kern.ipl_good::21 40 13.94% 56.79% # number of times we switched to this ipl from a different ipl +drivesys.cpu.kern.ipl_good::22 1 0.35% 57.14% # number of times we switched to this ipl from a different ipl +drivesys.cpu.kern.ipl_good::31 123 42.86% 100.00% # number of times we switched to this ipl from a different ipl +drivesys.cpu.kern.ipl_good::total 287 # number of times we switched to this ipl from a different ipl +drivesys.cpu.kern.ipl_ticks::0 400289000 98.46% 98.46% # number of cycles we spent at this ipl +drivesys.cpu.kern.ipl_ticks::21 1620000 0.40% 98.86% # number of cycles we spent at this ipl +drivesys.cpu.kern.ipl_ticks::22 21500 0.01% 98.86% # number of cycles we spent at this ipl +drivesys.cpu.kern.ipl_ticks::31 4629500 1.14% 100.00% # number of cycles we spent at this ipl +drivesys.cpu.kern.ipl_ticks::total 406560000 # number of cycles we spent at this ipl drivesys.cpu.kern.ipl_used::0 1 # fraction of swpipl calls that actually changed the ipl drivesys.cpu.kern.ipl_used::21 1 # fraction of swpipl calls that actually changed the ipl drivesys.cpu.kern.ipl_used::22 1 # fraction of swpipl calls that actually changed the ipl -drivesys.cpu.kern.ipl_used::31 0.973376 # fraction of swpipl calls that actually changed the ipl -drivesys.cpu.kern.ipl_used::total 0.988398 # fraction of swpipl calls that actually changed the ipl -drivesys.cpu.kern.syscall::2 1 4.55% 4.55% # number of syscalls executed -drivesys.cpu.kern.syscall::6 3 13.64% 18.18% # number of syscalls executed -drivesys.cpu.kern.syscall::17 2 9.09% 27.27% # number of syscalls executed -drivesys.cpu.kern.syscall::97 1 4.55% 31.82% # number of syscalls executed -drivesys.cpu.kern.syscall::99 2 9.09% 40.91% # number of syscalls executed -drivesys.cpu.kern.syscall::101 2 9.09% 50.00% # number of syscalls executed -drivesys.cpu.kern.syscall::102 3 13.64% 63.64% # number of syscalls executed -drivesys.cpu.kern.syscall::104 1 4.55% 68.18% # number of syscalls executed -drivesys.cpu.kern.syscall::105 3 13.64% 81.82% # number of syscalls executed -drivesys.cpu.kern.syscall::106 1 4.55% 86.36% # number of syscalls executed -drivesys.cpu.kern.syscall::118 2 9.09% 95.45% # number of syscalls executed -drivesys.cpu.kern.syscall::150 1 4.55% 100.00% # number of syscalls executed -drivesys.cpu.kern.syscall::total 22 # number of syscalls executed -drivesys.cpu.kern.callpal::swpctx 72 0.06% 0.06% # number of callpals executed -drivesys.cpu.kern.callpal::tbi 5 0.00% 0.06% # number of callpals executed -drivesys.cpu.kern.callpal::swpipl 102333 83.31% 83.37% # number of callpals executed -drivesys.cpu.kern.callpal::rdps 354 0.29% 83.66% # number of callpals executed -drivesys.cpu.kern.callpal::rdusp 1 0.00% 83.66% # number of callpals executed -drivesys.cpu.kern.callpal::rti 20038 16.31% 99.97% # number of callpals executed -drivesys.cpu.kern.callpal::callsys 25 0.02% 99.99% # number of callpals executed -drivesys.cpu.kern.callpal::imb 7 0.01% 100.00% # number of callpals executed -drivesys.cpu.kern.callpal::total 122835 # number of callpals executed -drivesys.cpu.kern.mode_switch::kernel 214 # number of protection mode switches -drivesys.cpu.kern.mode_switch::user 140 # number of protection mode switches -drivesys.cpu.kern.mode_switch::idle 19896 # number of protection mode switches -drivesys.cpu.kern.mode_good::kernel 144 -drivesys.cpu.kern.mode_good::user 140 -drivesys.cpu.kern.mode_good::idle 4 -drivesys.cpu.kern.mode_switch_good::kernel 0.672897 # fraction of useful protection mode switches -drivesys.cpu.kern.mode_switch_good::user 1 # fraction of useful protection mode switches -drivesys.cpu.kern.mode_switch_good::idle 0.000201 # fraction of useful protection mode switches -drivesys.cpu.kern.mode_switch_good::total 0.014222 # fraction of useful protection mode switches -drivesys.cpu.kern.mode_ticks::kernel 78134250 2.63% 2.63% # number of ticks spent at the given mode -drivesys.cpu.kern.mode_ticks::user 319668250 10.78% 13.41% # number of ticks spent at the given mode -drivesys.cpu.kern.mode_ticks::idle 2567942000 86.59% 100.00% # number of ticks spent at the given mode -drivesys.cpu.kern.swap_context 72 # number of times the context was actually changed +drivesys.cpu.kern.ipl_used::31 0.946154 # fraction of swpipl calls that actually changed the ipl +drivesys.cpu.kern.ipl_used::total 0.976190 # fraction of swpipl calls that actually changed the ipl +drivesys.cpu.kern.callpal::swpipl 212 83.46% 83.46% # number of callpals executed +drivesys.cpu.kern.callpal::rdps 1 0.39% 83.86% # number of callpals executed +drivesys.cpu.kern.callpal::rti 41 16.14% 100.00% # number of callpals executed +drivesys.cpu.kern.callpal::total 254 # number of callpals executed +drivesys.cpu.kern.mode_switch::kernel 0 # number of protection mode switches +drivesys.cpu.kern.mode_switch::user 0 # number of protection mode switches +drivesys.cpu.kern.mode_switch::idle 41 # number of protection mode switches +drivesys.cpu.kern.mode_good::kernel 0 +drivesys.cpu.kern.mode_good::user 0 +drivesys.cpu.kern.mode_good::idle 0 +drivesys.cpu.kern.mode_switch_good::kernel nan # fraction of useful protection mode switches +drivesys.cpu.kern.mode_switch_good::user nan # fraction of useful protection mode switches +drivesys.cpu.kern.mode_switch_good::idle 0 # fraction of useful protection mode switches +drivesys.cpu.kern.mode_switch_good::total 0 # fraction of useful protection mode switches +drivesys.cpu.kern.mode_ticks::kernel 0 # number of ticks spent at the given mode +drivesys.cpu.kern.mode_ticks::user 0 # number of ticks spent at the given mode +drivesys.cpu.kern.mode_ticks::idle 0 # number of ticks spent at the given mode +drivesys.cpu.kern.swap_context 0 # number of times the context was actually changed +drivesys.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). +drivesys.disk0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). +drivesys.disk0.dma_read_txs 0 # Number of DMA read transactions (not PRD). +drivesys.disk0.dma_write_full_pages 0 # Number of full page size DMA writes. +drivesys.disk0.dma_write_bytes 0 # Number of bytes transfered via DMA writes. +drivesys.disk0.dma_write_txs 0 # Number of DMA write transactions. +drivesys.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). +drivesys.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). +drivesys.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD). +drivesys.disk2.dma_write_full_pages 0 # Number of full page size DMA writes. +drivesys.disk2.dma_write_bytes 0 # Number of bytes transfered via DMA writes. +drivesys.disk2.dma_write_txs 0 # Number of DMA write transactions. +drivesys.iobus.trans_dist::ReadReq 5050 # Transaction distribution +drivesys.iobus.trans_dist::ReadResp 5050 # Transaction distribution +drivesys.iobus.trans_dist::WriteReq 81 # Transaction distribution +drivesys.iobus.trans_dist::WriteResp 81 # Transaction distribution +drivesys.iobus.pkt_count_drivesys.bridge.master::drivesys.tsunami.cchip.pio 402 # Packet count per connected master and slave (bytes) +drivesys.iobus.pkt_count_drivesys.bridge.master::drivesys.tsunami.ethernet.pio 160 # Packet count per connected master and slave (bytes) +drivesys.iobus.pkt_count_drivesys.bridge.master::total 562 # Packet count per connected master and slave (bytes) +drivesys.iobus.pkt_count_drivesys.tsunami.ethernet.dma::drivesys.iobridge.slave 9700 # Packet count per connected master and slave (bytes) +drivesys.iobus.pkt_count_drivesys.tsunami.ethernet.dma::total 9700 # Packet count per connected master and slave (bytes) +drivesys.iobus.pkt_count::total 10262 # Packet count per connected master and slave (bytes) +drivesys.iobus.pkt_size_drivesys.bridge.master::drivesys.tsunami.cchip.pio 1608 # Cumulative packet size per connected master and slave (bytes) +drivesys.iobus.pkt_size_drivesys.bridge.master::drivesys.tsunami.ethernet.pio 320 # Cumulative packet size per connected master and slave (bytes) +drivesys.iobus.pkt_size_drivesys.bridge.master::total 1928 # Cumulative packet size per connected master and slave (bytes) +drivesys.iobus.pkt_size_drivesys.tsunami.ethernet.dma::drivesys.iobridge.slave 116400 # Cumulative packet size per connected master and slave (bytes) +drivesys.iobus.pkt_size_drivesys.tsunami.ethernet.dma::total 116400 # Cumulative packet size per connected master and slave (bytes) +drivesys.iobus.pkt_size::total 118328 # Cumulative packet size per connected master and slave (bytes) +drivesys.membus.trans_dist::ReadReq 47907 # Transaction distribution +drivesys.membus.trans_dist::ReadResp 48111 # Transaction distribution +drivesys.membus.trans_dist::WriteReq 3689 # Transaction distribution +drivesys.membus.trans_dist::WriteResp 3689 # Transaction distribution +drivesys.membus.trans_dist::LoadLockedReq 204 # Transaction distribution +drivesys.membus.trans_dist::StoreCondReq 204 # Transaction distribution +drivesys.membus.trans_dist::StoreCondResp 204 # Transaction distribution +drivesys.membus.pkt_count_drivesys.cpu.icache_port::drivesys.physmem.port 72304 # Packet count per connected master and slave (bytes) +drivesys.membus.pkt_count_drivesys.cpu.icache_port::total 72304 # Packet count per connected master and slave (bytes) +drivesys.membus.pkt_count_drivesys.cpu.dcache_port::drivesys.bridge.slave 562 # Packet count per connected master and slave (bytes) +drivesys.membus.pkt_count_drivesys.cpu.dcache_port::drivesys.physmem.port 21442 # Packet count per connected master and slave (bytes) +drivesys.membus.pkt_count_drivesys.cpu.dcache_port::total 22004 # Packet count per connected master and slave (bytes) +drivesys.membus.pkt_count_drivesys.iobridge.master::drivesys.physmem.port 9700 # Packet count per connected master and slave (bytes) +drivesys.membus.pkt_count_drivesys.iobridge.master::total 9700 # Packet count per connected master and slave (bytes) +drivesys.membus.pkt_count::total 104008 # Packet count per connected master and slave (bytes) +drivesys.membus.pkt_size_drivesys.cpu.icache_port::drivesys.physmem.port 144608 # Cumulative packet size per connected master and slave (bytes) +drivesys.membus.pkt_size_drivesys.cpu.icache_port::total 144608 # Cumulative packet size per connected master and slave (bytes) +drivesys.membus.pkt_size_drivesys.cpu.dcache_port::drivesys.bridge.slave 1928 # Cumulative packet size per connected master and slave (bytes) +drivesys.membus.pkt_size_drivesys.cpu.dcache_port::drivesys.physmem.port 77640 # Cumulative packet size per connected master and slave (bytes) +drivesys.membus.pkt_size_drivesys.cpu.dcache_port::total 79568 # Cumulative packet size per connected master and slave (bytes) +drivesys.membus.pkt_size_drivesys.iobridge.master::drivesys.physmem.port 116400 # Cumulative packet size per connected master and slave (bytes) +drivesys.membus.pkt_size_drivesys.iobridge.master::total 116400 # Cumulative packet size per connected master and slave (bytes) +drivesys.membus.pkt_size::total 340576 # Cumulative packet size per connected master and slave (bytes) +drivesys.membus.snoops 0 # Total snoops (count) +drivesys.membus.snoop_fanout::samples 51723 # Request fanout histogram +drivesys.membus.snoop_fanout::mean 0.792723 # Request fanout histogram +drivesys.membus.snoop_fanout::stdev 0.405360 # Request fanout histogram +drivesys.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram +drivesys.membus.snoop_fanout::0 10721 20.73% 20.73% # Request fanout histogram +drivesys.membus.snoop_fanout::1 41002 79.27% 100.00% # Request fanout histogram +drivesys.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram +drivesys.membus.snoop_fanout::min_value 0 # Request fanout histogram +drivesys.membus.snoop_fanout::max_value 1 # Request fanout histogram +drivesys.membus.snoop_fanout::total 51723 # Request fanout histogram drivesys.tsunami.ethernet.clk_domain.clock 2000 # Clock period in ticks -drivesys.tsunami.ethernet.txBytes 798 # Bytes Transmitted -drivesys.tsunami.ethernet.rxBytes 960 # Bytes Received -drivesys.tsunami.ethernet.txPackets 5 # Number of Packets Transmitted -drivesys.tsunami.ethernet.rxPackets 8 # Number of Packets Received -drivesys.tsunami.ethernet.txIpChecksums 2 # Number of tx IP Checksums done by device -drivesys.tsunami.ethernet.rxIpChecksums 8 # Number of rx IP Checksums done by device -drivesys.tsunami.ethernet.txTcpChecksums 2 # Number of tx TCP Checksums done by device -drivesys.tsunami.ethernet.rxTcpChecksums 8 # Number of rx TCP Checksums done by device -drivesys.tsunami.ethernet.txUdpChecksums 0 # Number of tx UDP Checksums done by device -drivesys.tsunami.ethernet.rxUdpChecksums 0 # Number of rx UDP Checksums done by device -drivesys.tsunami.ethernet.descDMAReads 2385810 # Number of descriptors the device read w/ DMA -drivesys.tsunami.ethernet.descDMAWrites 13 # Number of descriptors the device wrote w/ DMA -drivesys.tsunami.ethernet.descDmaReadBytes 57259440 # number of descriptor bytes read w/ DMA -drivesys.tsunami.ethernet.descDmaWriteBytes 104 # number of descriptor bytes write w/ DMA -drivesys.tsunami.ethernet.totBandwidth 70176 # Total Bandwidth (bits/s) -drivesys.tsunami.ethernet.totPackets 13 # Total Packets -drivesys.tsunami.ethernet.totBytes 1758 # Total Bytes -drivesys.tsunami.ethernet.totPPS 65 # Total Tranmission Rate (packets/s) -drivesys.tsunami.ethernet.txBandwidth 31855 # Transmit Bandwidth (bits/s) -drivesys.tsunami.ethernet.rxBandwidth 38322 # Receive Bandwidth (bits/s) -drivesys.tsunami.ethernet.txPPS 25 # Packet Tranmission Rate (packets/s) -drivesys.tsunami.ethernet.rxPPS 40 # Packet Reception Rate (packets/s) +drivesys.tsunami.ethernet.descDMAReads 4850 # Number of descriptors the device read w/ DMA +drivesys.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA +drivesys.tsunami.ethernet.descDmaReadBytes 116400 # number of descriptor bytes read w/ DMA +drivesys.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA drivesys.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU drivesys.tsunami.ethernet.coalescedSwi 0 # average number of Swi's coalesced into each post drivesys.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR @@ -577,15 +862,15 @@ drivesys.tsunami.ethernet.totalRxIdle 0 # to drivesys.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU drivesys.tsunami.ethernet.coalescedRxOk 0 # average number of RxOk's coalesced into each post drivesys.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR -drivesys.tsunami.ethernet.postedRxDesc 8 # number of RxDesc interrupts posted to CPU +drivesys.tsunami.ethernet.postedRxDesc 0 # number of RxDesc interrupts posted to CPU drivesys.tsunami.ethernet.coalescedRxDesc 0 # average number of RxDesc's coalesced into each post -drivesys.tsunami.ethernet.totalRxDesc 8 # total number of RxDesc written to ISR +drivesys.tsunami.ethernet.totalRxDesc 0 # total number of RxDesc written to ISR drivesys.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU drivesys.tsunami.ethernet.coalescedTxOk 0 # average number of TxOk's coalesced into each post drivesys.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR -drivesys.tsunami.ethernet.postedTxIdle 19726 # number of TxIdle interrupts posted to CPU +drivesys.tsunami.ethernet.postedTxIdle 40 # number of TxIdle interrupts posted to CPU drivesys.tsunami.ethernet.coalescedTxIdle 1 # average number of TxIdle's coalesced into each post -drivesys.tsunami.ethernet.totalTxIdle 2385810 # total number of TxIdle written to ISR +drivesys.tsunami.ethernet.totalTxIdle 4850 # total number of TxIdle written to ISR drivesys.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU drivesys.tsunami.ethernet.coalescedTxDesc 0 # average number of TxDesc's coalesced into each post drivesys.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR @@ -593,39 +878,8 @@ drivesys.tsunami.ethernet.postedRxOrn 0 # nu drivesys.tsunami.ethernet.coalescedRxOrn 0 # average number of RxOrn's coalesced into each post drivesys.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR drivesys.tsunami.ethernet.coalescedTotal 1 # average number of interrupts coalesced into each post -drivesys.tsunami.ethernet.postedInterrupts 2385831 # number of posts to CPU +drivesys.tsunami.ethernet.postedInterrupts 4850 # number of posts to CPU drivesys.tsunami.ethernet.droppedPackets 0 # number of packets dropped -drivesys.iobus.trans_dist::ReadReq 2484469 # Transaction distribution -drivesys.iobus.trans_dist::ReadResp 2484469 # Transaction distribution -drivesys.iobus.trans_dist::WriteReq 39723 # Transaction distribution -drivesys.iobus.trans_dist::WriteResp 39723 # Transaction distribution -drivesys.iobus.pkt_count_drivesys.bridge.master::drivesys.tsunami.cchip.pio 197670 # Packet count per connected master and slave (bytes) -drivesys.iobus.pkt_count_drivesys.bridge.master::drivesys.tsunami.ethernet.pio 78962 # Packet count per connected master and slave (bytes) -drivesys.iobus.pkt_count_drivesys.bridge.master::total 276632 # Packet count per connected master and slave (bytes) -drivesys.iobus.pkt_count_drivesys.tsunami.ethernet.dma::drivesys.iobridge.slave 4771752 # Packet count per connected master and slave (bytes) -drivesys.iobus.pkt_count_drivesys.tsunami.ethernet.dma::total 4771752 # Packet count per connected master and slave (bytes) -drivesys.iobus.pkt_count::total 5048384 # Packet count per connected master and slave (bytes) -drivesys.iobus.pkt_size_drivesys.bridge.master::drivesys.tsunami.cchip.pio 790680 # Cumulative packet size per connected master and slave (bytes) -drivesys.iobus.pkt_size_drivesys.bridge.master::drivesys.tsunami.ethernet.pio 157924 # Cumulative packet size per connected master and slave (bytes) -drivesys.iobus.pkt_size_drivesys.bridge.master::total 948604 # Cumulative packet size per connected master and slave (bytes) -drivesys.iobus.pkt_size_drivesys.tsunami.ethernet.dma::drivesys.iobridge.slave 57261614 # Cumulative packet size per connected master and slave (bytes) -drivesys.iobus.pkt_size_drivesys.tsunami.ethernet.dma::total 57261614 # Cumulative packet size per connected master and slave (bytes) -drivesys.iobus.pkt_size::total 58210218 # Cumulative packet size per connected master and slave (bytes) - ----------- End Simulation Statistics ---------- - ----------- Begin Simulation Statistics ---------- -sim_seconds 0.000407 # Number of seconds simulated -sim_ticks 407341500 # Number of ticks simulated -final_tick 4321620817500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) -sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 7893991697 # Simulator instruction rate (inst/s) -host_op_rate 7892445581 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 6135954870 # Simulator tick rate (ticks/s) -host_mem_usage 534848 # Number of bytes of host memory used -host_seconds 0.07 # Real time elapsed on the host -sim_insts 523853183 # Number of instructions simulated -sim_ops 523853183 # Number of ops (including micro ops) simulated testsys.voltage_domain.voltage 1 # Voltage in Volts testsys.clk_domain.clock 1000 # Clock period in ticks testsys.physmem.bytes_read::cpu.inst 144504 # Number of bytes read from this memory @@ -654,52 +908,6 @@ testsys.physmem.bw_total::cpu.inst 354749025 # To testsys.physmem.bw_total::cpu.data 190601743 # Total bandwidth to/from this memory (bytes/s) testsys.physmem.bw_total::tsunami.ethernet 285696400 # Total bandwidth to/from this memory (bytes/s) testsys.physmem.bw_total::total 831047168 # Total bandwidth to/from this memory (bytes/s) -testsys.membus.trans_dist::ReadReq 47876 # Transaction distribution -testsys.membus.trans_dist::ReadResp 48080 # Transaction distribution -testsys.membus.trans_dist::WriteReq 3691 # Transaction distribution -testsys.membus.trans_dist::WriteResp 3691 # Transaction distribution -testsys.membus.trans_dist::LoadLockedReq 204 # Transaction distribution -testsys.membus.trans_dist::StoreCondReq 204 # Transaction distribution -testsys.membus.trans_dist::StoreCondResp 204 # Transaction distribution -testsys.membus.pkt_count_testsys.cpu.icache_port::testsys.physmem.port 72252 # Packet count per connected master and slave (bytes) -testsys.membus.pkt_count_testsys.cpu.icache_port::total 72252 # Packet count per connected master and slave (bytes) -testsys.membus.pkt_count_testsys.cpu.dcache_port::testsys.bridge.slave 562 # Packet count per connected master and slave (bytes) -testsys.membus.pkt_count_testsys.cpu.dcache_port::testsys.physmem.port 21438 # Packet count per connected master and slave (bytes) -testsys.membus.pkt_count_testsys.cpu.dcache_port::total 22000 # Packet count per connected master and slave (bytes) -testsys.membus.pkt_count_testsys.iobridge.master::testsys.physmem.port 9698 # Packet count per connected master and slave (bytes) -testsys.membus.pkt_count_testsys.iobridge.master::total 9698 # Packet count per connected master and slave (bytes) -testsys.membus.pkt_count::total 103950 # Packet count per connected master and slave (bytes) -testsys.membus.pkt_size_testsys.cpu.icache_port::testsys.physmem.port 144504 # Cumulative packet size per connected master and slave (bytes) -testsys.membus.pkt_size_testsys.cpu.icache_port::total 144504 # Cumulative packet size per connected master and slave (bytes) -testsys.membus.pkt_size_testsys.cpu.dcache_port::testsys.bridge.slave 1928 # Cumulative packet size per connected master and slave (bytes) -testsys.membus.pkt_size_testsys.cpu.dcache_port::testsys.physmem.port 77640 # Cumulative packet size per connected master and slave (bytes) -testsys.membus.pkt_size_testsys.cpu.dcache_port::total 79568 # Cumulative packet size per connected master and slave (bytes) -testsys.membus.pkt_size_testsys.iobridge.master::testsys.physmem.port 116376 # Cumulative packet size per connected master and slave (bytes) -testsys.membus.pkt_size_testsys.iobridge.master::total 116376 # Cumulative packet size per connected master and slave (bytes) -testsys.membus.pkt_size::total 340448 # Cumulative packet size per connected master and slave (bytes) -testsys.membus.snoops 0 # Total snoops (count) -testsys.membus.snoop_fanout::samples 51694 # Request fanout histogram -testsys.membus.snoop_fanout::mean 0.792645 # Request fanout histogram -testsys.membus.snoop_fanout::stdev 0.405416 # Request fanout histogram -testsys.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram -testsys.membus.snoop_fanout::0 10719 20.74% 20.74% # Request fanout histogram -testsys.membus.snoop_fanout::1 40975 79.26% 100.00% # Request fanout histogram -testsys.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram -testsys.membus.snoop_fanout::min_value 0 # Request fanout histogram -testsys.membus.snoop_fanout::max_value 1 # Request fanout histogram -testsys.membus.snoop_fanout::total 51694 # Request fanout histogram -testsys.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). -testsys.disk0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). -testsys.disk0.dma_read_txs 0 # Number of DMA read transactions (not PRD). -testsys.disk0.dma_write_full_pages 0 # Number of full page size DMA writes. -testsys.disk0.dma_write_bytes 0 # Number of bytes transfered via DMA writes. -testsys.disk0.dma_write_txs 0 # Number of DMA write transactions. -testsys.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). -testsys.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). -testsys.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD). -testsys.disk2.dma_write_full_pages 0 # Number of full page size DMA writes. -testsys.disk2.dma_write_bytes 0 # Number of bytes transfered via DMA writes. -testsys.disk2.dma_write_txs 0 # Number of DMA write transactions. testsys.cpu.clk_domain.clock 500 # Clock period in ticks testsys.cpu.dtb.fetch_hits 0 # ITB hits testsys.cpu.dtb.fetch_misses 0 # ITB misses @@ -832,6 +1040,68 @@ testsys.cpu.kern.mode_ticks::kernel 0 # nu testsys.cpu.kern.mode_ticks::user 0 # number of ticks spent at the given mode testsys.cpu.kern.mode_ticks::idle 0 # number of ticks spent at the given mode testsys.cpu.kern.swap_context 0 # number of times the context was actually changed +testsys.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). +testsys.disk0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). +testsys.disk0.dma_read_txs 0 # Number of DMA read transactions (not PRD). +testsys.disk0.dma_write_full_pages 0 # Number of full page size DMA writes. +testsys.disk0.dma_write_bytes 0 # Number of bytes transfered via DMA writes. +testsys.disk0.dma_write_txs 0 # Number of DMA write transactions. +testsys.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). +testsys.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). +testsys.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD). +testsys.disk2.dma_write_full_pages 0 # Number of full page size DMA writes. +testsys.disk2.dma_write_bytes 0 # Number of bytes transfered via DMA writes. +testsys.disk2.dma_write_txs 0 # Number of DMA write transactions. +testsys.iobus.trans_dist::ReadReq 5049 # Transaction distribution +testsys.iobus.trans_dist::ReadResp 5049 # Transaction distribution +testsys.iobus.trans_dist::WriteReq 81 # Transaction distribution +testsys.iobus.trans_dist::WriteResp 81 # Transaction distribution +testsys.iobus.pkt_count_testsys.bridge.master::testsys.tsunami.cchip.pio 402 # Packet count per connected master and slave (bytes) +testsys.iobus.pkt_count_testsys.bridge.master::testsys.tsunami.ethernet.pio 160 # Packet count per connected master and slave (bytes) +testsys.iobus.pkt_count_testsys.bridge.master::total 562 # Packet count per connected master and slave (bytes) +testsys.iobus.pkt_count_testsys.tsunami.ethernet.dma::testsys.iobridge.slave 9698 # Packet count per connected master and slave (bytes) +testsys.iobus.pkt_count_testsys.tsunami.ethernet.dma::total 9698 # Packet count per connected master and slave (bytes) +testsys.iobus.pkt_count::total 10260 # Packet count per connected master and slave (bytes) +testsys.iobus.pkt_size_testsys.bridge.master::testsys.tsunami.cchip.pio 1608 # Cumulative packet size per connected master and slave (bytes) +testsys.iobus.pkt_size_testsys.bridge.master::testsys.tsunami.ethernet.pio 320 # Cumulative packet size per connected master and slave (bytes) +testsys.iobus.pkt_size_testsys.bridge.master::total 1928 # Cumulative packet size per connected master and slave (bytes) +testsys.iobus.pkt_size_testsys.tsunami.ethernet.dma::testsys.iobridge.slave 116376 # Cumulative packet size per connected master and slave (bytes) +testsys.iobus.pkt_size_testsys.tsunami.ethernet.dma::total 116376 # Cumulative packet size per connected master and slave (bytes) +testsys.iobus.pkt_size::total 118304 # Cumulative packet size per connected master and slave (bytes) +testsys.membus.trans_dist::ReadReq 47876 # Transaction distribution +testsys.membus.trans_dist::ReadResp 48080 # Transaction distribution +testsys.membus.trans_dist::WriteReq 3691 # Transaction distribution +testsys.membus.trans_dist::WriteResp 3691 # Transaction distribution +testsys.membus.trans_dist::LoadLockedReq 204 # Transaction distribution +testsys.membus.trans_dist::StoreCondReq 204 # Transaction distribution +testsys.membus.trans_dist::StoreCondResp 204 # Transaction distribution +testsys.membus.pkt_count_testsys.cpu.icache_port::testsys.physmem.port 72252 # Packet count per connected master and slave (bytes) +testsys.membus.pkt_count_testsys.cpu.icache_port::total 72252 # Packet count per connected master and slave (bytes) +testsys.membus.pkt_count_testsys.cpu.dcache_port::testsys.bridge.slave 562 # Packet count per connected master and slave (bytes) +testsys.membus.pkt_count_testsys.cpu.dcache_port::testsys.physmem.port 21438 # Packet count per connected master and slave (bytes) +testsys.membus.pkt_count_testsys.cpu.dcache_port::total 22000 # Packet count per connected master and slave (bytes) +testsys.membus.pkt_count_testsys.iobridge.master::testsys.physmem.port 9698 # Packet count per connected master and slave (bytes) +testsys.membus.pkt_count_testsys.iobridge.master::total 9698 # Packet count per connected master and slave (bytes) +testsys.membus.pkt_count::total 103950 # Packet count per connected master and slave (bytes) +testsys.membus.pkt_size_testsys.cpu.icache_port::testsys.physmem.port 144504 # Cumulative packet size per connected master and slave (bytes) +testsys.membus.pkt_size_testsys.cpu.icache_port::total 144504 # Cumulative packet size per connected master and slave (bytes) +testsys.membus.pkt_size_testsys.cpu.dcache_port::testsys.bridge.slave 1928 # Cumulative packet size per connected master and slave (bytes) +testsys.membus.pkt_size_testsys.cpu.dcache_port::testsys.physmem.port 77640 # Cumulative packet size per connected master and slave (bytes) +testsys.membus.pkt_size_testsys.cpu.dcache_port::total 79568 # Cumulative packet size per connected master and slave (bytes) +testsys.membus.pkt_size_testsys.iobridge.master::testsys.physmem.port 116376 # Cumulative packet size per connected master and slave (bytes) +testsys.membus.pkt_size_testsys.iobridge.master::total 116376 # Cumulative packet size per connected master and slave (bytes) +testsys.membus.pkt_size::total 340448 # Cumulative packet size per connected master and slave (bytes) +testsys.membus.snoops 0 # Total snoops (count) +testsys.membus.snoop_fanout::samples 51694 # Request fanout histogram +testsys.membus.snoop_fanout::mean 0.792645 # Request fanout histogram +testsys.membus.snoop_fanout::stdev 0.405416 # Request fanout histogram +testsys.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram +testsys.membus.snoop_fanout::0 10719 20.74% 20.74% # Request fanout histogram +testsys.membus.snoop_fanout::1 40975 79.26% 100.00% # Request fanout histogram +testsys.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram +testsys.membus.snoop_fanout::min_value 0 # Request fanout histogram +testsys.membus.snoop_fanout::max_value 1 # Request fanout histogram +testsys.membus.snoop_fanout::total 51694 # Request fanout histogram testsys.tsunami.ethernet.clk_domain.clock 2000 # Clock period in ticks testsys.tsunami.ethernet.descDMAReads 4849 # Number of descriptors the device read w/ DMA testsys.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA @@ -864,275 +1134,5 @@ testsys.tsunami.ethernet.totalRxOrn 0 # to testsys.tsunami.ethernet.coalescedTotal 1 # average number of interrupts coalesced into each post testsys.tsunami.ethernet.postedInterrupts 4849 # number of posts to CPU testsys.tsunami.ethernet.droppedPackets 0 # number of packets dropped -testsys.iobus.trans_dist::ReadReq 5049 # Transaction distribution -testsys.iobus.trans_dist::ReadResp 5049 # Transaction distribution -testsys.iobus.trans_dist::WriteReq 81 # Transaction distribution -testsys.iobus.trans_dist::WriteResp 81 # Transaction distribution -testsys.iobus.pkt_count_testsys.bridge.master::testsys.tsunami.cchip.pio 402 # Packet count per connected master and slave (bytes) -testsys.iobus.pkt_count_testsys.bridge.master::testsys.tsunami.ethernet.pio 160 # Packet count per connected master and slave (bytes) -testsys.iobus.pkt_count_testsys.bridge.master::total 562 # Packet count per connected master and slave (bytes) -testsys.iobus.pkt_count_testsys.tsunami.ethernet.dma::testsys.iobridge.slave 9698 # Packet count per connected master and slave (bytes) -testsys.iobus.pkt_count_testsys.tsunami.ethernet.dma::total 9698 # Packet count per connected master and slave (bytes) -testsys.iobus.pkt_count::total 10260 # Packet count per connected master and slave (bytes) -testsys.iobus.pkt_size_testsys.bridge.master::testsys.tsunami.cchip.pio 1608 # Cumulative packet size per connected master and slave (bytes) -testsys.iobus.pkt_size_testsys.bridge.master::testsys.tsunami.ethernet.pio 320 # Cumulative packet size per connected master and slave (bytes) -testsys.iobus.pkt_size_testsys.bridge.master::total 1928 # Cumulative packet size per connected master and slave (bytes) -testsys.iobus.pkt_size_testsys.tsunami.ethernet.dma::testsys.iobridge.slave 116376 # Cumulative packet size per connected master and slave (bytes) -testsys.iobus.pkt_size_testsys.tsunami.ethernet.dma::total 116376 # Cumulative packet size per connected master and slave (bytes) -testsys.iobus.pkt_size::total 118304 # Cumulative packet size per connected master and slave (bytes) -drivesys.voltage_domain.voltage 1 # Voltage in Volts -drivesys.clk_domain.clock 1000 # Clock period in ticks -drivesys.physmem.bytes_read::cpu.inst 144608 # Number of bytes read from this memory -drivesys.physmem.bytes_read::cpu.data 49952 # Number of bytes read from this memory -drivesys.physmem.bytes_read::tsunami.ethernet 116400 # Number of bytes read from this memory -drivesys.physmem.bytes_read::total 310960 # Number of bytes read from this memory -drivesys.physmem.bytes_inst_read::cpu.inst 144608 # Number of instructions bytes read from this memory -drivesys.physmem.bytes_inst_read::total 144608 # Number of instructions bytes read from this memory -drivesys.physmem.bytes_written::cpu.data 27688 # Number of bytes written to this memory -drivesys.physmem.bytes_written::total 27688 # Number of bytes written to this memory -drivesys.physmem.num_reads::cpu.inst 36152 # Number of read requests responded to by this memory -drivesys.physmem.num_reads::cpu.data 6909 # Number of read requests responded to by this memory -drivesys.physmem.num_reads::tsunami.ethernet 4850 # Number of read requests responded to by this memory -drivesys.physmem.num_reads::total 47911 # Number of read requests responded to by this memory -drivesys.physmem.num_writes::cpu.data 3812 # Number of write requests responded to by this memory -drivesys.physmem.num_writes::total 3812 # Number of write requests responded to by this memory -drivesys.physmem.bw_read::cpu.inst 355004339 # Total read bandwidth from this memory (bytes/s) -drivesys.physmem.bw_read::cpu.data 122629293 # Total read bandwidth from this memory (bytes/s) -drivesys.physmem.bw_read::tsunami.ethernet 285755318 # Total read bandwidth from this memory (bytes/s) -drivesys.physmem.bw_read::total 763388950 # Total read bandwidth from this memory (bytes/s) -drivesys.physmem.bw_inst_read::cpu.inst 355004339 # Instruction read bandwidth from this memory (bytes/s) -drivesys.physmem.bw_inst_read::total 355004339 # Instruction read bandwidth from this memory (bytes/s) -drivesys.physmem.bw_write::cpu.data 67972451 # Write bandwidth from this memory (bytes/s) -drivesys.physmem.bw_write::total 67972451 # Write bandwidth from this memory (bytes/s) -drivesys.physmem.bw_total::cpu.inst 355004339 # Total bandwidth to/from this memory (bytes/s) -drivesys.physmem.bw_total::cpu.data 190601743 # Total bandwidth to/from this memory (bytes/s) -drivesys.physmem.bw_total::tsunami.ethernet 285755318 # Total bandwidth to/from this memory (bytes/s) -drivesys.physmem.bw_total::total 831361401 # Total bandwidth to/from this memory (bytes/s) -drivesys.membus.trans_dist::ReadReq 47907 # Transaction distribution -drivesys.membus.trans_dist::ReadResp 48111 # Transaction distribution -drivesys.membus.trans_dist::WriteReq 3689 # Transaction distribution -drivesys.membus.trans_dist::WriteResp 3689 # Transaction distribution -drivesys.membus.trans_dist::LoadLockedReq 204 # Transaction distribution -drivesys.membus.trans_dist::StoreCondReq 204 # Transaction distribution -drivesys.membus.trans_dist::StoreCondResp 204 # Transaction distribution -drivesys.membus.pkt_count_drivesys.cpu.icache_port::drivesys.physmem.port 72304 # Packet count per connected master and slave (bytes) -drivesys.membus.pkt_count_drivesys.cpu.icache_port::total 72304 # Packet count per connected master and slave (bytes) -drivesys.membus.pkt_count_drivesys.cpu.dcache_port::drivesys.bridge.slave 562 # Packet count per connected master and slave (bytes) -drivesys.membus.pkt_count_drivesys.cpu.dcache_port::drivesys.physmem.port 21442 # Packet count per connected master and slave (bytes) -drivesys.membus.pkt_count_drivesys.cpu.dcache_port::total 22004 # Packet count per connected master and slave (bytes) -drivesys.membus.pkt_count_drivesys.iobridge.master::drivesys.physmem.port 9700 # Packet count per connected master and slave (bytes) -drivesys.membus.pkt_count_drivesys.iobridge.master::total 9700 # Packet count per connected master and slave (bytes) -drivesys.membus.pkt_count::total 104008 # Packet count per connected master and slave (bytes) -drivesys.membus.pkt_size_drivesys.cpu.icache_port::drivesys.physmem.port 144608 # Cumulative packet size per connected master and slave (bytes) -drivesys.membus.pkt_size_drivesys.cpu.icache_port::total 144608 # Cumulative packet size per connected master and slave (bytes) -drivesys.membus.pkt_size_drivesys.cpu.dcache_port::drivesys.bridge.slave 1928 # Cumulative packet size per connected master and slave (bytes) -drivesys.membus.pkt_size_drivesys.cpu.dcache_port::drivesys.physmem.port 77640 # Cumulative packet size per connected master and slave (bytes) -drivesys.membus.pkt_size_drivesys.cpu.dcache_port::total 79568 # Cumulative packet size per connected master and slave (bytes) -drivesys.membus.pkt_size_drivesys.iobridge.master::drivesys.physmem.port 116400 # Cumulative packet size per connected master and slave (bytes) -drivesys.membus.pkt_size_drivesys.iobridge.master::total 116400 # Cumulative packet size per connected master and slave (bytes) -drivesys.membus.pkt_size::total 340576 # Cumulative packet size per connected master and slave (bytes) -drivesys.membus.snoops 0 # Total snoops (count) -drivesys.membus.snoop_fanout::samples 51723 # Request fanout histogram -drivesys.membus.snoop_fanout::mean 0.792723 # Request fanout histogram -drivesys.membus.snoop_fanout::stdev 0.405360 # Request fanout histogram -drivesys.membus.snoop_fanout::underflows 0 0.00% 0.00% # Request fanout histogram -drivesys.membus.snoop_fanout::0 10721 20.73% 20.73% # Request fanout histogram -drivesys.membus.snoop_fanout::1 41002 79.27% 100.00% # Request fanout histogram -drivesys.membus.snoop_fanout::overflows 0 0.00% 100.00% # Request fanout histogram -drivesys.membus.snoop_fanout::min_value 0 # Request fanout histogram -drivesys.membus.snoop_fanout::max_value 1 # Request fanout histogram -drivesys.membus.snoop_fanout::total 51723 # Request fanout histogram -drivesys.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). -drivesys.disk0.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). -drivesys.disk0.dma_read_txs 0 # Number of DMA read transactions (not PRD). -drivesys.disk0.dma_write_full_pages 0 # Number of full page size DMA writes. -drivesys.disk0.dma_write_bytes 0 # Number of bytes transfered via DMA writes. -drivesys.disk0.dma_write_txs 0 # Number of DMA write transactions. -drivesys.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD). -drivesys.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD). -drivesys.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD). -drivesys.disk2.dma_write_full_pages 0 # Number of full page size DMA writes. -drivesys.disk2.dma_write_bytes 0 # Number of bytes transfered via DMA writes. -drivesys.disk2.dma_write_txs 0 # Number of DMA write transactions. -drivesys.cpu.clk_domain.clock 250 # Clock period in ticks -drivesys.cpu.dtb.fetch_hits 0 # ITB hits -drivesys.cpu.dtb.fetch_misses 0 # ITB misses -drivesys.cpu.dtb.fetch_acv 0 # ITB acv -drivesys.cpu.dtb.fetch_accesses 0 # ITB accesses -drivesys.cpu.dtb.read_hits 7069 # DTB read hits -drivesys.cpu.dtb.read_misses 0 # DTB read misses -drivesys.cpu.dtb.read_acv 0 # DTB read access violations -drivesys.cpu.dtb.read_accesses 0 # DTB read accesses -drivesys.cpu.dtb.write_hits 3933 # DTB write hits -drivesys.cpu.dtb.write_misses 0 # DTB write misses -drivesys.cpu.dtb.write_acv 0 # DTB write access violations -drivesys.cpu.dtb.write_accesses 0 # DTB write accesses -drivesys.cpu.dtb.data_hits 11002 # DTB hits -drivesys.cpu.dtb.data_misses 0 # DTB misses -drivesys.cpu.dtb.data_acv 0 # DTB access violations -drivesys.cpu.dtb.data_accesses 0 # DTB accesses -drivesys.cpu.itb.fetch_hits 5992 # ITB hits -drivesys.cpu.itb.fetch_misses 0 # ITB misses -drivesys.cpu.itb.fetch_acv 0 # ITB acv -drivesys.cpu.itb.fetch_accesses 5992 # ITB accesses -drivesys.cpu.itb.read_hits 0 # DTB read hits -drivesys.cpu.itb.read_misses 0 # DTB read misses -drivesys.cpu.itb.read_acv 0 # DTB read access violations -drivesys.cpu.itb.read_accesses 0 # DTB read accesses -drivesys.cpu.itb.write_hits 0 # DTB write hits -drivesys.cpu.itb.write_misses 0 # DTB write misses -drivesys.cpu.itb.write_acv 0 # DTB write access violations -drivesys.cpu.itb.write_accesses 0 # DTB write accesses -drivesys.cpu.itb.data_hits 0 # DTB hits -drivesys.cpu.itb.data_misses 0 # DTB misses -drivesys.cpu.itb.data_acv 0 # DTB access violations -drivesys.cpu.itb.data_accesses 0 # DTB accesses -drivesys.cpu.numCycles 1626281 # number of cpu cycles simulated -drivesys.cpu.numWorkItemsStarted 0 # number of work items this cpu started -drivesys.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed -drivesys.cpu.committedInsts 36152 # Number of instructions committed -drivesys.cpu.committedOps 36152 # Number of ops (including micro ops) committed -drivesys.cpu.num_int_alu_accesses 33516 # Number of integer alu accesses -drivesys.cpu.num_fp_alu_accesses 0 # Number of float alu accesses -drivesys.cpu.num_func_calls 2388 # number of times a function call or return occured -drivesys.cpu.num_conditional_control_insts 2347 # number of instructions that are conditional controls -drivesys.cpu.num_int_insts 33516 # number of integer instructions -drivesys.cpu.num_fp_insts 0 # number of float instructions -drivesys.cpu.num_int_register_reads 43772 # number of times the integer registers were read -drivesys.cpu.num_int_register_writes 26499 # number of times the integer registers were written -drivesys.cpu.num_fp_register_reads 0 # number of times the floating registers were read -drivesys.cpu.num_fp_register_writes 0 # number of times the floating registers were written -drivesys.cpu.num_mem_refs 11043 # number of memory refs -drivesys.cpu.num_load_insts 7109 # Number of load instructions -drivesys.cpu.num_store_insts 3934 # Number of store instructions -drivesys.cpu.num_idle_cycles 1590238.371734 # Number of idle cycles -drivesys.cpu.num_busy_cycles 36042.628266 # Number of busy cycles -drivesys.cpu.not_idle_fraction 0.022163 # Percentage of non-idle cycles -drivesys.cpu.idle_fraction 0.977837 # Percentage of idle cycles -drivesys.cpu.Branches 5243 # Number of branches fetched -drivesys.cpu.op_class::No_OpClass 1262 3.49% 3.49% # Class of executed instruction -drivesys.cpu.op_class::IntAlu 21687 59.99% 63.48% # Class of executed instruction -drivesys.cpu.op_class::IntMult 44 0.12% 63.60% # Class of executed instruction -drivesys.cpu.op_class::IntDiv 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::FloatAdd 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::FloatCmp 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::FloatCvt 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::FloatMult 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::FloatDiv 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::FloatSqrt 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::SimdAdd 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::SimdAddAcc 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::SimdAlu 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::SimdCmp 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::SimdCvt 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::SimdMisc 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::SimdMult 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::SimdMultAcc 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::SimdShift 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::SimdShiftAcc 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::SimdSqrt 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::SimdFloatAdd 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::SimdFloatAlu 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::SimdFloatCmp 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::SimdFloatCvt 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::SimdFloatDiv 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::SimdFloatMisc 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::SimdFloatMult 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::SimdFloatMultAcc 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::SimdFloatSqrt 0 0.00% 63.60% # Class of executed instruction -drivesys.cpu.op_class::MemRead 7678 21.24% 84.84% # Class of executed instruction -drivesys.cpu.op_class::MemWrite 3936 10.89% 95.73% # Class of executed instruction -drivesys.cpu.op_class::IprAccess 1545 4.27% 100.00% # Class of executed instruction -drivesys.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction -drivesys.cpu.op_class::total 36152 # Class of executed instruction -drivesys.cpu.kern.inst.arm 0 # number of arm instructions executed -drivesys.cpu.kern.inst.quiesce 41 # number of quiesce instructions executed -drivesys.cpu.kern.inst.hwrei 295 # number of hwrei instructions executed -drivesys.cpu.kern.ipl_count::0 123 41.84% 41.84% # number of times we switched to this ipl -drivesys.cpu.kern.ipl_count::21 40 13.61% 55.44% # number of times we switched to this ipl -drivesys.cpu.kern.ipl_count::22 1 0.34% 55.78% # number of times we switched to this ipl -drivesys.cpu.kern.ipl_count::31 130 44.22% 100.00% # number of times we switched to this ipl -drivesys.cpu.kern.ipl_count::total 294 # number of times we switched to this ipl -drivesys.cpu.kern.ipl_good::0 123 42.86% 42.86% # number of times we switched to this ipl from a different ipl -drivesys.cpu.kern.ipl_good::21 40 13.94% 56.79% # number of times we switched to this ipl from a different ipl -drivesys.cpu.kern.ipl_good::22 1 0.35% 57.14% # number of times we switched to this ipl from a different ipl -drivesys.cpu.kern.ipl_good::31 123 42.86% 100.00% # number of times we switched to this ipl from a different ipl -drivesys.cpu.kern.ipl_good::total 287 # number of times we switched to this ipl from a different ipl -drivesys.cpu.kern.ipl_ticks::0 400289000 98.46% 98.46% # number of cycles we spent at this ipl -drivesys.cpu.kern.ipl_ticks::21 1620000 0.40% 98.86% # number of cycles we spent at this ipl -drivesys.cpu.kern.ipl_ticks::22 21500 0.01% 98.86% # number of cycles we spent at this ipl -drivesys.cpu.kern.ipl_ticks::31 4629500 1.14% 100.00% # number of cycles we spent at this ipl -drivesys.cpu.kern.ipl_ticks::total 406560000 # number of cycles we spent at this ipl -drivesys.cpu.kern.ipl_used::0 1 # fraction of swpipl calls that actually changed the ipl -drivesys.cpu.kern.ipl_used::21 1 # fraction of swpipl calls that actually changed the ipl -drivesys.cpu.kern.ipl_used::22 1 # fraction of swpipl calls that actually changed the ipl -drivesys.cpu.kern.ipl_used::31 0.946154 # fraction of swpipl calls that actually changed the ipl -drivesys.cpu.kern.ipl_used::total 0.976190 # fraction of swpipl calls that actually changed the ipl -drivesys.cpu.kern.callpal::swpipl 212 83.46% 83.46% # number of callpals executed -drivesys.cpu.kern.callpal::rdps 1 0.39% 83.86% # number of callpals executed -drivesys.cpu.kern.callpal::rti 41 16.14% 100.00% # number of callpals executed -drivesys.cpu.kern.callpal::total 254 # number of callpals executed -drivesys.cpu.kern.mode_switch::kernel 0 # number of protection mode switches -drivesys.cpu.kern.mode_switch::user 0 # number of protection mode switches -drivesys.cpu.kern.mode_switch::idle 41 # number of protection mode switches -drivesys.cpu.kern.mode_good::kernel 0 -drivesys.cpu.kern.mode_good::user 0 -drivesys.cpu.kern.mode_good::idle 0 -drivesys.cpu.kern.mode_switch_good::kernel nan # fraction of useful protection mode switches -drivesys.cpu.kern.mode_switch_good::user nan # fraction of useful protection mode switches -drivesys.cpu.kern.mode_switch_good::idle 0 # fraction of useful protection mode switches -drivesys.cpu.kern.mode_switch_good::total 0 # fraction of useful protection mode switches -drivesys.cpu.kern.mode_ticks::kernel 0 # number of ticks spent at the given mode -drivesys.cpu.kern.mode_ticks::user 0 # number of ticks spent at the given mode -drivesys.cpu.kern.mode_ticks::idle 0 # number of ticks spent at the given mode -drivesys.cpu.kern.swap_context 0 # number of times the context was actually changed -drivesys.tsunami.ethernet.clk_domain.clock 2000 # Clock period in ticks -drivesys.tsunami.ethernet.descDMAReads 4850 # Number of descriptors the device read w/ DMA -drivesys.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA -drivesys.tsunami.ethernet.descDmaReadBytes 116400 # number of descriptor bytes read w/ DMA -drivesys.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA -drivesys.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU -drivesys.tsunami.ethernet.coalescedSwi 0 # average number of Swi's coalesced into each post -drivesys.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR -drivesys.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU -drivesys.tsunami.ethernet.coalescedRxIdle 0 # average number of RxIdle's coalesced into each post -drivesys.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR -drivesys.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU -drivesys.tsunami.ethernet.coalescedRxOk 0 # average number of RxOk's coalesced into each post -drivesys.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR -drivesys.tsunami.ethernet.postedRxDesc 0 # number of RxDesc interrupts posted to CPU -drivesys.tsunami.ethernet.coalescedRxDesc 0 # average number of RxDesc's coalesced into each post -drivesys.tsunami.ethernet.totalRxDesc 0 # total number of RxDesc written to ISR -drivesys.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU -drivesys.tsunami.ethernet.coalescedTxOk 0 # average number of TxOk's coalesced into each post -drivesys.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR -drivesys.tsunami.ethernet.postedTxIdle 40 # number of TxIdle interrupts posted to CPU -drivesys.tsunami.ethernet.coalescedTxIdle 1 # average number of TxIdle's coalesced into each post -drivesys.tsunami.ethernet.totalTxIdle 4850 # total number of TxIdle written to ISR -drivesys.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU -drivesys.tsunami.ethernet.coalescedTxDesc 0 # average number of TxDesc's coalesced into each post -drivesys.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR -drivesys.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU -drivesys.tsunami.ethernet.coalescedRxOrn 0 # average number of RxOrn's coalesced into each post -drivesys.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR -drivesys.tsunami.ethernet.coalescedTotal 1 # average number of interrupts coalesced into each post -drivesys.tsunami.ethernet.postedInterrupts 4850 # number of posts to CPU -drivesys.tsunami.ethernet.droppedPackets 0 # number of packets dropped -drivesys.iobus.trans_dist::ReadReq 5050 # Transaction distribution -drivesys.iobus.trans_dist::ReadResp 5050 # Transaction distribution -drivesys.iobus.trans_dist::WriteReq 81 # Transaction distribution -drivesys.iobus.trans_dist::WriteResp 81 # Transaction distribution -drivesys.iobus.pkt_count_drivesys.bridge.master::drivesys.tsunami.cchip.pio 402 # Packet count per connected master and slave (bytes) -drivesys.iobus.pkt_count_drivesys.bridge.master::drivesys.tsunami.ethernet.pio 160 # Packet count per connected master and slave (bytes) -drivesys.iobus.pkt_count_drivesys.bridge.master::total 562 # Packet count per connected master and slave (bytes) -drivesys.iobus.pkt_count_drivesys.tsunami.ethernet.dma::drivesys.iobridge.slave 9700 # Packet count per connected master and slave (bytes) -drivesys.iobus.pkt_count_drivesys.tsunami.ethernet.dma::total 9700 # Packet count per connected master and slave (bytes) -drivesys.iobus.pkt_count::total 10262 # Packet count per connected master and slave (bytes) -drivesys.iobus.pkt_size_drivesys.bridge.master::drivesys.tsunami.cchip.pio 1608 # Cumulative packet size per connected master and slave (bytes) -drivesys.iobus.pkt_size_drivesys.bridge.master::drivesys.tsunami.ethernet.pio 320 # Cumulative packet size per connected master and slave (bytes) -drivesys.iobus.pkt_size_drivesys.bridge.master::total 1928 # Cumulative packet size per connected master and slave (bytes) -drivesys.iobus.pkt_size_drivesys.tsunami.ethernet.dma::drivesys.iobridge.slave 116400 # Cumulative packet size per connected master and slave (bytes) -drivesys.iobus.pkt_size_drivesys.tsunami.ethernet.dma::total 116400 # Cumulative packet size per connected master and slave (bytes) -drivesys.iobus.pkt_size::total 118328 # Cumulative packet size per connected master and slave (bytes) ---------- End Simulation Statistics ---------- |