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authorNathan Binkert <nate@binkert.org>2012-05-09 11:52:14 -0700
committerNathan Binkert <nate@binkert.org>2012-05-09 11:52:14 -0700
commit4a644767c58754339965cecc5d85853255652a30 (patch)
treee435caa3b1ba7f5e395c58ca0fdfdfa91804d2dd /tests/quick/se/00.hello/ref/alpha/linux/inorder-timing
parent55411f7f713a42f67552a9621051fae8f7869648 (diff)
downloadgem5-4a644767c58754339965cecc5d85853255652a30.tar.xz
stats: update stats for no_value -> nan
Lots of accumulated older changes too.
Diffstat (limited to 'tests/quick/se/00.hello/ref/alpha/linux/inorder-timing')
-rw-r--r--tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/config.ini31
-rwxr-xr-xtests/quick/se/00.hello/ref/alpha/linux/inorder-timing/simout8
-rw-r--r--tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/stats.txt68
3 files changed, 54 insertions, 53 deletions
diff --git a/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/config.ini
index afc8aa811..1a7fdb0b3 100644
--- a/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/config.ini
+++ b/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/config.ini
@@ -16,7 +16,6 @@ load_addr_mask=1099511627775
mem_mode=atomic
memories=system.physmem
num_work_ids=16
-physmem=system.physmem
readfile=
symbolfile=
work_begin_ckpt_count=0
@@ -26,7 +25,7 @@ work_cpus_ckpt_count=0
work_end_ckpt_count=0
work_end_exit_count=0
work_item_id=-1
-system_port=system.membus.port[0]
+system_port=system.membus.slave[0]
[system.cpu]
type=InOrderCPU
@@ -41,7 +40,6 @@ choiceCtrBits=2
choicePredictorSize=8192
clock=500
cpu_id=0
-dataMemPort=dcache_port
defer_registration=false
div16Latency=1
div16RepeatRate=1
@@ -56,7 +54,6 @@ do_quiesce=true
do_statistics_insts=true
dtb=system.cpu.dtb
fetchBuffSize=4
-fetchMemPort=icache_port
functionTrace=false
functionTraceStart=0
function_trace=false
@@ -94,7 +91,7 @@ icache_port=system.cpu.icache.cpu_side
[system.cpu.dcache]
type=BaseCache
-addr_range=0:18446744073709551615
+addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@@ -115,7 +112,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.dcache_port
-mem_side=system.cpu.toL2Bus.port[1]
+mem_side=system.cpu.toL2Bus.slave[1]
[system.cpu.dtb]
type=AlphaTLB
@@ -123,7 +120,7 @@ size=64
[system.cpu.icache]
type=BaseCache
-addr_range=0:18446744073709551615
+addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@@ -144,7 +141,7 @@ trace_addr=0
two_queue=false
write_buffers=8
cpu_side=system.cpu.icache_port
-mem_side=system.cpu.toL2Bus.port[0]
+mem_side=system.cpu.toL2Bus.slave[0]
[system.cpu.interrupts]
type=AlphaInterrupts
@@ -155,7 +152,7 @@ size=48
[system.cpu.l2cache]
type=BaseCache
-addr_range=0:18446744073709551615
+addr_ranges=0:18446744073709551615
assoc=2
block_size=64
forward_snoops=true
@@ -175,8 +172,8 @@ tgts_per_mshr=5
trace_addr=0
two_queue=false
write_buffers=8
-cpu_side=system.cpu.toL2Bus.port[2]
-mem_side=system.membus.port[2]
+cpu_side=system.cpu.toL2Bus.master[0]
+mem_side=system.membus.slave[1]
[system.cpu.toL2Bus]
type=Bus
@@ -186,7 +183,8 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
-port=system.cpu.icache.mem_side system.cpu.dcache.mem_side system.cpu.l2cache.cpu_side
+master=system.cpu.l2cache.cpu_side
+slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
[system.cpu.tracer]
type=ExeTracer
@@ -218,15 +216,18 @@ clock=1000
header_cycles=1
use_default_range=false
width=64
-port=system.system_port system.physmem.port[0] system.cpu.l2cache.mem_side
+master=system.physmem.port[0]
+slave=system.system_port system.cpu.l2cache.mem_side
[system.physmem]
-type=PhysicalMemory
+type=SimpleMemory
+conf_table_reported=false
file=
+in_addr_map=true
latency=30000
latency_var=0
null=false
range=0:134217727
zero=false
-port=system.membus.port[1]
+port=system.membus.master[0]
diff --git a/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/simout b/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/simout
index 89a25c4c1..69eabeb32 100755
--- a/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/simout
+++ b/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/simout
@@ -1,10 +1,10 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Feb 12 2012 17:15:14
-gem5 started Feb 12 2012 17:33:02
-gem5 executing on zizzer
-command line: build/ALPHA/gem5.fast -d build/ALPHA/tests/fast/quick/se/00.hello/alpha/linux/inorder-timing -re tests/run.py build/ALPHA/tests/fast/quick/se/00.hello/alpha/linux/inorder-timing
+gem5 compiled May 8 2012 15:36:31
+gem5 started May 8 2012 15:37:08
+gem5 executing on piton
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/inorder-timing -re tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/inorder-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
diff --git a/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/stats.txt b/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/stats.txt
index fdd02b36e..c4f4b062b 100644
--- a/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/stats.txt
+++ b/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000021 # Nu
sim_ticks 21234500 # Number of ticks simulated
final_tick 21234500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 95244 # Simulator instruction rate (inst/s)
-host_op_rate 95219 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 315647941 # Simulator tick rate (ticks/s)
-host_mem_usage 209384 # Number of bytes of host memory used
-host_seconds 0.07 # Real time elapsed on the host
+host_inst_rate 37422 # Simulator instruction rate (inst/s)
+host_op_rate 37415 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 124041463 # Simulator tick rate (ticks/s)
+host_mem_usage 214024 # Number of bytes of host memory used
+host_seconds 0.17 # Real time elapsed on the host
sim_insts 6404 # Number of instructions simulated
sim_ops 6404 # Number of ops (including micro ops) simulated
system.physmem.bytes_read 30016 # Number of bytes read from this memory
@@ -56,30 +56,6 @@ system.cpu.workload.num_syscalls 17 # Nu
system.cpu.numCycles 42470 # number of cpu cycles simulated
system.cpu.numWorkItemsStarted 0 # number of work items this cpu started
system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed
-system.cpu.contextSwitches 1 # Number of context switches
-system.cpu.threadCycles 11434 # Total Number of Cycles A Thread Was Active in CPU (Per-Thread)
-system.cpu.smtCycles 0 # Total number of cycles that the CPU was in SMT-mode
-system.cpu.timesIdled 443 # Number of times that the entire CPU went into an idle state and unscheduled itself
-system.cpu.idleCycles 35079 # Number of cycles cpu's stages were not processed
-system.cpu.runCycles 7391 # Number of cycles cpu stages are processed.
-system.cpu.activity 17.402873 # Percentage of cycles cpu is active
-system.cpu.comLoads 1185 # Number of Load instructions committed
-system.cpu.comStores 865 # Number of Store instructions committed
-system.cpu.comBranches 1051 # Number of Branches instructions committed
-system.cpu.comNops 17 # Number of Nop instructions committed
-system.cpu.comNonSpec 17 # Number of Non-Speculative instructions committed
-system.cpu.comInts 3265 # Number of Integer instructions committed
-system.cpu.comFloats 2 # Number of Floating Point instructions committed
-system.cpu.committedInsts 6404 # Number of Instructions committed (Per-Thread)
-system.cpu.committedOps 6404 # Number of Ops committed (Per-Thread)
-system.cpu.smtCommittedInsts 0 # Number of SMT Instructions committed (Per-Thread)
-system.cpu.committedInsts_total 6404 # Number of Instructions committed (Total)
-system.cpu.cpi 6.631793 # CPI: Cycles Per Instruction (Per-Thread)
-system.cpu.smt_cpi no_value # CPI: Total SMT-CPI
-system.cpu.cpi_total 6.631793 # CPI: Total CPI of All Threads
-system.cpu.ipc 0.150789 # IPC: Instructions Per Cycle (Per-Thread)
-system.cpu.smt_ipc no_value # IPC: Total SMT-IPC
-system.cpu.ipc_total 0.150789 # IPC: Total IPC of All Threads
system.cpu.branch_predictor.lookups 1608 # Number of BP lookups
system.cpu.branch_predictor.condPredicted 1127 # Number of conditional branches predicted
system.cpu.branch_predictor.condIncorrect 712 # Number of conditional branches incorrect
@@ -106,6 +82,30 @@ system.cpu.execution_unit.mispredictPct 61.882129 # Pe
system.cpu.execution_unit.executions 4474 # Number of Instructions Executed.
system.cpu.mult_div_unit.multiplies 1 # Number of Multipy Operations Executed
system.cpu.mult_div_unit.divides 0 # Number of Divide Operations Executed
+system.cpu.contextSwitches 1 # Number of context switches
+system.cpu.threadCycles 11434 # Total Number of Cycles A Thread Was Active in CPU (Per-Thread)
+system.cpu.smtCycles 0 # Total number of cycles that the CPU was in SMT-mode
+system.cpu.timesIdled 443 # Number of times that the entire CPU went into an idle state and unscheduled itself
+system.cpu.idleCycles 35079 # Number of cycles cpu's stages were not processed
+system.cpu.runCycles 7391 # Number of cycles cpu stages are processed.
+system.cpu.activity 17.402873 # Percentage of cycles cpu is active
+system.cpu.comLoads 1185 # Number of Load instructions committed
+system.cpu.comStores 865 # Number of Store instructions committed
+system.cpu.comBranches 1051 # Number of Branches instructions committed
+system.cpu.comNops 17 # Number of Nop instructions committed
+system.cpu.comNonSpec 17 # Number of Non-Speculative instructions committed
+system.cpu.comInts 3265 # Number of Integer instructions committed
+system.cpu.comFloats 2 # Number of Floating Point instructions committed
+system.cpu.committedInsts 6404 # Number of Instructions committed (Per-Thread)
+system.cpu.committedOps 6404 # Number of Ops committed (Per-Thread)
+system.cpu.smtCommittedInsts 0 # Number of SMT Instructions committed (Per-Thread)
+system.cpu.committedInsts_total 6404 # Number of Instructions committed (Total)
+system.cpu.cpi 6.631793 # CPI: Cycles Per Instruction (Per-Thread)
+system.cpu.smt_cpi nan # CPI: Total SMT-CPI
+system.cpu.cpi_total 6.631793 # CPI: Total CPI of All Threads
+system.cpu.ipc 0.150789 # IPC: Instructions Per Cycle (Per-Thread)
+system.cpu.smt_ipc nan # IPC: Total SMT-IPC
+system.cpu.ipc_total 0.150789 # IPC: Total IPC of All Threads
system.cpu.stage0.idleCycles 37550 # Number of cycles 0 instructions are processed.
system.cpu.stage0.runCycles 4920 # Number of cycles 1+ instructions are processed.
system.cpu.stage0.utilization 11.584648 # Percentage of cycles stage was utilized (processing insts).
@@ -164,8 +164,8 @@ system.cpu.icache.blocked_cycles::no_mshrs 0 #
system.cpu.icache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.cpu.icache.blocked::no_mshrs 0 # number of cycles access was blocked
system.cpu.icache.blocked::no_targets 0 # number of cycles access was blocked
-system.cpu.icache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
-system.cpu.icache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked
+system.cpu.icache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
+system.cpu.icache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu.icache.fast_writes 0 # number of fast writes performed
system.cpu.icache.cache_copies 0 # number of cache copies performed
system.cpu.icache.ReadReq_mshr_hits::cpu.inst 48 # number of ReadReq MSHR hits
@@ -246,7 +246,7 @@ system.cpu.dcache.blocked_cycles::no_mshrs 0 #
system.cpu.dcache.blocked_cycles::no_targets 1656000 # number of cycles access was blocked
system.cpu.dcache.blocked::no_mshrs 0 # number of cycles access was blocked
system.cpu.dcache.blocked::no_targets 36 # number of cycles access was blocked
-system.cpu.dcache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
+system.cpu.dcache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
system.cpu.dcache.avg_blocked_cycles::no_targets 46000 # average number of cycles each access was blocked
system.cpu.dcache.fast_writes 0 # number of fast writes performed
system.cpu.dcache.cache_copies 0 # number of cache copies performed
@@ -351,8 +351,8 @@ system.cpu.l2cache.blocked_cycles::no_mshrs 0 #
system.cpu.l2cache.blocked_cycles::no_targets 0 # number of cycles access was blocked
system.cpu.l2cache.blocked::no_mshrs 0 # number of cycles access was blocked
system.cpu.l2cache.blocked::no_targets 0 # number of cycles access was blocked
-system.cpu.l2cache.avg_blocked_cycles::no_mshrs no_value # average number of cycles each access was blocked
-system.cpu.l2cache.avg_blocked_cycles::no_targets no_value # average number of cycles each access was blocked
+system.cpu.l2cache.avg_blocked_cycles::no_mshrs nan # average number of cycles each access was blocked
+system.cpu.l2cache.avg_blocked_cycles::no_targets nan # average number of cycles each access was blocked
system.cpu.l2cache.fast_writes 0 # number of fast writes performed
system.cpu.l2cache.cache_copies 0 # number of cache copies performed
system.cpu.l2cache.ReadReq_mshr_misses::cpu.inst 301 # number of ReadReq MSHR misses