stats: Add power stats to test references

Change-Id: Ic827213134b199446822f128b81d4a480e777fee

1 files changed, 16 insertions, 5 deletions

diff --git a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt
index ead74abf4..8d95bb8b7 100644
--- a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt
+++ b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt
@@ -4,15 +4,16 @@ sim_seconds                                  0.000022                       # Nu
 sim_ticks                                    22019000                       # Number of ticks simulated
 final_tick                                   22019000                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 115969                       # Simulator instruction rate (inst/s)
-host_op_rate                                   115940                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                              399737091                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 249288                       # Number of bytes of host memory used
-host_seconds                                     0.06                       # Real time elapsed on the host
+host_inst_rate                                 117755                       # Simulator instruction rate (inst/s)
+host_op_rate                                   117735                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                              405950936                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 294524                       # Number of bytes of host memory used
+host_seconds                                     0.05                       # Real time elapsed on the host
 sim_insts                                        6385                       # Number of instructions simulated
 sim_ops                                          6385                       # Number of ops (including micro ops) simulated
 system.voltage_domain.voltage                       1                       # Voltage in Volts
 system.clk_domain.clock                          1000                       # Clock period in ticks
+system.physmem.pwrStateResidencyTicks::UNDEFINED     22019000                       # Cumulative time (in ticks) in various power states
 system.physmem.bytes_read::cpu.inst             19968                       # Number of bytes read from this memory
 system.physmem.bytes_read::cpu.data             11072                       # Number of bytes read from this memory
 system.physmem.bytes_read::total                31040                       # Number of bytes read from this memory
@@ -249,6 +250,7 @@ system.physmem_1.memoryStateTime::REF          520000                       # Ti
 system.physmem_1.memoryStateTime::PRE_PDN            0                       # Time in different power states
 system.physmem_1.memoryStateTime::ACT        14308250                       # Time in different power states
 system.physmem_1.memoryStateTime::ACT_PDN            0                       # Time in different power states
+system.pwrStateResidencyTicks::UNDEFINED     22019000                       # Cumulative time (in ticks) in various power states
 system.cpu.branchPred.lookups                    2849                       # Number of BP lookups
 system.cpu.branchPred.condPredicted              1676                       # Number of conditional branches predicted
 system.cpu.branchPred.condIncorrect               481                       # Number of conditional branches incorrect
@@ -296,6 +298,7 @@ system.cpu.itb.data_misses                          0                       # DT
 system.cpu.itb.data_acv                             0                       # DTB access violations
 system.cpu.itb.data_accesses                        0                       # DTB accesses
 system.cpu.workload.num_syscalls                   17                       # Number of system calls
+system.cpu.pwrStateResidencyTicks::ON        22019000                       # Cumulative time (in ticks) in various power states
 system.cpu.numCycles                            44039                       # number of cpu cycles simulated
 system.cpu.numWorkItemsStarted                      0                       # number of work items this cpu started
 system.cpu.numWorkItemsCompleted                    0                       # number of work items this cpu completed
@@ -587,6 +590,7 @@ system.cpu.fp_regfile_reads                         8                       # nu
 system.cpu.fp_regfile_writes                        2                       # number of floating regfile writes
 system.cpu.misc_regfile_reads                       1                       # number of misc regfile reads
 system.cpu.misc_regfile_writes                      1                       # number of misc regfile writes
+system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED     22019000                       # Cumulative time (in ticks) in various power states
 system.cpu.dcache.tags.replacements                 0                       # number of replacements
 system.cpu.dcache.tags.tagsinuse           109.409218                       # Cycle average of tags in use
 system.cpu.dcache.tags.total_refs                2405                       # Total number of references to valid blocks.
@@ -602,6 +606,7 @@ system.cpu.dcache.tags.age_task_id_blocks_1024::1          129
 system.cpu.dcache.tags.occ_task_id_percent::1024     0.042236                       # Percentage of cache occupancy per task id
 system.cpu.dcache.tags.tag_accesses              6061                       # Number of tag accesses
 system.cpu.dcache.tags.data_accesses             6061                       # Number of data accesses
+system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED     22019000                       # Cumulative time (in ticks) in various power states
 system.cpu.dcache.ReadReq_hits::cpu.data         1899                       # number of ReadReq hits
 system.cpu.dcache.ReadReq_hits::total            1899                       # number of ReadReq hits
 system.cpu.dcache.WriteReq_hits::cpu.data          506                       # number of WriteReq hits
@@ -696,6 +701,7 @@ system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 81858.381503
 system.cpu.dcache.demand_avg_mshr_miss_latency::total 81858.381503                       # average overall mshr miss latency
 system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 81858.381503                       # average overall mshr miss latency
 system.cpu.dcache.overall_avg_mshr_miss_latency::total 81858.381503                       # average overall mshr miss latency
+system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED     22019000                       # Cumulative time (in ticks) in various power states
 system.cpu.icache.tags.replacements                 0                       # number of replacements
 system.cpu.icache.tags.tagsinuse           158.432951                       # Cycle average of tags in use
 system.cpu.icache.tags.total_refs                1836                       # Total number of references to valid blocks.
@@ -711,6 +717,7 @@ system.cpu.icache.tags.age_task_id_blocks_1024::1          174
 system.cpu.icache.tags.occ_task_id_percent::1024     0.152832                       # Percentage of cache occupancy per task id
 system.cpu.icache.tags.tag_accesses              4899                       # Number of tag accesses
 system.cpu.icache.tags.data_accesses             4899                       # Number of data accesses
+system.cpu.icache.pwrStateResidencyTicks::UNDEFINED     22019000                       # Cumulative time (in ticks) in various power states
 system.cpu.icache.ReadReq_hits::cpu.inst         1836                       # number of ReadReq hits
 system.cpu.icache.ReadReq_hits::total            1836                       # number of ReadReq hits
 system.cpu.icache.demand_hits::cpu.inst          1836                       # number of demand (read+write) hits
@@ -783,6 +790,7 @@ system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 78180.511182
 system.cpu.icache.demand_avg_mshr_miss_latency::total 78180.511182                       # average overall mshr miss latency
 system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 78180.511182                       # average overall mshr miss latency
 system.cpu.icache.overall_avg_mshr_miss_latency::total 78180.511182                       # average overall mshr miss latency
+system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED     22019000                       # Cumulative time (in ticks) in various power states
 system.cpu.l2cache.tags.replacements                0                       # number of replacements
 system.cpu.l2cache.tags.tagsinuse          220.994877                       # Cycle average of tags in use
 system.cpu.l2cache.tags.total_refs                  1                       # Total number of references to valid blocks.
@@ -800,6 +808,7 @@ system.cpu.l2cache.tags.age_task_id_blocks_1024::1          241
 system.cpu.l2cache.tags.occ_task_id_percent::1024     0.012604                       # Percentage of cache occupancy per task id
 system.cpu.l2cache.tags.tag_accesses             4373                       # Number of tag accesses
 system.cpu.l2cache.tags.data_accesses            4373                       # Number of data accesses
+system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED     22019000                       # Cumulative time (in ticks) in various power states
 system.cpu.l2cache.ReadCleanReq_hits::cpu.inst            1                       # number of ReadCleanReq hits
 system.cpu.l2cache.ReadCleanReq_hits::total            1                       # number of ReadCleanReq hits
 system.cpu.l2cache.demand_hits::cpu.inst            1                       # number of demand (read+write) hits
@@ -926,6 +935,7 @@ system.cpu.toL2Bus.snoop_filter.hit_multi_requests            0
 system.cpu.toL2Bus.snoop_filter.tot_snoops            0                       # Total number of snoops made to the snoop filter.
 system.cpu.toL2Bus.snoop_filter.hit_single_snoops            0                       # Number of snoops hitting in the snoop filter with a single holder of the requested data.
 system.cpu.toL2Bus.snoop_filter.hit_multi_snoops            0                       # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data.
+system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED     22019000                       # Cumulative time (in ticks) in various power states
 system.cpu.toL2Bus.trans_dist::ReadResp           414                       # Transaction distribution
 system.cpu.toL2Bus.trans_dist::ReadExReq           72                       # Transaction distribution
 system.cpu.toL2Bus.trans_dist::ReadExResp           72                       # Transaction distribution
@@ -955,6 +965,7 @@ system.cpu.toL2Bus.respLayer0.occupancy        469500                       # La
 system.cpu.toL2Bus.respLayer0.utilization          2.1                       # Layer utilization (%)
 system.cpu.toL2Bus.respLayer1.occupancy        259500                       # Layer occupancy (ticks)
 system.cpu.toL2Bus.respLayer1.utilization          1.2                       # Layer utilization (%)
+system.membus.pwrStateResidencyTicks::UNDEFINED     22019000                       # Cumulative time (in ticks) in various power states
 system.membus.trans_dist::ReadResp                413                       # Transaction distribution
 system.membus.trans_dist::ReadExReq                72                       # Transaction distribution
 system.membus.trans_dist::ReadExResp               72                       # Transaction distribution