stats: updates due to recent chagnesets

3 files changed, 24 insertions, 9 deletions

diff --git a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/config.ini
index 9dde3dbd5..78f16d59a 100644
--- a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/config.ini
+++ b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/config.ini
@@ -24,6 +24,7 @@ mem_mode=timing
 mem_ranges=
 memories=system.physmem
 mmap_using_noreserve=false
+multi_thread=false
 num_work_ids=16
 readfile=
 symbolfile=
@@ -155,6 +156,7 @@ children=tags
 addr_ranges=0:18446744073709551615
 assoc=2
 clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
 demand_mshr_reserve=1
 eventq_index=0
 forward_snoops=true
@@ -171,6 +173,7 @@ system=system
 tags=system.cpu.dcache.tags
 tgts_per_mshr=20
 write_buffers=8
+writeback_clean=false
 cpu_side=system.cpu.dcache_port
 mem_side=system.cpu.toL2Bus.slave[1]
 
@@ -502,6 +505,7 @@ children=tags
 addr_ranges=0:18446744073709551615
 assoc=2
 clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
 demand_mshr_reserve=1
 eventq_index=0
 forward_snoops=true
@@ -518,6 +522,7 @@ system=system
 tags=system.cpu.icache.tags
 tgts_per_mshr=20
 write_buffers=8
+writeback_clean=true
 cpu_side=system.cpu.icache_port
 mem_side=system.cpu.toL2Bus.slave[0]
 
@@ -551,6 +556,7 @@ children=tags
 addr_ranges=0:18446744073709551615
 assoc=8
 clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
 demand_mshr_reserve=1
 eventq_index=0
 forward_snoops=true
@@ -567,6 +573,7 @@ system=system
 tags=system.cpu.l2cache.tags
 tgts_per_mshr=12
 write_buffers=8
+writeback_clean=false
 cpu_side=system.cpu.toL2Bus.master[0]
 mem_side=system.membus.slave[1]
 
@@ -582,12 +589,13 @@ size=2097152
 
 [system.cpu.toL2Bus]
 type=CoherentXBar
+children=snoop_filter
 clk_domain=system.cpu_clk_domain
 eventq_index=0
 forward_latency=0
 frontend_latency=1
 response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
 snoop_response_latency=1
 system=system
 use_default_range=false
@@ -595,6 +603,13 @@ width=32
 master=system.cpu.l2cache.cpu_side
 slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
 
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
 [system.cpu.tracer]
 type=ExeTracer
 eventq_index=0
diff --git a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/simout b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/simout
index 7f87c40d6..8209dc599 100755
--- a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/simout
+++ b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/simout
@@ -3,9 +3,9 @@ Redirecting stderr to build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/o3-tim
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Sep 14 2015 20:54:01
-gem5 started Sep 14 2015 21:14:59
-gem5 executing on ribera.cs.wisc.edu
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:30:08
+gem5 executing on ribera.cs.wisc.edu, pid 29145
 command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/o3-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/o3-timing
 
 Global frequency set at 1000000000000 ticks per second
diff --git a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt
index 2791307e9..8afeda809 100644
--- a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt
+++ b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds                                  0.000022                       # Nu
 sim_ticks                                    21900500                       # Number of ticks simulated
 final_tick                                   21900500                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                 1000000000000                       # Frequency of simulated ticks
-host_inst_rate                                 101932                       # Simulator instruction rate (inst/s)
-host_op_rate                                   101910                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                              350189482                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 296592                       # Number of bytes of host memory used
-host_seconds                                     0.06                       # Real time elapsed on the host
+host_inst_rate                                  59160                       # Simulator instruction rate (inst/s)
+host_op_rate                                    59150                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                              203265202                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 292228                       # Number of bytes of host memory used
+host_seconds                                     0.11                       # Real time elapsed on the host
 sim_insts                                        6372                       # Number of instructions simulated
 sim_ops                                          6372                       # Number of ops (including micro ops) simulated
 system.voltage_domain.voltage                       1                       # Voltage in Volts