diff options
| author | Andreas Hansson <andreas.hansson@arm.com> | 2015-07-03 10:15:03 -0400 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2015-07-03 10:15:03 -0400 |
| commit | 25e1b1c1f5f4e0ad3976c88998161700135f4aae (patch) | |
| tree | 36e668b99a36c3dfcfefc157d7bd6b102b8f8af6 /tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token | |
| parent | 7e711c98f8fcd949b9430bbf243d60348d0ef28b (diff) | |
| download | gem5-25e1b1c1f5f4e0ad3976c88998161700135f4aae.tar.xz | |
stats: Update stats for cache, crossbar and DRAM changes
This update includes the changes to whole-line writes, the refinement
of Read to ReadClean and ReadShared, the introduction of CleanEvict
for snoop-filter tracking, and updates to the DRAM command scheduler
for bank-group-aware scheduling.
Needless to say, almost every regression is affected.
Diffstat (limited to 'tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token')
| -rw-r--r-- | tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/stats.txt | 313 |
1 files changed, 156 insertions, 157 deletions
diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/stats.txt b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/stats.txt index 23f7e060f..ca7e00529 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/stats.txt @@ -1,13 +1,13 @@ ---------- Begin Simulation Statistics ---------- -sim_seconds 0.000117 # Number of seconds simulated -sim_ticks 116770 # Number of ticks simulated -final_tick 116770 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) +sim_seconds 0.000116 # Number of seconds simulated +sim_ticks 116369 # Number of ticks simulated +final_tick 116369 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 63656 # Simulator instruction rate (inst/s) -host_op_rate 63646 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1162909 # Simulator tick rate (ticks/s) -host_mem_usage 451252 # Number of bytes of host memory used +host_inst_rate 61340 # Simulator instruction rate (inst/s) +host_op_rate 61332 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1116785 # Simulator tick rate (ticks/s) +host_mem_usage 453376 # Number of bytes of host memory used host_seconds 0.10 # Real time elapsed on the host sim_insts 6390 # Number of instructions simulated sim_ops 6390 # Number of ops (including micro ops) simulated @@ -21,35 +21,35 @@ system.mem_ctrls.num_reads::ruby.dir_cntrl0 1176 # system.mem_ctrls.num_reads::total 1176 # Number of read requests responded to by this memory system.mem_ctrls.num_writes::ruby.dir_cntrl0 228 # Number of write requests responded to by this memory system.mem_ctrls.num_writes::total 228 # Number of write requests responded to by this memory -system.mem_ctrls.bw_read::ruby.dir_cntrl0 644549114 # Total read bandwidth from this memory (bytes/s) -system.mem_ctrls.bw_read::total 644549114 # Total read bandwidth from this memory (bytes/s) -system.mem_ctrls.bw_write::ruby.dir_cntrl0 124963604 # Write bandwidth from this memory (bytes/s) -system.mem_ctrls.bw_write::total 124963604 # Write bandwidth from this memory (bytes/s) -system.mem_ctrls.bw_total::ruby.dir_cntrl0 769512717 # Total bandwidth to/from this memory (bytes/s) -system.mem_ctrls.bw_total::total 769512717 # Total bandwidth to/from this memory (bytes/s) +system.mem_ctrls.bw_read::ruby.dir_cntrl0 646770188 # Total read bandwidth from this memory (bytes/s) +system.mem_ctrls.bw_read::total 646770188 # Total read bandwidth from this memory (bytes/s) +system.mem_ctrls.bw_write::ruby.dir_cntrl0 125394220 # Write bandwidth from this memory (bytes/s) +system.mem_ctrls.bw_write::total 125394220 # Write bandwidth from this memory (bytes/s) +system.mem_ctrls.bw_total::ruby.dir_cntrl0 772164408 # Total bandwidth to/from this memory (bytes/s) +system.mem_ctrls.bw_total::total 772164408 # Total bandwidth to/from this memory (bytes/s) system.mem_ctrls.readReqs 1176 # Number of read requests accepted system.mem_ctrls.writeReqs 228 # Number of write requests accepted system.mem_ctrls.readBursts 1176 # Number of DRAM read bursts, including those serviced by the write queue system.mem_ctrls.writeBursts 228 # Number of DRAM write bursts, including those merged in the write queue -system.mem_ctrls.bytesReadDRAM 64960 # Total number of bytes read from DRAM -system.mem_ctrls.bytesReadWrQ 10304 # Total number of bytes read from write queue -system.mem_ctrls.bytesWritten 6144 # Total number of bytes written to DRAM +system.mem_ctrls.bytesReadDRAM 64320 # Total number of bytes read from DRAM +system.mem_ctrls.bytesReadWrQ 10944 # Total number of bytes read from write queue +system.mem_ctrls.bytesWritten 5120 # Total number of bytes written to DRAM system.mem_ctrls.bytesReadSys 75264 # Total read bytes from the system interface side system.mem_ctrls.bytesWrittenSys 14592 # Total written bytes from the system interface side -system.mem_ctrls.servicedByWrQ 161 # Number of DRAM read bursts serviced by the write queue -system.mem_ctrls.mergedWrBursts 109 # Number of DRAM write bursts merged with an existing one +system.mem_ctrls.servicedByWrQ 171 # Number of DRAM read bursts serviced by the write queue +system.mem_ctrls.mergedWrBursts 116 # Number of DRAM write bursts merged with an existing one system.mem_ctrls.neitherReadNorWriteReqs 0 # Number of requests that are neither read nor write system.mem_ctrls.perBankRdBursts::0 86 # Per bank write bursts system.mem_ctrls.perBankRdBursts::1 52 # Per bank write bursts system.mem_ctrls.perBankRdBursts::2 82 # Per bank write bursts system.mem_ctrls.perBankRdBursts::3 77 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::4 92 # Per bank write bursts +system.mem_ctrls.perBankRdBursts::4 87 # Per bank write bursts system.mem_ctrls.perBankRdBursts::5 18 # Per bank write bursts system.mem_ctrls.perBankRdBursts::6 1 # Per bank write bursts system.mem_ctrls.perBankRdBursts::7 3 # Per bank write bursts system.mem_ctrls.perBankRdBursts::8 0 # Per bank write bursts system.mem_ctrls.perBankRdBursts::9 1 # Per bank write bursts -system.mem_ctrls.perBankRdBursts::10 61 # Per bank write bursts +system.mem_ctrls.perBankRdBursts::10 56 # Per bank write bursts system.mem_ctrls.perBankRdBursts::11 53 # Per bank write bursts system.mem_ctrls.perBankRdBursts::12 22 # Per bank write bursts system.mem_ctrls.perBankRdBursts::13 361 # Per bank write bursts @@ -59,21 +59,21 @@ system.mem_ctrls.perBankWrBursts::0 0 # Pe system.mem_ctrls.perBankWrBursts::1 0 # Per bank write bursts system.mem_ctrls.perBankWrBursts::2 0 # Per bank write bursts system.mem_ctrls.perBankWrBursts::3 0 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::4 26 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::5 0 # Per bank write bursts +system.mem_ctrls.perBankWrBursts::4 15 # Per bank write bursts +system.mem_ctrls.perBankWrBursts::5 1 # Per bank write bursts system.mem_ctrls.perBankWrBursts::6 0 # Per bank write bursts system.mem_ctrls.perBankWrBursts::7 0 # Per bank write bursts system.mem_ctrls.perBankWrBursts::8 0 # Per bank write bursts system.mem_ctrls.perBankWrBursts::9 0 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::10 5 # Per bank write bursts +system.mem_ctrls.perBankWrBursts::10 3 # Per bank write bursts system.mem_ctrls.perBankWrBursts::11 0 # Per bank write bursts system.mem_ctrls.perBankWrBursts::12 0 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::13 21 # Per bank write bursts -system.mem_ctrls.perBankWrBursts::14 44 # Per bank write bursts +system.mem_ctrls.perBankWrBursts::13 18 # Per bank write bursts +system.mem_ctrls.perBankWrBursts::14 43 # Per bank write bursts system.mem_ctrls.perBankWrBursts::15 0 # Per bank write bursts system.mem_ctrls.numRdRetry 0 # Number of times read queue was full causing retry system.mem_ctrls.numWrRetry 0 # Number of times write queue was full causing retry -system.mem_ctrls.totGap 116679 # Total gap between requests +system.mem_ctrls.totGap 116278 # Total gap between requests system.mem_ctrls.readPktSize::0 0 # Read request sizes (log2) system.mem_ctrls.readPktSize::1 0 # Read request sizes (log2) system.mem_ctrls.readPktSize::2 0 # Read request sizes (log2) @@ -88,7 +88,7 @@ system.mem_ctrls.writePktSize::3 0 # Wr system.mem_ctrls.writePktSize::4 0 # Write request sizes (log2) system.mem_ctrls.writePktSize::5 0 # Write request sizes (log2) system.mem_ctrls.writePktSize::6 228 # Write request sizes (log2) -system.mem_ctrls.rdQLenPdf::0 1015 # What read queue length does an incoming req see +system.mem_ctrls.rdQLenPdf::0 1005 # What read queue length does an incoming req see system.mem_ctrls.rdQLenPdf::1 0 # What read queue length does an incoming req see system.mem_ctrls.rdQLenPdf::2 0 # What read queue length does an incoming req see system.mem_ctrls.rdQLenPdf::3 0 # What read queue length does an incoming req see @@ -137,12 +137,12 @@ system.mem_ctrls.wrQLenPdf::13 1 # Wh system.mem_ctrls.wrQLenPdf::14 1 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::15 1 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::16 1 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::17 7 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::18 7 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::19 7 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::20 7 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::21 7 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::22 7 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::17 6 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::18 6 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::19 6 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::20 6 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::21 6 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::22 6 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::23 6 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::24 6 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::25 6 # What write queue length does an incoming req see @@ -152,7 +152,7 @@ system.mem_ctrls.wrQLenPdf::28 6 # Wh system.mem_ctrls.wrQLenPdf::29 6 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::30 6 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::31 6 # What write queue length does an incoming req see -system.mem_ctrls.wrQLenPdf::32 6 # What write queue length does an incoming req see +system.mem_ctrls.wrQLenPdf::32 5 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::33 0 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::34 0 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::35 0 # What write queue length does an incoming req see @@ -184,85 +184,84 @@ system.mem_ctrls.wrQLenPdf::60 0 # Wh system.mem_ctrls.wrQLenPdf::61 0 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::62 0 # What write queue length does an incoming req see system.mem_ctrls.wrQLenPdf::63 0 # What write queue length does an incoming req see -system.mem_ctrls.bytesPerActivate::samples 202 # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::mean 339.643564 # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::gmean 206.317034 # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::stdev 334.142270 # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::0-127 63 31.19% 31.19% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::128-255 47 23.27% 54.46% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::256-383 25 12.38% 66.83% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::384-511 13 6.44% 73.27% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::512-639 14 6.93% 80.20% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::640-767 7 3.47% 83.66% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::768-895 3 1.49% 85.15% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::896-1023 5 2.48% 87.62% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::1024-1151 25 12.38% 100.00% # Bytes accessed per row activation -system.mem_ctrls.bytesPerActivate::total 202 # Bytes accessed per row activation -system.mem_ctrls.rdPerTurnAround::samples 6 # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::mean 155.833333 # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::gmean 115.513983 # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::stdev 90.977836 # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::16-31 1 16.67% 16.67% # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::80-95 1 16.67% 33.33% # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::160-175 1 16.67% 50.00% # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::192-207 1 16.67% 66.67% # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::208-223 1 16.67% 83.33% # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::256-271 1 16.67% 100.00% # Reads before turning the bus around for writes -system.mem_ctrls.rdPerTurnAround::total 6 # Reads before turning the bus around for writes -system.mem_ctrls.wrPerTurnAround::samples 6 # Writes before turning the bus around for reads +system.mem_ctrls.bytesPerActivate::samples 201 # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::mean 334.328358 # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::gmean 202.953148 # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::stdev 329.613215 # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::0-127 65 32.34% 32.34% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::128-255 44 21.89% 54.23% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::256-383 26 12.94% 67.16% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::384-511 14 6.97% 74.13% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::512-639 13 6.47% 80.60% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::640-767 7 3.48% 84.08% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::768-895 4 1.99% 86.07% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::896-1023 5 2.49% 88.56% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::1024-1151 23 11.44% 100.00% # Bytes accessed per row activation +system.mem_ctrls.bytesPerActivate::total 201 # Bytes accessed per row activation +system.mem_ctrls.rdPerTurnAround::samples 5 # Reads before turning the bus around for writes +system.mem_ctrls.rdPerTurnAround::mean 135 # Reads before turning the bus around for writes +system.mem_ctrls.rdPerTurnAround::gmean 98.212508 # Reads before turning the bus around for writes +system.mem_ctrls.rdPerTurnAround::stdev 84.208076 # Reads before turning the bus around for writes +system.mem_ctrls.rdPerTurnAround::16-23 1 20.00% 20.00% # Reads before turning the bus around for writes +system.mem_ctrls.rdPerTurnAround::80-87 1 20.00% 40.00% # Reads before turning the bus around for writes +system.mem_ctrls.rdPerTurnAround::160-167 1 20.00% 60.00% # Reads before turning the bus around for writes +system.mem_ctrls.rdPerTurnAround::192-199 1 20.00% 80.00% # Reads before turning the bus around for writes +system.mem_ctrls.rdPerTurnAround::216-223 1 20.00% 100.00% # Reads before turning the bus around for writes +system.mem_ctrls.rdPerTurnAround::total 5 # Reads before turning the bus around for writes +system.mem_ctrls.wrPerTurnAround::samples 5 # Writes before turning the bus around for reads system.mem_ctrls.wrPerTurnAround::mean 16 # Writes before turning the bus around for reads system.mem_ctrls.wrPerTurnAround::gmean 16.000000 # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::16 6 100.00% 100.00% # Writes before turning the bus around for reads -system.mem_ctrls.wrPerTurnAround::total 6 # Writes before turning the bus around for reads -system.mem_ctrls.totQLat 7533 # Total ticks spent queuing -system.mem_ctrls.totMemAccLat 26818 # Total ticks spent from burst creation until serviced by the DRAM -system.mem_ctrls.totBusLat 5075 # Total ticks spent in databus transfers -system.mem_ctrls.avgQLat 7.42 # Average queueing delay per DRAM burst +system.mem_ctrls.wrPerTurnAround::16 5 100.00% 100.00% # Writes before turning the bus around for reads +system.mem_ctrls.wrPerTurnAround::total 5 # Writes before turning the bus around for reads +system.mem_ctrls.totQLat 7422 # Total ticks spent queuing +system.mem_ctrls.totMemAccLat 26517 # Total ticks spent from burst creation until serviced by the DRAM +system.mem_ctrls.totBusLat 5025 # Total ticks spent in databus transfers +system.mem_ctrls.avgQLat 7.39 # Average queueing delay per DRAM burst system.mem_ctrls.avgBusLat 5.00 # Average bus latency per DRAM burst -system.mem_ctrls.avgMemAccLat 26.42 # Average memory access latency per DRAM burst -system.mem_ctrls.avgRdBW 556.31 # Average DRAM read bandwidth in MiByte/s -system.mem_ctrls.avgWrBW 52.62 # Average achieved write bandwidth in MiByte/s -system.mem_ctrls.avgRdBWSys 644.55 # Average system read bandwidth in MiByte/s -system.mem_ctrls.avgWrBWSys 124.96 # Average system write bandwidth in MiByte/s +system.mem_ctrls.avgMemAccLat 26.39 # Average memory access latency per DRAM burst +system.mem_ctrls.avgRdBW 552.72 # Average DRAM read bandwidth in MiByte/s +system.mem_ctrls.avgWrBW 44.00 # Average achieved write bandwidth in MiByte/s +system.mem_ctrls.avgRdBWSys 646.77 # Average system read bandwidth in MiByte/s +system.mem_ctrls.avgWrBWSys 125.39 # Average system write bandwidth in MiByte/s system.mem_ctrls.peakBW 12800.00 # Theoretical peak bandwidth in MiByte/s -system.mem_ctrls.busUtil 4.76 # Data bus utilization in percentage -system.mem_ctrls.busUtilRead 4.35 # Data bus utilization in percentage for reads -system.mem_ctrls.busUtilWrite 0.41 # Data bus utilization in percentage for writes +system.mem_ctrls.busUtil 4.66 # Data bus utilization in percentage +system.mem_ctrls.busUtilRead 4.32 # Data bus utilization in percentage for reads +system.mem_ctrls.busUtilWrite 0.34 # Data bus utilization in percentage for writes system.mem_ctrls.avgRdQLen 1.00 # Average read queue length when enqueuing -system.mem_ctrls.avgWrQLen 22.40 # Average write queue length when enqueuing -system.mem_ctrls.readRowHits 810 # Number of row buffer hits during reads -system.mem_ctrls.writeRowHits 92 # Number of row buffer hits during writes -system.mem_ctrls.readRowHitRate 79.80 # Row buffer hit rate for reads -system.mem_ctrls.writeRowHitRate 77.31 # Row buffer hit rate for writes -system.mem_ctrls.avgGap 83.10 # Average gap between requests -system.mem_ctrls.pageHitRate 79.54 # Row buffer hit rate, read and write combined +system.mem_ctrls.avgWrQLen 22.99 # Average write queue length when enqueuing +system.mem_ctrls.readRowHits 804 # Number of row buffer hits during reads +system.mem_ctrls.writeRowHits 74 # Number of row buffer hits during writes +system.mem_ctrls.readRowHitRate 80.00 # Row buffer hit rate for reads +system.mem_ctrls.writeRowHitRate 66.07 # Row buffer hit rate for writes +system.mem_ctrls.avgGap 82.82 # Average gap between requests +system.mem_ctrls.pageHitRate 78.60 # Row buffer hit rate, read and write combined system.mem_ctrls_0.actEnergy 514080 # Energy for activate commands per rank (pJ) system.mem_ctrls_0.preEnergy 285600 # Energy for precharge commands per rank (pJ) -system.mem_ctrls_0.readEnergy 5041920 # Energy for read commands per rank (pJ) -system.mem_ctrls_0.writeEnergy 269568 # Energy for write commands per rank (pJ) +system.mem_ctrls_0.readEnergy 4992000 # Energy for read commands per rank (pJ) +system.mem_ctrls_0.writeEnergy 165888 # Energy for write commands per rank (pJ) system.mem_ctrls_0.refreshEnergy 7119840 # Energy for refresh commands per rank (pJ) system.mem_ctrls_0.actBackEnergy 60923196 # Energy for active background per rank (pJ) system.mem_ctrls_0.preBackEnergy 12117000 # Energy for precharge background per rank (pJ) -system.mem_ctrls_0.totalEnergy 86271204 # Total energy per rank (pJ) -system.mem_ctrls_0.averagePower 789.566591 # Core power per rank (mW) -system.mem_ctrls_0.memoryStateTime::IDLE 22175 # Time in different power states +system.mem_ctrls_0.totalEnergy 86117604 # Total energy per rank (pJ) +system.mem_ctrls_0.averagePower 788.160821 # Core power per rank (mW) +system.mem_ctrls_0.memoryStateTime::IDLE 25118 # Time in different power states system.mem_ctrls_0.memoryStateTime::REF 3640 # Time in different power states system.mem_ctrls_0.memoryStateTime::PRE_PDN 0 # Time in different power states system.mem_ctrls_0.memoryStateTime::ACT 85821 # Time in different power states system.mem_ctrls_0.memoryStateTime::ACT_PDN 0 # Time in different power states system.mem_ctrls_1.actEnergy 937440 # Energy for activate commands per rank (pJ) system.mem_ctrls_1.preEnergy 520800 # Energy for precharge commands per rank (pJ) -system.mem_ctrls_1.readEnergy 6764160 # Energy for read commands per rank (pJ) -system.mem_ctrls_1.writeEnergy 725760 # Energy for write commands per rank (pJ) +system.mem_ctrls_1.readEnergy 6776640 # Energy for read commands per rank (pJ) +system.mem_ctrls_1.writeEnergy 663552 # Energy for write commands per rank (pJ) system.mem_ctrls_1.refreshEnergy 7119840 # Energy for refresh commands per rank (pJ) -system.mem_ctrls_1.actBackEnergy 72391140 # Energy for active background per rank (pJ) +system.mem_ctrls_1.actBackEnergy 72408924 # Energy for active background per rank (pJ) system.mem_ctrls_1.preBackEnergy 2062800 # Energy for precharge background per rank (pJ) -system.mem_ctrls_1.totalEnergy 90521940 # Total energy per rank (pJ) -system.mem_ctrls_1.averagePower 828.401709 # Core power per rank (mW) +system.mem_ctrls_1.totalEnergy 90489996 # Total energy per rank (pJ) +system.mem_ctrls_1.averagePower 827.912387 # Core power per rank (mW) system.mem_ctrls_1.memoryStateTime::IDLE 2878 # Time in different power states system.mem_ctrls_1.memoryStateTime::REF 3640 # Time in different power states system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states -system.mem_ctrls_1.memoryStateTime::ACT 102769 # Time in different power states +system.mem_ctrls_1.memoryStateTime::ACT 102795 # Time in different power states system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states system.cpu.clk_domain.clock 1 # Clock period in ticks system.cpu.dtb.fetch_hits 0 # ITB hits @@ -298,7 +297,7 @@ system.cpu.itb.data_misses 0 # DT system.cpu.itb.data_acv 0 # DTB access violations system.cpu.itb.data_accesses 0 # DTB accesses system.cpu.workload.num_syscalls 17 # Number of system calls -system.cpu.numCycles 116770 # number of cpu cycles simulated +system.cpu.numCycles 116369 # number of cpu cycles simulated system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed system.cpu.committedInsts 6390 # Number of instructions committed @@ -317,7 +316,7 @@ system.cpu.num_mem_refs 2058 # nu system.cpu.num_load_insts 1190 # Number of load instructions system.cpu.num_store_insts 868 # Number of store instructions system.cpu.num_idle_cycles 0 # Number of idle cycles -system.cpu.num_busy_cycles 116770 # Number of busy cycles +system.cpu.num_busy_cycles 116369 # Number of busy cycles system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles system.cpu.idle_fraction 0 # Percentage of idle cycles system.cpu.Branches 1050 # Number of branches fetched @@ -367,10 +366,10 @@ system.ruby.outstanding_req_hist::total 8449 system.ruby.latency_hist::bucket_size 64 system.ruby.latency_hist::max_bucket 639 system.ruby.latency_hist::samples 8448 -system.ruby.latency_hist::mean 12.822206 -system.ruby.latency_hist::gmean 3.506830 -system.ruby.latency_hist::stdev 27.805292 -system.ruby.latency_hist | 7433 87.99% 87.99% | 995 11.78% 99.76% | 6 0.07% 99.83% | 2 0.02% 99.86% | 8 0.09% 99.95% | 4 0.05% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.latency_hist::mean 12.774740 +system.ruby.latency_hist::gmean 3.504112 +system.ruby.latency_hist::stdev 27.744497 +system.ruby.latency_hist | 7443 88.10% 88.10% | 986 11.67% 99.78% | 5 0.06% 99.83% | 2 0.02% 99.86% | 7 0.08% 99.94% | 5 0.06% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% system.ruby.latency_hist::total 8448 system.ruby.hit_latency_hist::bucket_size 4 system.ruby.hit_latency_hist::max_bucket 39 @@ -383,10 +382,10 @@ system.ruby.hit_latency_hist::total 7272 system.ruby.miss_latency_hist::bucket_size 64 system.ruby.miss_latency_hist::max_bucket 639 system.ruby.miss_latency_hist::samples 1176 -system.ruby.miss_latency_hist::mean 75.774660 -system.ruby.miss_latency_hist::gmean 72.686009 -system.ruby.miss_latency_hist::stdev 29.375504 -system.ruby.miss_latency_hist | 161 13.69% 13.69% | 995 84.61% 98.30% | 6 0.51% 98.81% | 2 0.17% 98.98% | 8 0.68% 99.66% | 4 0.34% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.miss_latency_hist::mean 75.433673 +system.ruby.miss_latency_hist::gmean 72.282303 +system.ruby.miss_latency_hist::stdev 29.690242 +system.ruby.miss_latency_hist | 171 14.54% 14.54% | 986 83.84% 98.38% | 5 0.43% 98.81% | 2 0.17% 98.98% | 7 0.60% 99.57% | 5 0.43% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% system.ruby.miss_latency_hist::total 1176 system.ruby.Directory.incomplete_times 1175 system.ruby.l1_cntrl0.L1Dcache.demand_hits 1311 # Number of cache demand hits @@ -399,7 +398,7 @@ system.ruby.l2_cntrl0.L2cache.demand_hits 189 # N system.ruby.l2_cntrl0.L2cache.demand_misses 1194 # Number of cache demand misses system.ruby.l2_cntrl0.L2cache.demand_accesses 1383 # Number of cache demand accesses system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks -system.ruby.network.routers0.percent_links_utilized 5.578702 +system.ruby.network.routers0.percent_links_utilized 5.597926 system.ruby.network.routers0.msg_count.Request_Control::1 1383 system.ruby.network.routers0.msg_count.Response_Data::4 1176 system.ruby.network.routers0.msg_count.ResponseL2hit_Data::4 207 @@ -412,7 +411,7 @@ system.ruby.network.routers0.msg_bytes.ResponseL2hit_Data::4 14904 system.ruby.network.routers0.msg_bytes.Response_Control::4 8 system.ruby.network.routers0.msg_bytes.Writeback_Data::4 97488 system.ruby.network.routers0.msg_bytes.Persistent_Control::3 320 -system.ruby.network.routers1.percent_links_utilized 4.210200 +system.ruby.network.routers1.percent_links_utilized 4.224708 system.ruby.network.routers1.msg_count.Request_Control::1 1383 system.ruby.network.routers1.msg_count.Request_Control::2 1194 system.ruby.network.routers1.msg_count.ResponseL2hit_Data::4 207 @@ -427,7 +426,7 @@ system.ruby.network.routers1.msg_bytes.Response_Control::4 8 system.ruby.network.routers1.msg_bytes.Writeback_Data::4 113904 system.ruby.network.routers1.msg_bytes.Writeback_Control::4 7728 system.ruby.network.routers1.msg_bytes.Persistent_Control::3 160 -system.ruby.network.routers2.percent_links_utilized 3.172048 +system.ruby.network.routers2.percent_links_utilized 3.182978 system.ruby.network.routers2.msg_count.Request_Control::2 1194 system.ruby.network.routers2.msg_count.Response_Data::4 1176 system.ruby.network.routers2.msg_count.Writeback_Data::4 228 @@ -438,7 +437,7 @@ system.ruby.network.routers2.msg_bytes.Response_Data::4 84672 system.ruby.network.routers2.msg_bytes.Writeback_Data::4 16416 system.ruby.network.routers2.msg_bytes.Writeback_Control::4 7728 system.ruby.network.routers2.msg_bytes.Persistent_Control::3 160 -system.ruby.network.routers3.percent_links_utilized 4.320316 +system.ruby.network.routers3.percent_links_utilized 4.335204 system.ruby.network.routers3.msg_count.Request_Control::1 1383 system.ruby.network.routers3.msg_count.Request_Control::2 1194 system.ruby.network.routers3.msg_count.Response_Data::4 1176 @@ -469,7 +468,7 @@ system.ruby.network.msg_byte.Response_Control 24 system.ruby.network.msg_byte.Writeback_Data 341712 system.ruby.network.msg_byte.Writeback_Control 23184 system.ruby.network.msg_byte.Persistent_Control 960 -system.ruby.network.routers0.throttle0.link_utilization 5.338700 +system.ruby.network.routers0.throttle0.link_utilization 5.357097 system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 1176 system.ruby.network.routers0.throttle0.msg_count.ResponseL2hit_Data::4 207 system.ruby.network.routers0.throttle0.msg_count.Response_Control::4 1 @@ -478,21 +477,21 @@ system.ruby.network.routers0.throttle0.msg_bytes.Response_Data::4 84672 system.ruby.network.routers0.throttle0.msg_bytes.ResponseL2hit_Data::4 14904 system.ruby.network.routers0.throttle0.msg_bytes.Response_Control::4 8 system.ruby.network.routers0.throttle0.msg_bytes.Persistent_Control::3 160 -system.ruby.network.routers0.throttle1.link_utilization 5.818703 +system.ruby.network.routers0.throttle1.link_utilization 5.838754 system.ruby.network.routers0.throttle1.msg_count.Request_Control::1 1383 system.ruby.network.routers0.throttle1.msg_count.Writeback_Data::4 1354 system.ruby.network.routers0.throttle1.msg_count.Persistent_Control::3 20 system.ruby.network.routers0.throttle1.msg_bytes.Request_Control::1 11064 system.ruby.network.routers0.throttle1.msg_bytes.Writeback_Data::4 97488 system.ruby.network.routers0.throttle1.msg_bytes.Persistent_Control::3 160 -system.ruby.network.routers1.throttle0.link_utilization 5.818703 +system.ruby.network.routers1.throttle0.link_utilization 5.838754 system.ruby.network.routers1.throttle0.msg_count.Request_Control::1 1383 system.ruby.network.routers1.throttle0.msg_count.Writeback_Data::4 1354 system.ruby.network.routers1.throttle0.msg_count.Persistent_Control::3 20 system.ruby.network.routers1.throttle0.msg_bytes.Request_Control::1 11064 system.ruby.network.routers1.throttle0.msg_bytes.Writeback_Data::4 97488 system.ruby.network.routers1.throttle0.msg_bytes.Persistent_Control::3 160 -system.ruby.network.routers1.throttle1.link_utilization 2.601696 +system.ruby.network.routers1.throttle1.link_utilization 2.610661 system.ruby.network.routers1.throttle1.msg_count.Request_Control::2 1194 system.ruby.network.routers1.throttle1.msg_count.ResponseL2hit_Data::4 207 system.ruby.network.routers1.throttle1.msg_count.Response_Control::4 1 @@ -503,7 +502,7 @@ system.ruby.network.routers1.throttle1.msg_bytes.ResponseL2hit_Data::4 14 system.ruby.network.routers1.throttle1.msg_bytes.Response_Control::4 8 system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Data::4 16416 system.ruby.network.routers1.throttle1.msg_bytes.Writeback_Control::4 7728 -system.ruby.network.routers2.throttle0.link_utilization 1.812109 +system.ruby.network.routers2.throttle0.link_utilization 1.818354 system.ruby.network.routers2.throttle0.msg_count.Request_Control::2 1194 system.ruby.network.routers2.throttle0.msg_count.Writeback_Data::4 228 system.ruby.network.routers2.throttle0.msg_count.Writeback_Control::4 966 @@ -512,24 +511,24 @@ system.ruby.network.routers2.throttle0.msg_bytes.Request_Control::2 9552 system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Data::4 16416 system.ruby.network.routers2.throttle0.msg_bytes.Writeback_Control::4 7728 system.ruby.network.routers2.throttle0.msg_bytes.Persistent_Control::3 160 -system.ruby.network.routers2.throttle1.link_utilization 4.531986 +system.ruby.network.routers2.throttle1.link_utilization 4.547603 system.ruby.network.routers2.throttle1.msg_count.Response_Data::4 1176 system.ruby.network.routers2.throttle1.msg_bytes.Response_Data::4 84672 -system.ruby.network.routers3.throttle0.link_utilization 5.330136 +system.ruby.network.routers3.throttle0.link_utilization 5.348503 system.ruby.network.routers3.throttle0.msg_count.Response_Data::4 1176 system.ruby.network.routers3.throttle0.msg_count.ResponseL2hit_Data::4 207 system.ruby.network.routers3.throttle0.msg_count.Response_Control::4 1 system.ruby.network.routers3.throttle0.msg_bytes.Response_Data::4 84672 system.ruby.network.routers3.throttle0.msg_bytes.ResponseL2hit_Data::4 14904 system.ruby.network.routers3.throttle0.msg_bytes.Response_Control::4 8 -system.ruby.network.routers3.throttle1.link_utilization 5.818703 +system.ruby.network.routers3.throttle1.link_utilization 5.838754 system.ruby.network.routers3.throttle1.msg_count.Request_Control::1 1383 system.ruby.network.routers3.throttle1.msg_count.Writeback_Data::4 1354 system.ruby.network.routers3.throttle1.msg_count.Persistent_Control::3 20 system.ruby.network.routers3.throttle1.msg_bytes.Request_Control::1 11064 system.ruby.network.routers3.throttle1.msg_bytes.Writeback_Data::4 97488 system.ruby.network.routers3.throttle1.msg_bytes.Persistent_Control::3 160 -system.ruby.network.routers3.throttle2.link_utilization 1.812109 +system.ruby.network.routers3.throttle2.link_utilization 1.818354 system.ruby.network.routers3.throttle2.msg_count.Request_Control::2 1194 system.ruby.network.routers3.throttle2.msg_count.Writeback_Data::4 228 system.ruby.network.routers3.throttle2.msg_count.Writeback_Control::4 966 @@ -541,10 +540,10 @@ system.ruby.network.routers3.throttle2.msg_bytes.Persistent_Control::3 system.ruby.LD.latency_hist::bucket_size 64 system.ruby.LD.latency_hist::max_bucket 639 system.ruby.LD.latency_hist::samples 1183 -system.ruby.LD.latency_hist::mean 29.646661 -system.ruby.LD.latency_hist::gmean 8.889029 -system.ruby.LD.latency_hist::stdev 37.195991 -system.ruby.LD.latency_hist | 844 71.34% 71.34% | 335 28.32% 99.66% | 0 0.00% 99.66% | 2 0.17% 99.83% | 1 0.08% 99.92% | 1 0.08% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.LD.latency_hist::mean 29.333897 +system.ruby.LD.latency_hist::gmean 8.854915 +system.ruby.LD.latency_hist::stdev 36.549796 +system.ruby.LD.latency_hist | 850 71.85% 71.85% | 330 27.90% 99.75% | 0 0.00% 99.75% | 1 0.08% 99.83% | 1 0.08% 99.92% | 1 0.08% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% system.ruby.LD.latency_hist::total 1183 system.ruby.LD.hit_latency_hist::bucket_size 4 system.ruby.LD.hit_latency_hist::max_bucket 39 @@ -557,18 +556,18 @@ system.ruby.LD.hit_latency_hist::total 760 system.ruby.LD.miss_latency_hist::bucket_size 64 system.ruby.LD.miss_latency_hist::max_bucket 639 system.ruby.LD.miss_latency_hist::samples 423 -system.ruby.LD.miss_latency_hist::mean 73.808511 -system.ruby.LD.miss_latency_hist::gmean 70.625115 -system.ruby.LD.miss_latency_hist::stdev 26.886169 -system.ruby.LD.miss_latency_hist | 84 19.86% 19.86% | 335 79.20% 99.05% | 0 0.00% 99.05% | 2 0.47% 99.53% | 1 0.24% 99.76% | 1 0.24% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.LD.miss_latency_hist::mean 72.933806 +system.ruby.LD.miss_latency_hist::gmean 69.869692 +system.ruby.LD.miss_latency_hist::stdev 25.813501 +system.ruby.LD.miss_latency_hist | 90 21.28% 21.28% | 330 78.01% 99.29% | 0 0.00% 99.29% | 1 0.24% 99.53% | 1 0.24% 99.76% | 1 0.24% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% system.ruby.LD.miss_latency_hist::total 423 system.ruby.ST.latency_hist::bucket_size 64 system.ruby.ST.latency_hist::max_bucket 639 system.ruby.ST.latency_hist::samples 865 -system.ruby.ST.latency_hist::mean 15.620809 -system.ruby.ST.latency_hist::gmean 4.414027 -system.ruby.ST.latency_hist::stdev 30.143438 -system.ruby.ST.latency_hist | 774 89.48% 89.48% | 87 10.06% 99.54% | 2 0.23% 99.77% | 0 0.00% 99.77% | 0 0.00% 99.77% | 2 0.23% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.ST.latency_hist::mean 15.470520 +system.ruby.ST.latency_hist::gmean 4.402566 +system.ruby.ST.latency_hist::stdev 29.923272 +system.ruby.ST.latency_hist | 778 89.94% 89.94% | 83 9.60% 99.54% | 2 0.23% 99.77% | 0 0.00% 99.77% | 0 0.00% 99.77% | 2 0.23% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% system.ruby.ST.latency_hist::total 865 system.ruby.ST.hit_latency_hist::bucket_size 4 system.ruby.ST.hit_latency_hist::max_bucket 39 @@ -581,18 +580,18 @@ system.ruby.ST.hit_latency_hist::total 697 system.ruby.ST.miss_latency_hist::bucket_size 64 system.ruby.ST.miss_latency_hist::max_bucket 639 system.ruby.ST.miss_latency_hist::samples 168 -system.ruby.ST.miss_latency_hist::mean 66.535714 -system.ruby.ST.miss_latency_hist::gmean 61.950283 -system.ruby.ST.miss_latency_hist::stdev 36.753409 -system.ruby.ST.miss_latency_hist | 77 45.83% 45.83% | 87 51.79% 97.62% | 2 1.19% 98.81% | 0 0.00% 98.81% | 0 0.00% 98.81% | 2 1.19% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.ST.miss_latency_hist::mean 65.761905 +system.ruby.ST.miss_latency_hist::gmean 61.126570 +system.ruby.ST.miss_latency_hist::stdev 36.894126 +system.ruby.ST.miss_latency_hist | 81 48.21% 48.21% | 83 49.40% 97.62% | 2 1.19% 98.81% | 0 0.00% 98.81% | 0 0.00% 98.81% | 2 1.19% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% system.ruby.ST.miss_latency_hist::total 168 system.ruby.IFETCH.latency_hist::bucket_size 64 system.ruby.IFETCH.latency_hist::max_bucket 639 system.ruby.IFETCH.latency_hist::samples 6400 -system.ruby.IFETCH.latency_hist::mean 9.334062 -system.ruby.IFETCH.latency_hist::gmean 2.862491 -system.ruby.IFETCH.latency_hist::stdev 24.016058 -system.ruby.IFETCH.latency_hist | 5815 90.86% 90.86% | 573 8.95% 99.81% | 4 0.06% 99.87% | 0 0.00% 99.87% | 7 0.11% 99.98% | 1 0.02% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.IFETCH.latency_hist::mean 9.349531 +system.ruby.IFETCH.latency_hist::gmean 2.862602 +system.ruby.IFETCH.latency_hist::stdev 24.187807 +system.ruby.IFETCH.latency_hist | 5815 90.86% 90.86% | 573 8.95% 99.81% | 3 0.05% 99.86% | 1 0.02% 99.87% | 6 0.09% 99.97% | 2 0.03% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% system.ruby.IFETCH.latency_hist::total 6400 system.ruby.IFETCH.hit_latency_hist::bucket_size 4 system.ruby.IFETCH.hit_latency_hist::max_bucket 39 @@ -605,10 +604,10 @@ system.ruby.IFETCH.hit_latency_hist::total 5815 system.ruby.IFETCH.miss_latency_hist::bucket_size 64 system.ruby.IFETCH.miss_latency_hist::max_bucket 639 system.ruby.IFETCH.miss_latency_hist::samples 585 -system.ruby.IFETCH.miss_latency_hist::mean 79.849573 -system.ruby.IFETCH.miss_latency_hist::gmean 77.699044 -system.ruby.IFETCH.miss_latency_hist::stdev 27.992378 -system.ruby.IFETCH.miss_latency_hist | 0 0.00% 0.00% | 573 97.95% 97.95% | 4 0.68% 98.63% | 0 0.00% 98.63% | 7 1.20% 99.83% | 1 0.17% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.IFETCH.miss_latency_hist::mean 80.018803 +system.ruby.IFETCH.miss_latency_hist::gmean 77.731964 +system.ruby.IFETCH.miss_latency_hist::stdev 29.160832 +system.ruby.IFETCH.miss_latency_hist | 0 0.00% 0.00% | 573 97.95% 97.95% | 3 0.51% 98.46% | 1 0.17% 98.63% | 6 1.03% 99.66% | 2 0.34% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% system.ruby.IFETCH.miss_latency_hist::total 585 system.ruby.L1Cache.hit_mach_latency_hist::bucket_size 1 system.ruby.L1Cache.hit_mach_latency_hist::max_bucket 9 @@ -628,10 +627,10 @@ system.ruby.L2Cache.hit_mach_latency_hist::total 207 system.ruby.Directory.miss_mach_latency_hist::bucket_size 64 system.ruby.Directory.miss_mach_latency_hist::max_bucket 639 system.ruby.Directory.miss_mach_latency_hist::samples 1176 -system.ruby.Directory.miss_mach_latency_hist::mean 75.774660 -system.ruby.Directory.miss_mach_latency_hist::gmean 72.686009 -system.ruby.Directory.miss_mach_latency_hist::stdev 29.375504 -system.ruby.Directory.miss_mach_latency_hist | 161 13.69% 13.69% | 995 84.61% 98.30% | 6 0.51% 98.81% | 2 0.17% 98.98% | 8 0.68% 99.66% | 4 0.34% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.Directory.miss_mach_latency_hist::mean 75.433673 +system.ruby.Directory.miss_mach_latency_hist::gmean 72.282303 +system.ruby.Directory.miss_mach_latency_hist::stdev 29.690242 +system.ruby.Directory.miss_mach_latency_hist | 171 14.54% 14.54% | 986 83.84% 98.38% | 5 0.43% 98.81% | 2 0.17% 98.98% | 7 0.60% 99.57% | 5 0.43% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% system.ruby.Directory.miss_mach_latency_hist::total 1176 system.ruby.Directory.miss_latency_hist.issue_to_initial_request::bucket_size 1 system.ruby.Directory.miss_latency_hist.issue_to_initial_request::max_bucket 9 @@ -677,10 +676,10 @@ system.ruby.LD.L2Cache.hit_type_mach_latency_hist::total 102 system.ruby.LD.Directory.miss_type_mach_latency_hist::bucket_size 64 system.ruby.LD.Directory.miss_type_mach_latency_hist::max_bucket 639 system.ruby.LD.Directory.miss_type_mach_latency_hist::samples 423 -system.ruby.LD.Directory.miss_type_mach_latency_hist::mean 73.808511 -system.ruby.LD.Directory.miss_type_mach_latency_hist::gmean 70.625115 -system.ruby.LD.Directory.miss_type_mach_latency_hist::stdev 26.886169 -system.ruby.LD.Directory.miss_type_mach_latency_hist | 84 19.86% 19.86% | 335 79.20% 99.05% | 0 0.00% 99.05% | 2 0.47% 99.53% | 1 0.24% 99.76% | 1 0.24% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.LD.Directory.miss_type_mach_latency_hist::mean 72.933806 +system.ruby.LD.Directory.miss_type_mach_latency_hist::gmean 69.869692 +system.ruby.LD.Directory.miss_type_mach_latency_hist::stdev 25.813501 +system.ruby.LD.Directory.miss_type_mach_latency_hist | 90 21.28% 21.28% | 330 78.01% 99.29% | 0 0.00% 99.29% | 1 0.24% 99.53% | 1 0.24% 99.76% | 1 0.24% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% system.ruby.LD.Directory.miss_type_mach_latency_hist::total 423 system.ruby.ST.L1Cache.hit_type_mach_latency_hist::bucket_size 1 system.ruby.ST.L1Cache.hit_type_mach_latency_hist::max_bucket 9 @@ -700,10 +699,10 @@ system.ruby.ST.L2Cache.hit_type_mach_latency_hist::total 44 system.ruby.ST.Directory.miss_type_mach_latency_hist::bucket_size 64 system.ruby.ST.Directory.miss_type_mach_latency_hist::max_bucket 639 system.ruby.ST.Directory.miss_type_mach_latency_hist::samples 168 -system.ruby.ST.Directory.miss_type_mach_latency_hist::mean 66.535714 -system.ruby.ST.Directory.miss_type_mach_latency_hist::gmean 61.950283 -system.ruby.ST.Directory.miss_type_mach_latency_hist::stdev 36.753409 -system.ruby.ST.Directory.miss_type_mach_latency_hist | 77 45.83% 45.83% | 87 51.79% 97.62% | 2 1.19% 98.81% | 0 0.00% 98.81% | 0 0.00% 98.81% | 2 1.19% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.ST.Directory.miss_type_mach_latency_hist::mean 65.761905 +system.ruby.ST.Directory.miss_type_mach_latency_hist::gmean 61.126570 +system.ruby.ST.Directory.miss_type_mach_latency_hist::stdev 36.894126 +system.ruby.ST.Directory.miss_type_mach_latency_hist | 81 48.21% 48.21% | 83 49.40% 97.62% | 2 1.19% 98.81% | 0 0.00% 98.81% | 0 0.00% 98.81% | 2 1.19% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% system.ruby.ST.Directory.miss_type_mach_latency_hist::total 168 system.ruby.IFETCH.L1Cache.hit_type_mach_latency_hist::bucket_size 1 system.ruby.IFETCH.L1Cache.hit_type_mach_latency_hist::max_bucket 9 @@ -723,10 +722,10 @@ system.ruby.IFETCH.L2Cache.hit_type_mach_latency_hist::total 61 system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::bucket_size 64 system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::max_bucket 639 system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::samples 585 -system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::mean 79.849573 -system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::gmean 77.699044 -system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::stdev 27.992378 -system.ruby.IFETCH.Directory.miss_type_mach_latency_hist | 0 0.00% 0.00% | 573 97.95% 97.95% | 4 0.68% 98.63% | 0 0.00% 98.63% | 7 1.20% 99.83% | 1 0.17% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% +system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::mean 80.018803 +system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::gmean 77.731964 +system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::stdev 29.160832 +system.ruby.IFETCH.Directory.miss_type_mach_latency_hist | 0 0.00% 0.00% | 573 97.95% 97.95% | 3 0.51% 98.46% | 1 0.17% 98.63% | 6 1.03% 99.66% | 2 0.34% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% system.ruby.IFETCH.Directory.miss_type_mach_latency_hist::total 585 system.ruby.Directory_Controller.GETX 209 0.00% 0.00% system.ruby.Directory_Controller.GETS 1013 0.00% 0.00% @@ -773,7 +772,7 @@ system.ruby.L1Cache_Controller.S.Ifetch 331 0.00% 0.00% system.ruby.L1Cache_Controller.S.Store 21 0.00% 0.00% system.ruby.L1Cache_Controller.S.L1_Replacement 142 0.00% 0.00% system.ruby.L1Cache_Controller.M.Load 184 0.00% 0.00% -system.ruby.L1Cache_Controller.M.Ifetch 3298 0.00% 0.00% +system.ruby.L1Cache_Controller.M.Ifetch 3297 0.00% 0.00% system.ruby.L1Cache_Controller.M.Store 32 0.00% 0.00% system.ruby.L1Cache_Controller.M.L1_Replacement 944 0.00% 0.00% system.ruby.L1Cache_Controller.M.Own_Lock_or_Unlock 9 0.00% 0.00% @@ -782,7 +781,7 @@ system.ruby.L1Cache_Controller.MM.Store 330 0.00% 0.00% system.ruby.L1Cache_Controller.MM.L1_Replacement 268 0.00% 0.00% system.ruby.L1Cache_Controller.MM.Own_Lock_or_Unlock 1 0.00% 0.00% system.ruby.L1Cache_Controller.M_W.Load 80 0.00% 0.00% -system.ruby.L1Cache_Controller.M_W.Ifetch 2125 0.00% 0.00% +system.ruby.L1Cache_Controller.M_W.Ifetch 2126 0.00% 0.00% system.ruby.L1Cache_Controller.M_W.Store 25 0.00% 0.00% system.ruby.L1Cache_Controller.M_W.L1_Replacement 6 0.00% 0.00% system.ruby.L1Cache_Controller.M_W.Use_TimeoutNoStarvers 982 0.00% 0.00% |