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authorNilay Vaish <nilay@cs.wisc.edu>2015-11-16 05:08:57 -0600
committerNilay Vaish <nilay@cs.wisc.edu>2015-11-16 05:08:57 -0600
commitde489e1997ee6c37aaf6e876e32622f6c648fe95 (patch)
tree40d4093453491b007167c971ebbb18c8ae0b77fa /tests/quick/se/00.hello/ref/alpha/linux/simple-timing
parent08cec03f8ec3bc427700343a7bd7d216433f93fc (diff)
downloadgem5-de489e1997ee6c37aaf6e876e32622f6c648fe95.tar.xz
stats: updates due to recent chagnesets
Diffstat (limited to 'tests/quick/se/00.hello/ref/alpha/linux/simple-timing')
-rw-r--r--tests/quick/se/00.hello/ref/alpha/linux/simple-timing/config.ini17
-rwxr-xr-xtests/quick/se/00.hello/ref/alpha/linux/simple-timing/simout13
-rw-r--r--tests/quick/se/00.hello/ref/alpha/linux/simple-timing/stats.txt10
3 files changed, 29 insertions, 11 deletions
diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/config.ini
index e8e73054d..62573b17c 100644
--- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/config.ini
+++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/config.ini
@@ -24,6 +24,7 @@ mem_mode=timing
mem_ranges=
memories=system.physmem
mmap_using_noreserve=false
+multi_thread=false
num_work_ids=16
readfile=
symbolfile=
@@ -83,6 +84,7 @@ children=tags
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
@@ -99,6 +101,7 @@ system=system
tags=system.cpu.dcache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.dcache_port
mem_side=system.cpu.toL2Bus.slave[1]
@@ -123,6 +126,7 @@ children=tags
addr_ranges=0:18446744073709551615
assoc=2
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
@@ -139,6 +143,7 @@ system=system
tags=system.cpu.icache.tags
tgts_per_mshr=20
write_buffers=8
+writeback_clean=true
cpu_side=system.cpu.icache_port
mem_side=system.cpu.toL2Bus.slave[0]
@@ -172,6 +177,7 @@ children=tags
addr_ranges=0:18446744073709551615
assoc=8
clk_domain=system.cpu_clk_domain
+clusivity=mostly_incl
demand_mshr_reserve=1
eventq_index=0
forward_snoops=true
@@ -188,6 +194,7 @@ system=system
tags=system.cpu.l2cache.tags
tgts_per_mshr=12
write_buffers=8
+writeback_clean=false
cpu_side=system.cpu.toL2Bus.master[0]
mem_side=system.membus.slave[1]
@@ -203,12 +210,13 @@ size=2097152
[system.cpu.toL2Bus]
type=CoherentXBar
+children=snoop_filter
clk_domain=system.cpu_clk_domain
eventq_index=0
forward_latency=0
frontend_latency=1
response_latency=1
-snoop_filter=Null
+snoop_filter=system.cpu.toL2Bus.snoop_filter
snoop_response_latency=1
system=system
use_default_range=false
@@ -216,6 +224,13 @@ width=32
master=system.cpu.l2cache.cpu_side
slave=system.cpu.icache.mem_side system.cpu.dcache.mem_side
+[system.cpu.toL2Bus.snoop_filter]
+type=SnoopFilter
+eventq_index=0
+lookup_latency=0
+max_capacity=8388608
+system=system
+
[system.cpu.tracer]
type=ExeTracer
eventq_index=0
diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/simout b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/simout
index 03ecf7225..f0f9af956 100755
--- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/simout
+++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/simout
@@ -1,12 +1,15 @@
+Redirecting stdout to build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing/simout
+Redirecting stderr to build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jan 22 2014 16:27:55
-gem5 started Jan 22 2014 17:24:16
-gem5 executing on u200540-lin
-command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing -re tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing
+gem5 compiled Nov 15 2015 14:28:00
+gem5 started Nov 15 2015 14:29:46
+gem5 executing on ribera.cs.wisc.edu, pid 29113
+command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing -re /scratch/nilay/GEM5/gem5/tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing
+
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
Hello world!
-Exiting @ tick 32544000 because target called exit()
+Exiting @ tick 35667500 because target called exit()
diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/stats.txt
index d82a69683..a6f593b8c 100644
--- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/stats.txt
+++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000036 # Nu
sim_ticks 35667500 # Number of ticks simulated
final_tick 35667500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 607241 # Simulator instruction rate (inst/s)
-host_op_rate 606492 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 3381446720 # Simulator tick rate (ticks/s)
-host_mem_usage 294520 # Number of bytes of host memory used
-host_seconds 0.01 # Real time elapsed on the host
+host_inst_rate 123464 # Simulator instruction rate (inst/s)
+host_op_rate 123421 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 688686311 # Simulator tick rate (ticks/s)
+host_mem_usage 290180 # Number of bytes of host memory used
+host_seconds 0.05 # Real time elapsed on the host
sim_insts 6390 # Number of instructions simulated
sim_ops 6390 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts