summaryrefslogtreecommitdiff
path: root/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt
diff options
context:
space:
mode:
authorAndreas Hansson <andreas.hansson@arm.com>2015-11-06 03:26:50 -0500
committerAndreas Hansson <andreas.hansson@arm.com>2015-11-06 03:26:50 -0500
commit324bc9771d1f3129aee87ccb73bcf23ea4c3b60e (patch)
treee5ca02cc181b18d2806e30b99da07d6072724988 /tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt
parent337774e192cb9268244d05e828b395060ba1cefb (diff)
downloadgem5-324bc9771d1f3129aee87ccb73bcf23ea4c3b60e.tar.xz
stats: Update stats to match cache changes
Diffstat (limited to 'tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt')
-rw-r--r--tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt8
1 files changed, 4 insertions, 4 deletions
diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt
index c4983f8bd..bedd68076 100644
--- a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt
@@ -4,10 +4,10 @@ sim_seconds 0.000012 # Nu
sim_ticks 12363500 # Number of ticks simulated
final_tick 12363500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 79745 # Simulator instruction rate (inst/s)
-host_op_rate 79707 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 412680664 # Simulator tick rate (ticks/s)
-host_mem_usage 295680 # Number of bytes of host memory used
+host_inst_rate 83593 # Simulator instruction rate (inst/s)
+host_op_rate 83552 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 432562452 # Simulator tick rate (ticks/s)
+host_mem_usage 295260 # Number of bytes of host memory used
host_seconds 0.03 # Real time elapsed on the host
sim_insts 2387 # Number of instructions simulated
sim_ops 2387 # Number of ops (including micro ops) simulated