stats: updates statistics for ruby regressions

3 files changed, 25 insertions, 80 deletions

diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini
index 89c677e9f..070ef34da 100644
--- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini
@@ -52,6 +52,7 @@ max_loads_any_thread=0
 numThreads=1
 profile=0
 progress_interval=0
+simpoint_start_insts=
 switched_out=false
 system=system
 tracer=system.cpu.tracer
@@ -167,9 +168,9 @@ version=0
 
 [system.ruby.l1_cntrl0]
 type=L1Cache_Controller
-children=L1DcacheMemory L1IcacheMemory prefetcher sequencer
-L1DcacheMemory=system.ruby.l1_cntrl0.L1DcacheMemory
-L1IcacheMemory=system.ruby.l1_cntrl0.L1IcacheMemory
+children=L1Dcache L1Icache prefetcher sequencer
+L1Dcache=system.ruby.l1_cntrl0.L1Dcache
+L1Icache=system.ruby.l1_cntrl0.L1Icache
 buffer_size=0
 clock=1
 cntrl_id=0
@@ -188,7 +189,7 @@ to_l2_latency=1
 transitions_per_cycle=32
 version=0
 
-[system.ruby.l1_cntrl0.L1DcacheMemory]
+[system.ruby.l1_cntrl0.L1Dcache]
 type=RubyCache
 assoc=2
 dataAccessLatency=1
@@ -202,7 +203,7 @@ start_index_bit=6
 tagAccessLatency=1
 tagArrayBanks=1
 
-[system.ruby.l1_cntrl0.L1IcacheMemory]
+[system.ruby.l1_cntrl0.L1Icache]
 type=RubyCache
 assoc=2
 dataAccessLatency=1
@@ -230,9 +231,9 @@ unit_filter=8
 type=RubySequencer
 access_phys_mem=false
 clock=1
-dcache=system.ruby.l1_cntrl0.L1DcacheMemory
+dcache=system.ruby.l1_cntrl0.L1Dcache
 deadlock_threshold=500000
-icache=system.ruby.l1_cntrl0.L1IcacheMemory
+icache=system.ruby.l1_cntrl0.L1Icache
 max_outstanding_requests=16
 ruby_system=system.ruby
 support_data_reqs=true
@@ -245,8 +246,8 @@ slave=system.cpu.icache_port system.cpu.dcache_port
 
 [system.ruby.l2_cntrl0]
 type=L2Cache_Controller
-children=L2cacheMemory
-L2cacheMemory=system.ruby.l2_cntrl0.L2cacheMemory
+children=L2cache
+L2cache=system.ruby.l2_cntrl0.L2cache
 buffer_size=0
 clock=1
 cntrl_id=1
@@ -260,7 +261,7 @@ to_l1_latency=1
 transitions_per_cycle=32
 version=0
 
-[system.ruby.l2_cntrl0.L2cacheMemory]
+[system.ruby.l2_cntrl0.L2cache]
 type=RubyCache
 assoc=2
 dataAccessLatency=1
diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats
index 90fb6decb..e4af41b60 100644
--- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats
@@ -160,29 +160,6 @@ links_utilized_percent_switch_3: 4.8648
   outgoing_messages_switch_3_link_2_Response_Data: 103 7416 [ 0 103 0 0 0 0 0 0 0 0 ] base_latency: 1
   outgoing_messages_switch_3_link_2_Response_Control: 436 3488 [ 0 436 0 0 0 0 0 0 0 0 ] base_latency: 1
 
-Cache Stats: system.ruby.l1_cntrl0.L1IcacheMemory
-  system.ruby.l1_cntrl0.L1IcacheMemory_total_misses: 300
-  system.ruby.l1_cntrl0.L1IcacheMemory_total_demand_misses: 300
-  system.ruby.l1_cntrl0.L1IcacheMemory_total_prefetches: 0
-  system.ruby.l1_cntrl0.L1IcacheMemory_total_sw_prefetches: 0
-  system.ruby.l1_cntrl0.L1IcacheMemory_total_hw_prefetches: 0
-
-  system.ruby.l1_cntrl0.L1IcacheMemory_request_type_IFETCH:   100%
-
-  system.ruby.l1_cntrl0.L1IcacheMemory_access_mode_type_Supervisor:   300    100%
-
-Cache Stats: system.ruby.l1_cntrl0.L1DcacheMemory
-  system.ruby.l1_cntrl0.L1DcacheMemory_total_misses: 272
-  system.ruby.l1_cntrl0.L1DcacheMemory_total_demand_misses: 272
-  system.ruby.l1_cntrl0.L1DcacheMemory_total_prefetches: 0
-  system.ruby.l1_cntrl0.L1DcacheMemory_total_sw_prefetches: 0
-  system.ruby.l1_cntrl0.L1DcacheMemory_total_hw_prefetches: 0
-
-  system.ruby.l1_cntrl0.L1DcacheMemory_request_type_LD:   75%
-  system.ruby.l1_cntrl0.L1DcacheMemory_request_type_ST:   25%
-
-  system.ruby.l1_cntrl0.L1DcacheMemory_access_mode_type_Supervisor:   272    100%
-
  --- L1Cache ---
  - Event Counts -
 Load [415 ] 415
@@ -355,19 +332,6 @@ PF_IS_I  Data_Exclusive [0 ] 0
 PF_IS_I  DataS_fromL1 [0 ] 0
 PF_IS_I  Data_all_Acks [0 ] 0
 
-Cache Stats: system.ruby.l2_cntrl0.L2cacheMemory
-  system.ruby.l2_cntrl0.L2cacheMemory_total_misses: 547
-  system.ruby.l2_cntrl0.L2cacheMemory_total_demand_misses: 547
-  system.ruby.l2_cntrl0.L2cacheMemory_total_prefetches: 0
-  system.ruby.l2_cntrl0.L2cacheMemory_total_sw_prefetches: 0
-  system.ruby.l2_cntrl0.L2cacheMemory_total_hw_prefetches: 0
-
-  system.ruby.l2_cntrl0.L2cacheMemory_request_type_GETS:   35.1005%
-  system.ruby.l2_cntrl0.L2cacheMemory_request_type_GET_INSTR:   53.1993%
-  system.ruby.l2_cntrl0.L2cacheMemory_request_type_GETX:   11.7002%
-
-  system.ruby.l2_cntrl0.L2cacheMemory_access_mode_type_Supervisor:   547    100%
-
  --- L2Cache ---
  - Event Counts -
 L1_GET_INSTR [300 ] 300
@@ -530,17 +494,6 @@ MT_MB  Unblock_Cancel [0 ] 0
 MT_MB  Exclusive_Unblock [272 ] 272
 MT_MB  MEM_Inv [0 ] 0
 
-M_MB  L1_GET_INSTR [0 ] 0
-M_MB  L1_GETS [0 ] 0
-M_MB  L1_GETX [0 ] 0
-M_MB  L1_UPGRADE [0 ] 0
-M_MB  L1_PUTX [0 ] 0
-M_MB  L1_PUTX_old [0 ] 0
-M_MB  L2_Replacement [0 ] 0
-M_MB  L2_Replacement_clean [0 ] 0
-M_MB  Exclusive_Unblock [0 ] 0
-M_MB  MEM_Inv [0 ] 0
-
 MT_IIB  L1_GET_INSTR [0 ] 0
 MT_IIB  L1_GETS [0 ] 0
 MT_IIB  L1_GETX [0 ] 0
diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt
index c105d5894..e400893c2 100644
--- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt
@@ -4,31 +4,22 @@ sim_seconds                                  0.000053                       # Nu
 sim_ticks                                       52575                       # Number of ticks simulated
 final_tick                                      52575                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                   1000000000                       # Frequency of simulated ticks
-host_inst_rate                                  13619                       # Simulator instruction rate (inst/s)
-host_op_rate                                    13618                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                                 277801                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 149308                       # Number of bytes of host memory used
-host_seconds                                     0.19                       # Real time elapsed on the host
+host_inst_rate                                  12497                       # Simulator instruction rate (inst/s)
+host_op_rate                                    12496                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                                 254920                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 152164                       # Number of bytes of host memory used
+host_seconds                                     0.21                       # Real time elapsed on the host
 sim_insts                                        2577                       # Number of instructions simulated
 sim_ops                                          2577                       # Number of ops (including micro ops) simulated
-system.ruby.l2_cntrl0.L2cacheMemory.num_data_array_reads            0                       # number of data array reads
-system.ruby.l2_cntrl0.L2cacheMemory.num_data_array_writes            0                       # number of data array writes
-system.ruby.l2_cntrl0.L2cacheMemory.num_tag_array_reads            0                       # number of tag array reads
-system.ruby.l2_cntrl0.L2cacheMemory.num_tag_array_writes            0                       # number of tag array writes
-system.ruby.l2_cntrl0.L2cacheMemory.num_tag_array_stalls            0                       # number of stalls caused by tag array
-system.ruby.l2_cntrl0.L2cacheMemory.num_data_array_stalls            0                       # number of stalls caused by data array
-system.ruby.l1_cntrl0.L1DcacheMemory.num_data_array_reads            0                       # number of data array reads
-system.ruby.l1_cntrl0.L1DcacheMemory.num_data_array_writes            0                       # number of data array writes
-system.ruby.l1_cntrl0.L1DcacheMemory.num_tag_array_reads            0                       # number of tag array reads
-system.ruby.l1_cntrl0.L1DcacheMemory.num_tag_array_writes            0                       # number of tag array writes
-system.ruby.l1_cntrl0.L1DcacheMemory.num_tag_array_stalls            0                       # number of stalls caused by tag array
-system.ruby.l1_cntrl0.L1DcacheMemory.num_data_array_stalls            0                       # number of stalls caused by data array
-system.ruby.l1_cntrl0.L1IcacheMemory.num_data_array_reads            0                       # number of data array reads
-system.ruby.l1_cntrl0.L1IcacheMemory.num_data_array_writes            0                       # number of data array writes
-system.ruby.l1_cntrl0.L1IcacheMemory.num_tag_array_reads            0                       # number of tag array reads
-system.ruby.l1_cntrl0.L1IcacheMemory.num_tag_array_writes            0                       # number of tag array writes
-system.ruby.l1_cntrl0.L1IcacheMemory.num_tag_array_stalls            0                       # number of stalls caused by tag array
-system.ruby.l1_cntrl0.L1IcacheMemory.num_data_array_stalls            0                       # number of stalls caused by data array
+system.ruby.l2_cntrl0.L2cache.demand_hits           25                       # Number of cache demand hits
+system.ruby.l2_cntrl0.L2cache.demand_misses          547                       # Number of cache demand misses
+system.ruby.l2_cntrl0.L2cache.demand_accesses          572                       # Number of cache demand accesses
+system.ruby.l1_cntrl0.L1Dcache.demand_hits          437                       # Number of cache demand hits
+system.ruby.l1_cntrl0.L1Dcache.demand_misses          272                       # Number of cache demand misses
+system.ruby.l1_cntrl0.L1Dcache.demand_accesses          709                       # Number of cache demand accesses
+system.ruby.l1_cntrl0.L1Icache.demand_hits         2285                       # Number of cache demand hits
+system.ruby.l1_cntrl0.L1Icache.demand_misses          300                       # Number of cache demand misses
+system.ruby.l1_cntrl0.L1Icache.demand_accesses         2585                       # Number of cache demand accesses
 system.ruby.l1_cntrl0.prefetcher.miss_observed            0                       # number of misses observed
 system.ruby.l1_cntrl0.prefetcher.allocated_streams            0                       # number of streams allocated for prefetching
 system.ruby.l1_cntrl0.prefetcher.prefetches_requested            0                       # number of prefetch requests made