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author | Nilay Vaish <nilay@cs.wisc.edu> | 2014-01-04 00:03:33 -0600 |
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committer | Nilay Vaish <nilay@cs.wisc.edu> | 2014-01-04 00:03:33 -0600 |
commit | bb6d7d402b5cc610ed879e9e7ecb251e353149e6 (patch) | |
tree | 2724cd730d3867978ddefe2b1cdead47fefa6bc0 /tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/ruby.stats | |
parent | 9ec59e8b691d0f2e49f0a8ea6e1284b1d9e4e669 (diff) | |
download | gem5-bb6d7d402b5cc610ed879e9e7ecb251e353149e6.tar.xz |
ruby: rename MESI_CMP_directory to MESI_Two_Level
This is because the next patch introduces a three level hierarchy.
--HG--
rename : build_opts/ALPHA_MESI_CMP_directory => build_opts/ALPHA_MESI_Two_Level
rename : build_opts/X86_MESI_CMP_directory => build_opts/X86_MESI_Two_Level
rename : configs/ruby/MESI_CMP_directory.py => configs/ruby/MESI_Two_Level.py
rename : src/mem/protocol/MESI_CMP_directory-L1cache.sm => src/mem/protocol/MESI_Two_Level-L1cache.sm
rename : src/mem/protocol/MESI_CMP_directory-L2cache.sm => src/mem/protocol/MESI_Two_Level-L2cache.sm
rename : src/mem/protocol/MESI_CMP_directory-dir.sm => src/mem/protocol/MESI_Two_Level-dir.sm
rename : src/mem/protocol/MESI_CMP_directory-dma.sm => src/mem/protocol/MESI_Two_Level-dma.sm
rename : src/mem/protocol/MESI_CMP_directory-msg.sm => src/mem/protocol/MESI_Two_Level-msg.sm
rename : src/mem/protocol/MESI_CMP_directory.slicc => src/mem/protocol/MESI_Two_Level.slicc
rename : tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/config.ini => tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/config.ini
rename : tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/ruby.stats => tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/ruby.stats
rename : tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/simerr => tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/simerr
rename : tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/simout => tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/simout
rename : tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/stats.txt => tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/stats.txt
rename : tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_CMP_directory/system.pc.com_1.terminal => tests/long/fs/10.linux-boot/ref/x86/linux/pc-simple-timing-ruby-MESI_Two_Level/system.pc.com_1.terminal
rename : tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/config.ini => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_Two_Level/config.ini
rename : tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/ruby.stats => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_Two_Level/ruby.stats
rename : tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simerr => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_Two_Level/simerr
rename : tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simout => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_Two_Level/simout
rename : tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/stats.txt => tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_Two_Level/stats.txt
rename : tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/config.ini
rename : tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/ruby.stats
rename : tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simerr => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/simerr
rename : tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simout => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/simout
rename : tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt => tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/stats.txt
rename : tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/config.ini => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_Two_Level/config.ini
rename : tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/ruby.stats => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_Two_Level/ruby.stats
rename : tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simerr => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_Two_Level/simerr
rename : tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/simout => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_Two_Level/simout
rename : tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_CMP_directory/stats.txt => tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MESI_Two_Level/stats.txt
rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/config.ini => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_Two_Level/config.ini
rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/ruby.stats => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_Two_Level/ruby.stats
rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simerr => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_Two_Level/simerr
rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/simout => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_Two_Level/simout
rename : tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_CMP_directory/stats.txt => tests/quick/se/60.rubytest/ref/alpha/linux/rubytest-ruby-MESI_Two_Level/stats.txt
Diffstat (limited to 'tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/ruby.stats')
-rw-r--r-- | tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/ruby.stats | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/ruby.stats b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/ruby.stats new file mode 100644 index 000000000..9bc24577c --- /dev/null +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/ruby.stats @@ -0,0 +1,50 @@ + +Profiler Stats +-------------- +Ruby_current_time: 52548 +Ruby_start_time: 0 +Ruby_cycles: 52548 + +Busy Controller Counts: +L1Cache-0:0 +L2Cache-0:0 +Directory-0:0 + + +Busy Bank Count:0 + +sequencer_requests_outstanding: [binsize: 1 max: 1 count: 3295 average: 1 | standard deviation: 0 | 0 3295 ] + +All Non-Zero Cycle Demand Cache Accesses +---------------------------------------- +latency: [binsize: 8 max: 116 count: 3294 average: 14.9526 | standard deviation: 26.5342 | 2722 0 25 0 0 0 0 0 0 520 21 3 0 2 1 ] +latency: LD: [binsize: 8 max: 116 count: 415 average: 36.6627 | standard deviation: 35.6119 | 211 0 12 0 0 0 0 0 0 181 8 1 0 1 1 ] +latency: ST: [binsize: 8 max: 106 count: 294 average: 18.9456 | standard deviation: 29.8676 | 226 0 4 0 0 0 0 0 0 59 4 0 0 1 ] +latency: IFETCH: [binsize: 8 max: 89 count: 2585 average: 11.0132 | standard deviation: 22.3578 | 2285 0 9 0 0 0 0 0 0 280 9 2 ] +hit latency: [binsize: 1 max: 3 count: 2722 average: 3 | standard deviation: 0 | 0 0 0 2722 ] +hit latency: LD: [binsize: 1 max: 3 count: 211 average: 3 | standard deviation: 0 | 0 0 0 211 ] +hit latency: ST: [binsize: 1 max: 3 count: 226 average: 3 | standard deviation: 0 | 0 0 0 226 ] +hit latency: IFETCH: [binsize: 1 max: 3 count: 2285 average: 3 | standard deviation: 0 | 0 0 0 2285 ] +miss latency: [binsize: 8 max: 116 count: 572 average: 71.8322 | standard deviation: 11.764 | 0 0 25 0 0 0 0 0 0 520 21 3 0 2 1 ] +miss latency: LD: [binsize: 8 max: 116 count: 204 average: 71.4804 | standard deviation: 13.7953 | 0 0 12 0 0 0 0 0 0 181 8 1 0 1 1 ] +miss latency: ST: [binsize: 8 max: 106 count: 68 average: 71.9412 | standard deviation: 13.8941 | 0 0 4 0 0 0 0 0 0 59 4 0 0 1 ] +miss latency: IFETCH: [binsize: 8 max: 89 count: 300 average: 72.0467 | standard deviation: 9.57561 | 0 0 9 0 0 0 0 0 0 280 9 2 ] + +Request vs. RubySystem State Profile +-------------------------------- + + + +Message Delayed Cycles +---------------------- +Total_delay_cycles: [binsize: 1 max: 4 count: 3612 average: 0.0498339 | standard deviation: 0.444044 | 3567 0 0 0 45 ] + virtual_network_0_delay_cycles: [binsize: 1 max: 4 count: 968 average: 0.18595 | standard deviation: 0.842879 | 923 0 0 0 45 ] + virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 2213 average: 0 | standard deviation: 0 | 2213 ] + virtual_network_2_delay_cycles: [binsize: 1 max: 0 count: 431 average: 0 | standard deviation: 0 | 431 ] + virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] + virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] + virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] + virtual_network_6_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] + virtual_network_7_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] + virtual_network_8_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] + virtual_network_9_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ] |