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authorAndreas Hansson <andreas.hansson@arm.com>2016-10-19 06:20:04 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2016-10-19 06:20:04 -0400
commit607c2772915628c2c67c1c5bfdefaa33ae66a06e (patch)
treef8f23fd4012f9a0053d65ac91792a7dc61d6baff /tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level
parent71c982ff708cc3adc7c0eccf536fea34c20cc5f0 (diff)
downloadgem5-607c2772915628c2c67c1c5bfdefaa33ae66a06e.tar.xz
stats: Update stats to reflect recent changes to floats
Mostly just splitting out the floats ops and corresponding reads/writes.
Diffstat (limited to 'tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level')
-rw-r--r--tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/stats.txt16
1 files changed, 10 insertions, 6 deletions
diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/stats.txt
index d4dee56c3..28d393468 100644
--- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/stats.txt
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000049 # Nu
sim_ticks 48659 # Number of ticks simulated
final_tick 48659 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_inst_rate 43978 # Simulator instruction rate (inst/s)
-host_op_rate 43962 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 829814 # Simulator tick rate (ticks/s)
-host_mem_usage 410700 # Number of bytes of host memory used
-host_seconds 0.06 # Real time elapsed on the host
+host_inst_rate 67712 # Simulator instruction rate (inst/s)
+host_op_rate 67695 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1277923 # Simulator tick rate (ticks/s)
+host_mem_usage 411644 # Number of bytes of host memory used
+host_seconds 0.04 # Real time elapsed on the host
sim_insts 2577 # Number of instructions simulated
sim_ops 2577 # Number of ops (including micro ops) simulated
system.voltage_domain.voltage 1 # Voltage in Volts
@@ -338,7 +338,9 @@ system.cpu.op_class::FloatAdd 0 0.00% 72.26% # Cl
system.cpu.op_class::FloatCmp 0 0.00% 72.26% # Class of executed instruction
system.cpu.op_class::FloatCvt 0 0.00% 72.26% # Class of executed instruction
system.cpu.op_class::FloatMult 0 0.00% 72.26% # Class of executed instruction
+system.cpu.op_class::FloatMultAcc 0 0.00% 72.26% # Class of executed instruction
system.cpu.op_class::FloatDiv 0 0.00% 72.26% # Class of executed instruction
+system.cpu.op_class::FloatMisc 0 0.00% 72.26% # Class of executed instruction
system.cpu.op_class::FloatSqrt 0 0.00% 72.26% # Class of executed instruction
system.cpu.op_class::SimdAdd 0 0.00% 72.26% # Class of executed instruction
system.cpu.op_class::SimdAddAcc 0 0.00% 72.26% # Class of executed instruction
@@ -361,7 +363,9 @@ system.cpu.op_class::SimdFloatMult 0 0.00% 72.26% # Cl
system.cpu.op_class::SimdFloatMultAcc 0 0.00% 72.26% # Class of executed instruction
system.cpu.op_class::SimdFloatSqrt 0 0.00% 72.26% # Class of executed instruction
system.cpu.op_class::MemRead 419 16.21% 88.47% # Class of executed instruction
-system.cpu.op_class::MemWrite 298 11.53% 100.00% # Class of executed instruction
+system.cpu.op_class::MemWrite 292 11.30% 99.77% # Class of executed instruction
+system.cpu.op_class::FloatMemRead 0 0.00% 99.77% # Class of executed instruction
+system.cpu.op_class::FloatMemWrite 6 0.23% 100.00% # Class of executed instruction
system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction
system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction
system.cpu.op_class::total 2585 # Class of executed instruction