summaryrefslogtreecommitdiff
path: root/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token
diff options
context:
space:
mode:
authorAli Saidi <saidi@eecs.umich.edu>2012-07-27 16:08:05 -0400
committerAli Saidi <saidi@eecs.umich.edu>2012-07-27 16:08:05 -0400
commitb1a58933e07d7af0eb5f43942f8ad9bc93f28039 (patch)
tree21f36b849ba0aed06ec18ed45aef46feeacd7532 /tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token
parent630068be6f7b6dc5c612867c764c37e41fd90a4a (diff)
downloadgem5-b1a58933e07d7af0eb5f43942f8ad9bc93f28039.tar.xz
stats: update stats for icache change not allowing dirty data
Diffstat (limited to 'tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token')
-rw-r--r--tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/config.ini75
-rwxr-xr-xtests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simout6
-rw-r--r--tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt28
3 files changed, 36 insertions, 73 deletions
diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/config.ini
index 2b2f5fcb6..ea15696c3 100644
--- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/config.ini
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/config.ini
@@ -78,7 +78,7 @@ egid=100
env=
errout=cerr
euid=100
-executable=/proj/aatl_perfmod_arch/m5_system_files/regression/test-progs/hello/bin/alpha/tru64/hello
+executable=/dist/m5/regression/test-progs/hello/bin/alpha/tru64/hello
gid=100
input=cin
max_stack_size=67108864
@@ -161,30 +161,20 @@ version=0
[system.l1_cntrl0.L1DcacheMemory]
type=RubyCache
assoc=2
-dataAccessLatency=1
-dataArrayBanks=1
is_icache=false
latency=2
replacement_policy=PSEUDO_LRU
-resourceStalls=false
size=256
start_index_bit=6
-tagAccessLatency=1
-tagArrayBanks=1
[system.l1_cntrl0.L1IcacheMemory]
type=RubyCache
assoc=2
-dataAccessLatency=1
-dataArrayBanks=1
is_icache=false
latency=2
replacement_policy=PSEUDO_LRU
-resourceStalls=false
size=256
start_index_bit=6
-tagAccessLatency=1
-tagArrayBanks=1
[system.l1_cntrl0.sequencer]
type=RubySequencer
@@ -221,16 +211,11 @@ version=0
[system.l2_cntrl0.L2cacheMemory]
type=RubyCache
assoc=2
-dataAccessLatency=1
-dataArrayBanks=1
is_icache=false
latency=10
replacement_policy=PSEUDO_LRU
-resourceStalls=false
size=512
start_index_bit=6
-tagAccessLatency=1
-tagArrayBanks=1
[system.physmem]
type=SimpleMemory
@@ -267,76 +252,56 @@ topology=system.ruby.network.topology
[system.ruby.network.topology]
type=Topology
-children=ext_links0 ext_links1 ext_links2 int_links0 int_links1 int_links2
+children=ext_links0 ext_links1 ext_links2 int_links0 int_links1 int_links2 routers0 routers1 routers2 routers3
description=Crossbar
ext_links=system.ruby.network.topology.ext_links0 system.ruby.network.topology.ext_links1 system.ruby.network.topology.ext_links2
int_links=system.ruby.network.topology.int_links0 system.ruby.network.topology.int_links1 system.ruby.network.topology.int_links2
print_config=false
-routers=system.ruby.network.topology.ext_links0.int_node system.ruby.network.topology.ext_links1.int_node system.ruby.network.topology.ext_links2.int_node system.ruby.network.topology.int_links0.node_b
+routers=system.ruby.network.topology.routers0 system.ruby.network.topology.routers1 system.ruby.network.topology.routers2 system.ruby.network.topology.routers3
[system.ruby.network.topology.ext_links0]
type=SimpleExtLink
-children=int_node
bandwidth_factor=16
ext_node=system.l1_cntrl0
-int_node=system.ruby.network.topology.ext_links0.int_node
+int_node=system.ruby.network.topology.routers0
latency=1
link_id=0
weight=1
-[system.ruby.network.topology.ext_links0.int_node]
-type=BasicRouter
-router_id=0
-
[system.ruby.network.topology.ext_links1]
type=SimpleExtLink
-children=int_node
bandwidth_factor=16
ext_node=system.l2_cntrl0
-int_node=system.ruby.network.topology.ext_links1.int_node
+int_node=system.ruby.network.topology.routers1
latency=1
link_id=1
weight=1
-[system.ruby.network.topology.ext_links1.int_node]
-type=BasicRouter
-router_id=1
-
[system.ruby.network.topology.ext_links2]
type=SimpleExtLink
-children=int_node
bandwidth_factor=16
ext_node=system.dir_cntrl0
-int_node=system.ruby.network.topology.ext_links2.int_node
+int_node=system.ruby.network.topology.routers2
latency=1
link_id=2
weight=1
-[system.ruby.network.topology.ext_links2.int_node]
-type=BasicRouter
-router_id=2
-
[system.ruby.network.topology.int_links0]
type=SimpleIntLink
-children=node_b
bandwidth_factor=16
latency=1
link_id=3
-node_a=system.ruby.network.topology.ext_links0.int_node
-node_b=system.ruby.network.topology.int_links0.node_b
+node_a=system.ruby.network.topology.routers0
+node_b=system.ruby.network.topology.routers3
weight=1
-[system.ruby.network.topology.int_links0.node_b]
-type=BasicRouter
-router_id=3
-
[system.ruby.network.topology.int_links1]
type=SimpleIntLink
bandwidth_factor=16
latency=1
link_id=4
-node_a=system.ruby.network.topology.ext_links1.int_node
-node_b=system.ruby.network.topology.int_links0.node_b
+node_a=system.ruby.network.topology.routers1
+node_b=system.ruby.network.topology.routers3
weight=1
[system.ruby.network.topology.int_links2]
@@ -344,10 +309,26 @@ type=SimpleIntLink
bandwidth_factor=16
latency=1
link_id=5
-node_a=system.ruby.network.topology.ext_links2.int_node
-node_b=system.ruby.network.topology.int_links0.node_b
+node_a=system.ruby.network.topology.routers2
+node_b=system.ruby.network.topology.routers3
weight=1
+[system.ruby.network.topology.routers0]
+type=BasicRouter
+router_id=0
+
+[system.ruby.network.topology.routers1]
+type=BasicRouter
+router_id=1
+
+[system.ruby.network.topology.routers2]
+type=BasicRouter
+router_id=2
+
+[system.ruby.network.topology.routers3]
+type=BasicRouter
+router_id=3
+
[system.ruby.profiler]
type=RubyProfiler
all_instructions=false
diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simout b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simout
index 851a68508..3e1c7a0df 100755
--- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simout
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simout
@@ -1,9 +1,9 @@
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Jul 10 2012 15:34:13
-gem5 started Jul 10 2012 17:45:47
-gem5 executing on sc2b0605
+gem5 compiled Jun 4 2012 11:56:32
+gem5 started Jun 4 2012 14:42:22
+gem5 executing on zizzer
command line: build/ALPHA_MOESI_CMP_token/gem5.opt -d build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_token -re tests/run.py build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_token
Global frequency set at 1000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt
index 0bb4f7ab2..0b4d202c9 100644
--- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000088 # Nu
sim_ticks 87899 # Number of ticks simulated
final_tick 87899 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000 # Frequency of simulated ticks
-host_inst_rate 36684 # Simulator instruction rate (inst/s)
-host_op_rate 36675 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 1250644 # Simulator tick rate (ticks/s)
-host_mem_usage 233044 # Number of bytes of host memory used
-host_seconds 0.07 # Real time elapsed on the host
+host_inst_rate 49141 # Simulator instruction rate (inst/s)
+host_op_rate 49125 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 1675041 # Simulator tick rate (ticks/s)
+host_mem_usage 223232 # Number of bytes of host memory used
+host_seconds 0.05 # Real time elapsed on the host
sim_insts 2577 # Number of instructions simulated
sim_ops 2577 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 10340 # Number of bytes read from this memory
@@ -33,24 +33,6 @@ system.physmem.bw_write::total 23413236 # Wr
system.physmem.bw_total::cpu.inst 117635013 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::cpu.data 57725344 # Total bandwidth to/from this memory (bytes/s)
system.physmem.bw_total::total 175360357 # Total bandwidth to/from this memory (bytes/s)
-system.l1_cntrl0.L1DcacheMemory.num_data_array_reads 0 # number of data array reads
-system.l1_cntrl0.L1DcacheMemory.num_data_array_writes 0 # number of data array writes
-system.l1_cntrl0.L1DcacheMemory.num_tag_array_reads 0 # number of tag array reads
-system.l1_cntrl0.L1DcacheMemory.num_tag_array_writes 0 # number of tag array writes
-system.l1_cntrl0.L1DcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
-system.l1_cntrl0.L1DcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
-system.l1_cntrl0.L1IcacheMemory.num_data_array_reads 0 # number of data array reads
-system.l1_cntrl0.L1IcacheMemory.num_data_array_writes 0 # number of data array writes
-system.l1_cntrl0.L1IcacheMemory.num_tag_array_reads 0 # number of tag array reads
-system.l1_cntrl0.L1IcacheMemory.num_tag_array_writes 0 # number of tag array writes
-system.l1_cntrl0.L1IcacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
-system.l1_cntrl0.L1IcacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
-system.l2_cntrl0.L2cacheMemory.num_data_array_reads 0 # number of data array reads
-system.l2_cntrl0.L2cacheMemory.num_data_array_writes 0 # number of data array writes
-system.l2_cntrl0.L2cacheMemory.num_tag_array_reads 0 # number of tag array reads
-system.l2_cntrl0.L2cacheMemory.num_tag_array_writes 0 # number of tag array writes
-system.l2_cntrl0.L2cacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
-system.l2_cntrl0.L2cacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
system.cpu.dtb.fetch_hits 0 # ITB hits
system.cpu.dtb.fetch_misses 0 # ITB misses
system.cpu.dtb.fetch_acv 0 # ITB acv