stats: update stats for icache change not allowing dirty data

3 files changed, 29 insertions, 76 deletions

diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/config.ini
index d24ccea68..5531e80ff 100644
--- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/config.ini
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/config.ini
@@ -78,7 +78,7 @@ egid=100
 env=
 errout=cerr
 euid=100
-executable=/proj/aatl_perfmod_arch/m5_system_files/regression/test-progs/hello/bin/alpha/tru64/hello
+executable=/dist/m5/regression/test-progs/hello/bin/alpha/tru64/hello
 gid=100
 input=cin
 max_stack_size=67108864
@@ -138,16 +138,11 @@ version=0
 [system.dir_cntrl0.probeFilter]
 type=RubyCache
 assoc=4
-dataAccessLatency=1
-dataArrayBanks=1
 is_icache=false
 latency=1
 replacement_policy=PSEUDO_LRU
-resourceStalls=false
 size=1024
 start_index_bit=6
-tagAccessLatency=1
-tagArrayBanks=1
 
 [system.l1_cntrl0]
 type=L1Cache_Controller
@@ -172,44 +167,29 @@ version=0
 [system.l1_cntrl0.L1DcacheMemory]
 type=RubyCache
 assoc=2
-dataAccessLatency=1
-dataArrayBanks=1
 is_icache=false
 latency=2
 replacement_policy=PSEUDO_LRU
-resourceStalls=false
 size=256
 start_index_bit=6
-tagAccessLatency=1
-tagArrayBanks=1
 
 [system.l1_cntrl0.L1IcacheMemory]
 type=RubyCache
 assoc=2
-dataAccessLatency=1
-dataArrayBanks=1
 is_icache=true
 latency=2
 replacement_policy=PSEUDO_LRU
-resourceStalls=false
 size=256
 start_index_bit=6
-tagAccessLatency=1
-tagArrayBanks=1
 
 [system.l1_cntrl0.L2cacheMemory]
 type=RubyCache
 assoc=2
-dataAccessLatency=1
-dataArrayBanks=1
 is_icache=false
 latency=10
 replacement_policy=PSEUDO_LRU
-resourceStalls=false
 size=512
 start_index_bit=6
-tagAccessLatency=1
-tagArrayBanks=1
 
 [system.l1_cntrl0.sequencer]
 type=RubySequencer
@@ -262,64 +242,61 @@ topology=system.ruby.network.topology
 
 [system.ruby.network.topology]
 type=Topology
-children=ext_links0 ext_links1 int_links0 int_links1
+children=ext_links0 ext_links1 int_links0 int_links1 routers0 routers1 routers2
 description=Crossbar
 ext_links=system.ruby.network.topology.ext_links0 system.ruby.network.topology.ext_links1
 int_links=system.ruby.network.topology.int_links0 system.ruby.network.topology.int_links1
 print_config=false
-routers=system.ruby.network.topology.ext_links0.int_node system.ruby.network.topology.ext_links1.int_node system.ruby.network.topology.int_links0.node_b
+routers=system.ruby.network.topology.routers0 system.ruby.network.topology.routers1 system.ruby.network.topology.routers2
 
 [system.ruby.network.topology.ext_links0]
 type=SimpleExtLink
-children=int_node
 bandwidth_factor=16
 ext_node=system.l1_cntrl0
-int_node=system.ruby.network.topology.ext_links0.int_node
+int_node=system.ruby.network.topology.routers0
 latency=1
 link_id=0
 weight=1
 
-[system.ruby.network.topology.ext_links0.int_node]
-type=BasicRouter
-router_id=0
-
 [system.ruby.network.topology.ext_links1]
 type=SimpleExtLink
-children=int_node
 bandwidth_factor=16
 ext_node=system.dir_cntrl0
-int_node=system.ruby.network.topology.ext_links1.int_node
+int_node=system.ruby.network.topology.routers1
 latency=1
 link_id=1
 weight=1
 
-[system.ruby.network.topology.ext_links1.int_node]
-type=BasicRouter
-router_id=1
-
 [system.ruby.network.topology.int_links0]
 type=SimpleIntLink
-children=node_b
 bandwidth_factor=16
 latency=1
 link_id=2
-node_a=system.ruby.network.topology.ext_links0.int_node
-node_b=system.ruby.network.topology.int_links0.node_b
+node_a=system.ruby.network.topology.routers0
+node_b=system.ruby.network.topology.routers2
 weight=1
 
-[system.ruby.network.topology.int_links0.node_b]
-type=BasicRouter
-router_id=2
-
 [system.ruby.network.topology.int_links1]
 type=SimpleIntLink
 bandwidth_factor=16
 latency=1
 link_id=3
-node_a=system.ruby.network.topology.ext_links1.int_node
-node_b=system.ruby.network.topology.int_links0.node_b
+node_a=system.ruby.network.topology.routers1
+node_b=system.ruby.network.topology.routers2
 weight=1
 
+[system.ruby.network.topology.routers0]
+type=BasicRouter
+router_id=0
+
+[system.ruby.network.topology.routers1]
+type=BasicRouter
+router_id=1
+
+[system.ruby.network.topology.routers2]
+type=BasicRouter
+router_id=2
+
 [system.ruby.profiler]
 type=RubyProfiler
 all_instructions=false
diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simout b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simout
index 2612c0b40..423daf7c7 100755
--- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simout
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simout
@@ -1,9 +1,9 @@
 gem5 Simulator System.  http://gem5.org
 gem5 is copyrighted software; use the --copyright option for details.
 
-gem5 compiled Jul 10 2012 15:16:15
-gem5 started Jul 10 2012 17:50:59
-gem5 executing on sc2b0605
+gem5 compiled Jun  4 2012 11:51:44
+gem5 started Jun  4 2012 13:42:34
+gem5 executing on zizzer
 command line: build/ALPHA_MOESI_hammer/gem5.opt -d build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_hammer -re tests/run.py build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_hammer
 Global frequency set at 1000000000 ticks per second
 info: Entering event queue @ 0.  Starting simulation...
diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt
index 17ceaae11..002b923d5 100644
--- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt
@@ -4,11 +4,11 @@ sim_seconds                                  0.000078                       # Nu
 sim_ticks                                       78448                       # Number of ticks simulated
 final_tick                                      78448                       # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
 sim_freq                                   1000000000                       # Frequency of simulated ticks
-host_inst_rate                                  40059                       # Simulator instruction rate (inst/s)
-host_op_rate                                    40048                       # Simulator op (including micro ops) rate (op/s)
-host_tick_rate                                1218818                       # Simulator tick rate (ticks/s)
-host_mem_usage                                 232472                       # Number of bytes of host memory used
-host_seconds                                     0.06                       # Real time elapsed on the host
+host_inst_rate                                   9618                       # Simulator instruction rate (inst/s)
+host_op_rate                                     9618                       # Simulator op (including micro ops) rate (op/s)
+host_tick_rate                                 292754                       # Simulator tick rate (ticks/s)
+host_mem_usage                                 222892                       # Number of bytes of host memory used
+host_seconds                                     0.27                       # Real time elapsed on the host
 sim_insts                                        2577                       # Number of instructions simulated
 sim_ops                                          2577                       # Number of ops (including micro ops) simulated
 system.physmem.bytes_read::cpu.inst             10340                       # Number of bytes read from this memory
@@ -33,30 +33,6 @@ system.physmem.bw_write::total               26233938                       # Wr
 system.physmem.bw_total::cpu.inst           131807057                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::cpu.data            64679788                       # Total bandwidth to/from this memory (bytes/s)
 system.physmem.bw_total::total              196486845                       # Total bandwidth to/from this memory (bytes/s)
-system.l1_cntrl0.L1DcacheMemory.num_data_array_reads            0                       # number of data array reads
-system.l1_cntrl0.L1DcacheMemory.num_data_array_writes            0                       # number of data array writes
-system.l1_cntrl0.L1DcacheMemory.num_tag_array_reads            0                       # number of tag array reads
-system.l1_cntrl0.L1DcacheMemory.num_tag_array_writes            0                       # number of tag array writes
-system.l1_cntrl0.L1DcacheMemory.num_tag_array_stalls            0                       # number of stalls caused by tag array
-system.l1_cntrl0.L1DcacheMemory.num_data_array_stalls            0                       # number of stalls caused by data array
-system.l1_cntrl0.L1IcacheMemory.num_data_array_reads            0                       # number of data array reads
-system.l1_cntrl0.L1IcacheMemory.num_data_array_writes            0                       # number of data array writes
-system.l1_cntrl0.L1IcacheMemory.num_tag_array_reads            0                       # number of tag array reads
-system.l1_cntrl0.L1IcacheMemory.num_tag_array_writes            0                       # number of tag array writes
-system.l1_cntrl0.L1IcacheMemory.num_tag_array_stalls            0                       # number of stalls caused by tag array
-system.l1_cntrl0.L1IcacheMemory.num_data_array_stalls            0                       # number of stalls caused by data array
-system.l1_cntrl0.L2cacheMemory.num_data_array_reads            0                       # number of data array reads
-system.l1_cntrl0.L2cacheMemory.num_data_array_writes            0                       # number of data array writes
-system.l1_cntrl0.L2cacheMemory.num_tag_array_reads            0                       # number of tag array reads
-system.l1_cntrl0.L2cacheMemory.num_tag_array_writes            0                       # number of tag array writes
-system.l1_cntrl0.L2cacheMemory.num_tag_array_stalls            0                       # number of stalls caused by tag array
-system.l1_cntrl0.L2cacheMemory.num_data_array_stalls            0                       # number of stalls caused by data array
-system.dir_cntrl0.probeFilter.num_data_array_reads            0                       # number of data array reads
-system.dir_cntrl0.probeFilter.num_data_array_writes            0                       # number of data array writes
-system.dir_cntrl0.probeFilter.num_tag_array_reads            0                       # number of tag array reads
-system.dir_cntrl0.probeFilter.num_tag_array_writes            0                       # number of tag array writes
-system.dir_cntrl0.probeFilter.num_tag_array_stalls            0                       # number of stalls caused by tag array
-system.dir_cntrl0.probeFilter.num_data_array_stalls            0                       # number of stalls caused by data array
 system.cpu.dtb.fetch_hits                           0                       # ITB hits
 system.cpu.dtb.fetch_misses                         0                       # ITB misses
 system.cpu.dtb.fetch_acv                            0                       # ITB acv