summaryrefslogtreecommitdiff
path: root/tests/quick/se/00.hello/ref/alpha/tru64
diff options
context:
space:
mode:
authorSteve Reinhardt <steve.reinhardt@amd.com>2013-10-16 10:44:12 -0400
committerSteve Reinhardt <steve.reinhardt@amd.com>2013-10-16 10:44:12 -0400
commit10e64501206b72901c266855fde2909523b875e0 (patch)
treedf5db553cf78ff00467b4ca87614a5721439b2ec /tests/quick/se/00.hello/ref/alpha/tru64
parentb10ff075b102b2a2e4abf5d22735b919a8fda1a9 (diff)
downloadgem5-10e64501206b72901c266855fde2909523b875e0.tar.xz
test: update stats
Update stats for recent changes. Mostly minor changes in register access stats due to addition of new cc register type and slightly different (and more accurate) classification of int vs. fp register accesses.
Diffstat (limited to 'tests/quick/se/00.hello/ref/alpha/tru64')
-rw-r--r--tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/config.ini1
-rwxr-xr-xtests/quick/se/00.hello/ref/alpha/tru64/o3-timing/simout6
-rw-r--r--tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt14
3 files changed, 10 insertions, 11 deletions
diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/config.ini
index c5e8a16e6..b9dbe7d51 100644
--- a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/config.ini
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/config.ini
@@ -86,6 +86,7 @@ max_loads_all_threads=0
max_loads_any_thread=0
needsTSO=false
numIQEntries=64
+numPhysCCRegs=0
numPhysFloatRegs=256
numPhysIntRegs=256
numROBEntries=192
diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/simout b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/simout
index c47a79c1f..4cf5ca9ef 100755
--- a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/simout
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/simout
@@ -1,10 +1,8 @@
-Redirecting stdout to build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/o3-timing/simout
-Redirecting stderr to build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/o3-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
-gem5 compiled Sep 24 2013 03:08:53
-gem5 started Sep 28 2013 03:05:27
+gem5 compiled Oct 15 2013 18:24:51
+gem5 started Oct 16 2013 01:34:33
gem5 executing on zizzer
command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/o3-timing -re tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/o3-timing
Global frequency set at 1000000000000 ticks per second
diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt
index 746096984..2906fdf0c 100644
--- a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt
+++ b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt
@@ -4,11 +4,11 @@ sim_seconds 0.000012 # Nu
sim_ticks 11933500 # Number of ticks simulated
final_tick 11933500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
sim_freq 1000000000000 # Frequency of simulated ticks
-host_inst_rate 64 # Simulator instruction rate (inst/s)
-host_op_rate 64 # Simulator op (including micro ops) rate (op/s)
-host_tick_rate 321705 # Simulator tick rate (ticks/s)
-host_mem_usage 226036 # Number of bytes of host memory used
-host_seconds 37.09 # Real time elapsed on the host
+host_inst_rate 3639 # Simulator instruction rate (inst/s)
+host_op_rate 3638 # Simulator op (including micro ops) rate (op/s)
+host_tick_rate 18189727 # Simulator tick rate (ticks/s)
+host_mem_usage 227880 # Number of bytes of host memory used
+host_seconds 0.66 # Real time elapsed on the host
sim_insts 2387 # Number of instructions simulated
sim_ops 2387 # Number of ops (including micro ops) simulated
system.physmem.bytes_read::cpu.inst 12032 # Number of bytes read from this memory
@@ -298,8 +298,8 @@ system.cpu.rename.IQFullEvents 14 # Nu
system.cpu.rename.LSQFullEvents 13 # Number of times rename has blocked due to LSQ full
system.cpu.rename.RenamedOperands 4285 # Number of destination operands rename has renamed
system.cpu.rename.RenameLookups 6686 # Number of register rename lookups that rename has made
-system.cpu.rename.int_rename_lookups 6674 # Number of integer rename lookups
-system.cpu.rename.fp_rename_lookups 12 # Number of floating rename lookups
+system.cpu.rename.int_rename_lookups 6679 # Number of integer rename lookups
+system.cpu.rename.fp_rename_lookups 6 # Number of floating rename lookups
system.cpu.rename.CommittedMaps 1768 # Number of HB maps that are committed
system.cpu.rename.UndoneMaps 2517 # Number of HB maps that are undone due to squashing
system.cpu.rename.serializingInsts 8 # count of serializing insts renamed