diff options
| author | Andreas Sandberg <andreas.sandberg@arm.com> | 2016-06-06 17:16:44 +0100 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2016-06-06 17:16:44 +0100 |
| commit | 85997e66a08b71d701e5b41462d1cfd42660b0c7 (patch) | |
| tree | bc242f1a2bfc3a92b18da04805d9ebd8864b5320 /tests/quick/se/00.hello/ref/alpha/tru64 | |
| parent | 21b66f45422bc449d4a8b86ab452d6b6ae5838bf (diff) | |
| download | gem5-85997e66a08b71d701e5b41462d1cfd42660b0c7.tar.xz | |
stats: Add power stats to test references
Change-Id: Ic827213134b199446822f128b81d4a480e777fee
Diffstat (limited to 'tests/quick/se/00.hello/ref/alpha/tru64')
9 files changed, 143 insertions, 40 deletions
diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/stats.txt index f75116dfd..b5156559e 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/tru64/minor-timing/stats.txt @@ -4,15 +4,16 @@ sim_seconds 0.000020 # Nu sim_ticks 20320000 # Number of ticks simulated final_tick 20320000 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 154508 # Simulator instruction rate (inst/s) -host_op_rate 154391 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1212791416 # Simulator tick rate (ticks/s) -host_mem_usage 246696 # Number of bytes of host memory used +host_inst_rate 171591 # Simulator instruction rate (inst/s) +host_op_rate 171481 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1347191282 # Simulator tick rate (ticks/s) +host_mem_usage 293200 # Number of bytes of host memory used host_seconds 0.02 # Real time elapsed on the host sim_insts 2585 # Number of instructions simulated sim_ops 2585 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts system.clk_domain.clock 1000 # Clock period in ticks +system.physmem.pwrStateResidencyTicks::UNDEFINED 20320000 # Cumulative time (in ticks) in various power states system.physmem.bytes_read::cpu.inst 14400 # Number of bytes read from this memory system.physmem.bytes_read::cpu.data 5440 # Number of bytes read from this memory system.physmem.bytes_read::total 19840 # Number of bytes read from this memory @@ -250,6 +251,7 @@ system.physmem_1.memoryStateTime::REF 520000 # Ti system.physmem_1.memoryStateTime::PRE_PDN 0 # Time in different power states system.physmem_1.memoryStateTime::ACT 14869250 # Time in different power states system.physmem_1.memoryStateTime::ACT_PDN 0 # Time in different power states +system.pwrStateResidencyTicks::UNDEFINED 20320000 # Cumulative time (in ticks) in various power states system.cpu.branchPred.lookups 794 # Number of BP lookups system.cpu.branchPred.condPredicted 395 # Number of conditional branches predicted system.cpu.branchPred.condIncorrect 170 # Number of conditional branches incorrect @@ -297,6 +299,7 @@ system.cpu.itb.data_misses 0 # DT system.cpu.itb.data_acv 0 # DTB access violations system.cpu.itb.data_accesses 0 # DTB accesses system.cpu.workload.num_syscalls 4 # Number of system calls +system.cpu.pwrStateResidencyTicks::ON 20320000 # Cumulative time (in ticks) in various power states system.cpu.numCycles 40640 # number of cpu cycles simulated system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed @@ -343,6 +346,7 @@ system.cpu.op_class_0::InstPrefetch 0 0.00% 100.00% # Cl system.cpu.op_class_0::total 2585 # Class of committed instruction system.cpu.tickCycles 5416 # Number of cycles that the object actually ticked system.cpu.idleCycles 35224 # Total number of cycles that the object has spent stopped +system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 20320000 # Cumulative time (in ticks) in various power states system.cpu.dcache.tags.replacements 0 # number of replacements system.cpu.dcache.tags.tagsinuse 48.513757 # Cycle average of tags in use system.cpu.dcache.tags.total_refs 693 # Total number of references to valid blocks. @@ -358,6 +362,7 @@ system.cpu.dcache.tags.age_task_id_blocks_1024::1 52 system.cpu.dcache.tags.occ_task_id_percent::1024 0.020752 # Percentage of cache occupancy per task id system.cpu.dcache.tags.tag_accesses 1679 # Number of tag accesses system.cpu.dcache.tags.data_accesses 1679 # Number of data accesses +system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 20320000 # Cumulative time (in ticks) in various power states system.cpu.dcache.ReadReq_hits::cpu.data 442 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 442 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 251 # number of WriteReq hits @@ -452,6 +457,7 @@ system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 76000 system.cpu.dcache.demand_avg_mshr_miss_latency::total 76000 # average overall mshr miss latency system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 76000 # average overall mshr miss latency system.cpu.dcache.overall_avg_mshr_miss_latency::total 76000 # average overall mshr miss latency +system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 20320000 # Cumulative time (in ticks) in various power states system.cpu.icache.tags.replacements 0 # number of replacements system.cpu.icache.tags.tagsinuse 119.123012 # Cycle average of tags in use system.cpu.icache.tags.total_refs 750 # Total number of references to valid blocks. @@ -467,6 +473,7 @@ system.cpu.icache.tags.age_task_id_blocks_1024::1 125 system.cpu.icache.tags.occ_task_id_percent::1024 0.109863 # Percentage of cache occupancy per task id system.cpu.icache.tags.tag_accesses 2175 # Number of tag accesses system.cpu.icache.tags.data_accesses 2175 # Number of data accesses +system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 20320000 # Cumulative time (in ticks) in various power states system.cpu.icache.ReadReq_hits::cpu.inst 750 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 750 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 750 # number of demand (read+write) hits @@ -533,6 +540,7 @@ system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 75457.777778 system.cpu.icache.demand_avg_mshr_miss_latency::total 75457.777778 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 75457.777778 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 75457.777778 # average overall mshr miss latency +system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 20320000 # Cumulative time (in ticks) in various power states system.cpu.l2cache.tags.replacements 0 # number of replacements system.cpu.l2cache.tags.tagsinuse 147.162900 # Cycle average of tags in use system.cpu.l2cache.tags.total_refs 0 # Total number of references to valid blocks. @@ -550,6 +558,7 @@ system.cpu.l2cache.tags.age_task_id_blocks_1024::1 152 system.cpu.l2cache.tags.occ_task_id_percent::1024 0.008636 # Percentage of cache occupancy per task id system.cpu.l2cache.tags.tag_accesses 2790 # Number of tag accesses system.cpu.l2cache.tags.data_accesses 2790 # Number of data accesses +system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 20320000 # Cumulative time (in ticks) in various power states system.cpu.l2cache.ReadExReq_misses::cpu.data 27 # number of ReadExReq misses system.cpu.l2cache.ReadExReq_misses::total 27 # number of ReadExReq misses system.cpu.l2cache.ReadCleanReq_misses::cpu.inst 225 # number of ReadCleanReq misses @@ -670,6 +679,7 @@ system.cpu.toL2Bus.snoop_filter.hit_multi_requests 0 system.cpu.toL2Bus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter. system.cpu.toL2Bus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data. system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. +system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 20320000 # Cumulative time (in ticks) in various power states system.cpu.toL2Bus.trans_dist::ReadResp 283 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 27 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 27 # Transaction distribution @@ -699,6 +709,7 @@ system.cpu.toL2Bus.respLayer0.occupancy 337500 # La system.cpu.toL2Bus.respLayer0.utilization 1.7 # Layer utilization (%) system.cpu.toL2Bus.respLayer1.occupancy 127500 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer1.utilization 0.6 # Layer utilization (%) +system.membus.pwrStateResidencyTicks::UNDEFINED 20320000 # Cumulative time (in ticks) in various power states system.membus.trans_dist::ReadResp 283 # Transaction distribution system.membus.trans_dist::ReadExReq 27 # Transaction distribution system.membus.trans_dist::ReadExResp 27 # Transaction distribution diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt index 92634ef37..006581ce2 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/stats.txt @@ -4,15 +4,16 @@ sim_seconds 0.000012 # Nu sim_ticks 12409500 # Number of ticks simulated final_tick 12409500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 87055 # Simulator instruction rate (inst/s) -host_op_rate 87008 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 452104980 # Simulator tick rate (ticks/s) -host_mem_usage 247976 # Number of bytes of host memory used -host_seconds 0.03 # Real time elapsed on the host +host_inst_rate 52563 # Simulator instruction rate (inst/s) +host_op_rate 52553 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 273157641 # Simulator tick rate (ticks/s) +host_mem_usage 293200 # Number of bytes of host memory used +host_seconds 0.05 # Real time elapsed on the host sim_insts 2387 # Number of instructions simulated sim_ops 2387 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts system.clk_domain.clock 1000 # Clock period in ticks +system.physmem.pwrStateResidencyTicks::UNDEFINED 12409500 # Cumulative time (in ticks) in various power states system.physmem.bytes_read::cpu.inst 11968 # Number of bytes read from this memory system.physmem.bytes_read::cpu.data 5440 # Number of bytes read from this memory system.physmem.bytes_read::total 17408 # Number of bytes read from this memory @@ -250,6 +251,7 @@ system.physmem_1.memoryStateTime::REF 260000 # Ti system.physmem_1.memoryStateTime::PRE_PDN 0 # Time in different power states system.physmem_1.memoryStateTime::ACT 7371500 # Time in different power states system.physmem_1.memoryStateTime::ACT_PDN 0 # Time in different power states +system.pwrStateResidencyTicks::UNDEFINED 12409500 # Cumulative time (in ticks) in various power states system.cpu.branchPred.lookups 1003 # Number of BP lookups system.cpu.branchPred.condPredicted 492 # Number of conditional branches predicted system.cpu.branchPred.condIncorrect 213 # Number of conditional branches incorrect @@ -297,6 +299,7 @@ system.cpu.itb.data_misses 0 # DT system.cpu.itb.data_acv 0 # DTB access violations system.cpu.itb.data_accesses 0 # DTB accesses system.cpu.workload.num_syscalls 4 # Number of system calls +system.cpu.pwrStateResidencyTicks::ON 12409500 # Cumulative time (in ticks) in various power states system.cpu.numCycles 24820 # number of cpu cycles simulated system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed @@ -586,6 +589,7 @@ system.cpu.int_regfile_writes 2640 # nu system.cpu.fp_regfile_reads 6 # number of floating regfile reads system.cpu.misc_regfile_reads 1 # number of misc regfile reads system.cpu.misc_regfile_writes 1 # number of misc regfile writes +system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 12409500 # Cumulative time (in ticks) in various power states system.cpu.dcache.tags.replacements 0 # number of replacements system.cpu.dcache.tags.tagsinuse 45.439304 # Cycle average of tags in use system.cpu.dcache.tags.total_refs 735 # Total number of references to valid blocks. @@ -601,6 +605,7 @@ system.cpu.dcache.tags.age_task_id_blocks_1024::1 22 system.cpu.dcache.tags.occ_task_id_percent::1024 0.020752 # Percentage of cache occupancy per task id system.cpu.dcache.tags.tag_accesses 1919 # Number of tag accesses system.cpu.dcache.tags.data_accesses 1919 # Number of data accesses +system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 12409500 # Cumulative time (in ticks) in various power states system.cpu.dcache.ReadReq_hits::cpu.data 522 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 522 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 213 # number of WriteReq hits @@ -695,6 +700,7 @@ system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 78211.764706 system.cpu.dcache.demand_avg_mshr_miss_latency::total 78211.764706 # average overall mshr miss latency system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 78211.764706 # average overall mshr miss latency system.cpu.dcache.overall_avg_mshr_miss_latency::total 78211.764706 # average overall mshr miss latency +system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 12409500 # Cumulative time (in ticks) in various power states system.cpu.icache.tags.replacements 0 # number of replacements system.cpu.icache.tags.tagsinuse 90.399218 # Cycle average of tags in use system.cpu.icache.tags.total_refs 625 # Total number of references to valid blocks. @@ -710,6 +716,7 @@ system.cpu.icache.tags.age_task_id_blocks_1024::1 29 system.cpu.icache.tags.occ_task_id_percent::1024 0.091309 # Percentage of cache occupancy per task id system.cpu.icache.tags.tag_accesses 1943 # Number of tag accesses system.cpu.icache.tags.data_accesses 1943 # Number of data accesses +system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 12409500 # Cumulative time (in ticks) in various power states system.cpu.icache.ReadReq_hits::cpu.inst 625 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 625 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 625 # number of demand (read+write) hits @@ -782,6 +789,7 @@ system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 75724.593583 system.cpu.icache.demand_avg_mshr_miss_latency::total 75724.593583 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 75724.593583 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 75724.593583 # average overall mshr miss latency +system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 12409500 # Cumulative time (in ticks) in various power states system.cpu.l2cache.tags.replacements 0 # number of replacements system.cpu.l2cache.tags.tagsinuse 119.261302 # Cycle average of tags in use system.cpu.l2cache.tags.total_refs 0 # Total number of references to valid blocks. @@ -799,6 +807,7 @@ system.cpu.l2cache.tags.age_task_id_blocks_1024::1 43 system.cpu.l2cache.tags.occ_task_id_percent::1024 0.007568 # Percentage of cache occupancy per task id system.cpu.l2cache.tags.tag_accesses 2448 # Number of tag accesses system.cpu.l2cache.tags.data_accesses 2448 # Number of data accesses +system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 12409500 # Cumulative time (in ticks) in various power states system.cpu.l2cache.ReadExReq_misses::cpu.data 24 # number of ReadExReq misses system.cpu.l2cache.ReadExReq_misses::total 24 # number of ReadExReq misses system.cpu.l2cache.ReadCleanReq_misses::cpu.inst 187 # number of ReadCleanReq misses @@ -919,6 +928,7 @@ system.cpu.toL2Bus.snoop_filter.hit_multi_requests 0 system.cpu.toL2Bus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter. system.cpu.toL2Bus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data. system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. +system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 12409500 # Cumulative time (in ticks) in various power states system.cpu.toL2Bus.trans_dist::ReadResp 248 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 24 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 24 # Transaction distribution @@ -948,6 +958,7 @@ system.cpu.toL2Bus.respLayer0.occupancy 280500 # La system.cpu.toL2Bus.respLayer0.utilization 2.3 # Layer utilization (%) system.cpu.toL2Bus.respLayer1.occupancy 127500 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer1.utilization 1.0 # Layer utilization (%) +system.membus.pwrStateResidencyTicks::UNDEFINED 12409500 # Cumulative time (in ticks) in various power states system.membus.trans_dist::ReadResp 248 # Transaction distribution system.membus.trans_dist::ReadExReq 24 # Transaction distribution system.membus.trans_dist::ReadExResp 24 # Transaction distribution diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/stats.txt index 8171db450..fe81a2b88 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/stats.txt @@ -4,15 +4,16 @@ sim_seconds 0.000001 # Nu sim_ticks 1297500 # Number of ticks simulated final_tick 1297500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 461545 # Simulator instruction rate (inst/s) -host_op_rate 460635 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 231518490 # Simulator tick rate (ticks/s) -host_mem_usage 237472 # Number of bytes of host memory used -host_seconds 0.01 # Real time elapsed on the host +host_inst_rate 615280 # Simulator instruction rate (inst/s) +host_op_rate 613973 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 308554926 # Simulator tick rate (ticks/s) +host_mem_usage 281160 # Number of bytes of host memory used +host_seconds 0.00 # Real time elapsed on the host sim_insts 2577 # Number of instructions simulated sim_ops 2577 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts system.clk_domain.clock 1000 # Clock period in ticks +system.physmem.pwrStateResidencyTicks::UNDEFINED 1297500 # Cumulative time (in ticks) in various power states system.physmem.bytes_read::cpu.inst 10340 # Number of bytes read from this memory system.physmem.bytes_read::cpu.data 3016 # Number of bytes read from this memory system.physmem.bytes_read::total 13356 # Number of bytes read from this memory @@ -35,6 +36,7 @@ system.physmem.bw_write::total 1586127168 # Wr system.physmem.bw_total::cpu.inst 7969171484 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu.data 3910597303 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::total 11879768786 # Total bandwidth to/from this memory (bytes/s) +system.pwrStateResidencyTicks::UNDEFINED 1297500 # Cumulative time (in ticks) in various power states system.cpu_clk_domain.clock 500 # Clock period in ticks system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses @@ -69,6 +71,7 @@ system.cpu.itb.data_misses 0 # DT system.cpu.itb.data_acv 0 # DTB access violations system.cpu.itb.data_accesses 0 # DTB accesses system.cpu.workload.num_syscalls 4 # Number of system calls +system.cpu.pwrStateResidencyTicks::ON 1297500 # Cumulative time (in ticks) in various power states system.cpu.numCycles 2596 # number of cpu cycles simulated system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed @@ -127,6 +130,7 @@ system.cpu.op_class::MemWrite 298 11.53% 100.00% # Cl system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction system.cpu.op_class::total 2585 # Class of executed instruction +system.membus.pwrStateResidencyTicks::UNDEFINED 1297500 # Cumulative time (in ticks) in various power states system.membus.trans_dist::ReadReq 3000 # Transaction distribution system.membus.trans_dist::ReadResp 3000 # Transaction distribution system.membus.trans_dist::WriteReq 294 # Transaction distribution diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/stats.txt index cb06e619e..5ca935512 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_Two_Level/stats.txt @@ -4,15 +4,16 @@ sim_seconds 0.000046 # Nu sim_ticks 45733 # Number of ticks simulated final_tick 45733 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 63739 # Simulator instruction rate (inst/s) -host_op_rate 63721 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1130531 # Simulator tick rate (ticks/s) -host_mem_usage 407420 # Number of bytes of host memory used +host_inst_rate 61876 # Simulator instruction rate (inst/s) +host_op_rate 61863 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1097622 # Simulator tick rate (ticks/s) +host_mem_usage 452416 # Number of bytes of host memory used host_seconds 0.04 # Real time elapsed on the host sim_insts 2577 # Number of instructions simulated sim_ops 2577 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts system.clk_domain.clock 1 # Clock period in ticks +system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 45733 # Cumulative time (in ticks) in various power states system.mem_ctrls.bytes_read::ruby.dir_cntrl0 35008 # Number of bytes read from this memory system.mem_ctrls.bytes_read::total 35008 # Number of bytes read from this memory system.mem_ctrls.bytes_written::ruby.dir_cntrl0 6592 # Number of bytes written to this memory @@ -260,6 +261,7 @@ system.mem_ctrls_1.memoryStateTime::REF 1300 # Ti system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states system.mem_ctrls_1.memoryStateTime::ACT 37150 # Time in different power states system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states +system.pwrStateResidencyTicks::UNDEFINED 45733 # Cumulative time (in ticks) in various power states system.cpu.clk_domain.clock 1 # Clock period in ticks system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses @@ -294,6 +296,7 @@ system.cpu.itb.data_misses 0 # DT system.cpu.itb.data_acv 0 # DTB access violations system.cpu.itb.data_accesses 0 # DTB accesses system.cpu.workload.num_syscalls 4 # Number of system calls +system.cpu.pwrStateResidencyTicks::ON 45733 # Cumulative time (in ticks) in various power states system.cpu.numCycles 45733 # number of cpu cycles simulated system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed @@ -353,6 +356,7 @@ system.cpu.op_class::IprAccess 0 0.00% 100.00% # Cl system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction system.cpu.op_class::total 2585 # Class of executed instruction system.ruby.clk_domain.clock 1 # Clock period in ticks +system.ruby.pwrStateResidencyTicks::UNDEFINED 45733 # Cumulative time (in ticks) in various power states system.ruby.delayHist::bucket_size 1 # delay histogram for all message system.ruby.delayHist::max_bucket 9 # delay histogram for all message system.ruby.delayHist::samples 3612 # delay histogram for all message @@ -390,6 +394,7 @@ system.ruby.miss_latency_hist_seqr::gmean 64.604000 system.ruby.miss_latency_hist_seqr::stdev 30.458568 system.ruby.miss_latency_hist_seqr | 134 23.43% 23.43% | 432 75.52% 98.95% | 1 0.17% 99.13% | 0 0.00% 99.13% | 1 0.17% 99.30% | 4 0.70% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% system.ruby.miss_latency_hist_seqr::total 572 +system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 45733 # Cumulative time (in ticks) in various power states system.ruby.l1_cntrl0.L1Dcache.demand_hits 437 # Number of cache demand hits system.ruby.l1_cntrl0.L1Dcache.demand_misses 272 # Number of cache demand misses system.ruby.l1_cntrl0.L1Dcache.demand_accesses 709 # Number of cache demand accesses @@ -405,10 +410,14 @@ system.ruby.l1_cntrl0.prefetcher.hits 0 # nu system.ruby.l1_cntrl0.prefetcher.partial_hits 0 # number of misses observed for a block being prefetched system.ruby.l1_cntrl0.prefetcher.pages_crossed 0 # number of prefetches across pages system.ruby.l1_cntrl0.prefetcher.misses_on_prefetched_blocks 0 # number of misses for blocks that were prefetched, yet missed +system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 45733 # Cumulative time (in ticks) in various power states +system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED 45733 # Cumulative time (in ticks) in various power states system.ruby.l2_cntrl0.L2cache.demand_hits 25 # Number of cache demand hits system.ruby.l2_cntrl0.L2cache.demand_misses 547 # Number of cache demand misses system.ruby.l2_cntrl0.L2cache.demand_accesses 572 # Number of cache demand accesses +system.ruby.l2_cntrl0.pwrStateResidencyTicks::UNDEFINED 45733 # Cumulative time (in ticks) in various power states system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks +system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 45733 # Cumulative time (in ticks) in various power states system.ruby.network.routers0.percent_links_utilized 4.350250 system.ruby.network.routers0.msg_count.Control::0 572 system.ruby.network.routers0.msg_count.Request_Control::2 431 @@ -426,6 +435,7 @@ system.ruby.network.routers0.msg_bytes.Response_Control::2 2176 system.ruby.network.routers0.msg_bytes.Writeback_Data::0 3240 system.ruby.network.routers0.msg_bytes.Writeback_Data::1 4464 system.ruby.network.routers0.msg_bytes.Writeback_Control::0 632 +system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED 45733 # Cumulative time (in ticks) in various power states system.ruby.network.routers1.percent_links_utilized 8.380163 system.ruby.network.routers1.msg_count.Control::0 1119 system.ruby.network.routers1.msg_count.Request_Control::2 431 @@ -443,6 +453,7 @@ system.ruby.network.routers1.msg_bytes.Response_Control::2 2176 system.ruby.network.routers1.msg_bytes.Writeback_Data::0 3240 system.ruby.network.routers1.msg_bytes.Writeback_Data::1 4464 system.ruby.network.routers1.msg_bytes.Writeback_Control::0 632 +system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED 45733 # Cumulative time (in ticks) in various power states system.ruby.network.routers2.percent_links_utilized 4.029913 system.ruby.network.routers2.msg_count.Control::0 547 system.ruby.network.routers2.msg_count.Response_Data::1 650 @@ -450,6 +461,7 @@ system.ruby.network.routers2.msg_count.Response_Control::1 975 system.ruby.network.routers2.msg_bytes.Control::0 4376 system.ruby.network.routers2.msg_bytes.Response_Data::1 46800 system.ruby.network.routers2.msg_bytes.Response_Control::1 7800 +system.ruby.network.routers3.pwrStateResidencyTicks::UNDEFINED 45733 # Cumulative time (in ticks) in various power states system.ruby.network.routers3.percent_links_utilized 5.586775 system.ruby.network.routers3.msg_count.Control::0 1119 system.ruby.network.routers3.msg_count.Request_Control::2 431 @@ -467,6 +479,7 @@ system.ruby.network.routers3.msg_bytes.Response_Control::2 2176 system.ruby.network.routers3.msg_bytes.Writeback_Data::0 3240 system.ruby.network.routers3.msg_bytes.Writeback_Data::1 4464 system.ruby.network.routers3.msg_bytes.Writeback_Control::0 632 +system.ruby.network.pwrStateResidencyTicks::UNDEFINED 45733 # Cumulative time (in ticks) in various power states system.ruby.network.msg_count.Control 3357 system.ruby.network.msg_count.Request_Control 1293 system.ruby.network.msg_count.Response_Data 3666 @@ -479,6 +492,7 @@ system.ruby.network.msg_byte.Response_Data 263952 system.ruby.network.msg_byte.Response_Control 41760 system.ruby.network.msg_byte.Writeback_Data 23112 system.ruby.network.msg_byte.Writeback_Control 1896 +system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 45733 # Cumulative time (in ticks) in various power states system.ruby.network.routers0.throttle0.link_utilization 6.235104 system.ruby.network.routers0.throttle0.msg_count.Request_Control::2 431 system.ruby.network.routers0.throttle0.msg_count.Response_Data::1 572 diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/stats.txt index f80632a35..1d68008a1 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/stats.txt @@ -4,15 +4,16 @@ sim_seconds 0.000042 # Nu sim_ticks 41712 # Number of ticks simulated final_tick 41712 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 64355 # Simulator instruction rate (inst/s) -host_op_rate 64336 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1041083 # Simulator tick rate (ticks/s) -host_mem_usage 410320 # Number of bytes of host memory used +host_inst_rate 62826 # Simulator instruction rate (inst/s) +host_op_rate 62813 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1016484 # Simulator tick rate (ticks/s) +host_mem_usage 457644 # Number of bytes of host memory used host_seconds 0.04 # Real time elapsed on the host sim_insts 2577 # Number of instructions simulated sim_ops 2577 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts system.clk_domain.clock 1 # Clock period in ticks +system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 41712 # Cumulative time (in ticks) in various power states system.mem_ctrls.bytes_read::ruby.dir_cntrl0 29696 # Number of bytes read from this memory system.mem_ctrls.bytes_read::total 29696 # Number of bytes read from this memory system.mem_ctrls.bytes_written::ruby.dir_cntrl0 4992 # Number of bytes written to this memory @@ -260,6 +261,7 @@ system.mem_ctrls_1.memoryStateTime::REF 1300 # Ti system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states system.mem_ctrls_1.memoryStateTime::ACT 37281 # Time in different power states system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states +system.pwrStateResidencyTicks::UNDEFINED 41712 # Cumulative time (in ticks) in various power states system.cpu.clk_domain.clock 1 # Clock period in ticks system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses @@ -294,6 +296,7 @@ system.cpu.itb.data_misses 0 # DT system.cpu.itb.data_acv 0 # DTB access violations system.cpu.itb.data_accesses 0 # DTB accesses system.cpu.workload.num_syscalls 4 # Number of system calls +system.cpu.pwrStateResidencyTicks::ON 41712 # Cumulative time (in ticks) in various power states system.cpu.numCycles 41712 # number of cpu cycles simulated system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed @@ -353,6 +356,7 @@ system.cpu.op_class::IprAccess 0 0.00% 100.00% # Cl system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction system.cpu.op_class::total 2585 # Class of executed instruction system.ruby.clk_domain.clock 1 # Clock period in ticks +system.ruby.pwrStateResidencyTicks::UNDEFINED 41712 # Cumulative time (in ticks) in various power states system.ruby.outstanding_req_hist_seqr::bucket_size 1 system.ruby.outstanding_req_hist_seqr::max_bucket 9 system.ruby.outstanding_req_hist_seqr::samples 3295 @@ -383,16 +387,21 @@ system.ruby.miss_latency_hist_seqr::gmean 57.783054 system.ruby.miss_latency_hist_seqr::stdev 31.323348 system.ruby.miss_latency_hist_seqr | 80 14.71% 14.71% | 80 14.71% 29.41% | 359 65.99% 95.40% | 18 3.31% 98.71% | 2 0.37% 99.08% | 0 0.00% 99.08% | 1 0.18% 99.26% | 0 0.00% 99.26% | 1 0.18% 99.45% | 3 0.55% 100.00% system.ruby.miss_latency_hist_seqr::total 544 +system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 41712 # Cumulative time (in ticks) in various power states system.ruby.l1_cntrl0.L1Dcache.demand_hits 435 # Number of cache demand hits system.ruby.l1_cntrl0.L1Dcache.demand_misses 274 # Number of cache demand misses system.ruby.l1_cntrl0.L1Dcache.demand_accesses 709 # Number of cache demand accesses system.ruby.l1_cntrl0.L1Icache.demand_hits 2315 # Number of cache demand hits system.ruby.l1_cntrl0.L1Icache.demand_misses 270 # Number of cache demand misses system.ruby.l1_cntrl0.L1Icache.demand_accesses 2585 # Number of cache demand accesses +system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 41712 # Cumulative time (in ticks) in various power states +system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED 41712 # Cumulative time (in ticks) in various power states system.ruby.l2_cntrl0.L2cache.demand_hits 80 # Number of cache demand hits system.ruby.l2_cntrl0.L2cache.demand_misses 464 # Number of cache demand misses system.ruby.l2_cntrl0.L2cache.demand_accesses 544 # Number of cache demand accesses +system.ruby.l2_cntrl0.pwrStateResidencyTicks::UNDEFINED 41712 # Cumulative time (in ticks) in various power states system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks +system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 41712 # Cumulative time (in ticks) in various power states system.ruby.network.routers0.percent_links_utilized 6.800201 system.ruby.network.routers0.msg_count.Request_Control::0 544 system.ruby.network.routers0.msg_count.Response_Data::2 464 @@ -406,6 +415,7 @@ system.ruby.network.routers0.msg_bytes.ResponseL2hit_Data::2 5760 system.ruby.network.routers0.msg_bytes.Writeback_Data::2 34704 system.ruby.network.routers0.msg_bytes.Writeback_Control::0 8032 system.ruby.network.routers0.msg_bytes.Unblock_Control::2 4512 +system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED 41712 # Cumulative time (in ticks) in various power states system.ruby.network.routers1.percent_links_utilized 10.372914 system.ruby.network.routers1.msg_count.Request_Control::0 544 system.ruby.network.routers1.msg_count.Request_Control::1 464 @@ -423,6 +433,7 @@ system.ruby.network.routers1.msg_bytes.Writeback_Data::2 40320 system.ruby.network.routers1.msg_bytes.Writeback_Control::0 8032 system.ruby.network.routers1.msg_bytes.Writeback_Control::1 1248 system.ruby.network.routers1.msg_bytes.Unblock_Control::2 8216 +system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED 41712 # Cumulative time (in ticks) in various power states system.ruby.network.routers2.percent_links_utilized 3.572713 system.ruby.network.routers2.msg_count.Request_Control::1 464 system.ruby.network.routers2.msg_count.Response_Data::2 464 @@ -434,6 +445,7 @@ system.ruby.network.routers2.msg_bytes.Response_Data::2 33408 system.ruby.network.routers2.msg_bytes.Writeback_Data::2 5616 system.ruby.network.routers2.msg_bytes.Writeback_Control::1 1248 system.ruby.network.routers2.msg_bytes.Unblock_Control::2 3704 +system.ruby.network.routers3.pwrStateResidencyTicks::UNDEFINED 41712 # Cumulative time (in ticks) in various power states system.ruby.network.routers3.percent_links_utilized 6.915276 system.ruby.network.routers3.msg_count.Request_Control::0 544 system.ruby.network.routers3.msg_count.Request_Control::1 464 @@ -451,6 +463,7 @@ system.ruby.network.routers3.msg_bytes.Writeback_Data::2 40320 system.ruby.network.routers3.msg_bytes.Writeback_Control::0 8032 system.ruby.network.routers3.msg_bytes.Writeback_Control::1 1248 system.ruby.network.routers3.msg_bytes.Unblock_Control::2 8216 +system.ruby.network.pwrStateResidencyTicks::UNDEFINED 41712 # Cumulative time (in ticks) in various power states system.ruby.network.msg_count.Request_Control 3024 system.ruby.network.msg_count.Response_Data 2784 system.ruby.network.msg_count.ResponseL2hit_Data 240 @@ -463,6 +476,7 @@ system.ruby.network.msg_byte.ResponseL2hit_Data 17280 system.ruby.network.msg_byte.Writeback_Data 120960 system.ruby.network.msg_byte.Writeback_Control 27840 system.ruby.network.msg_byte.Unblock_Control 24648 +system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 41712 # Cumulative time (in ticks) in various power states system.ruby.network.routers0.throttle0.link_utilization 6.470560 system.ruby.network.routers0.throttle0.msg_count.Response_Data::2 464 system.ruby.network.routers0.throttle0.msg_count.ResponseL2hit_Data::2 80 diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt index 03e04136e..20325d4b9 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt @@ -4,15 +4,16 @@ sim_seconds 0.000041 # Nu sim_ticks 40527 # Number of ticks simulated final_tick 40527 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 1955 # Simulator instruction rate (inst/s) -host_op_rate 1955 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 30751 # Simulator tick rate (ticks/s) -host_mem_usage 407948 # Number of bytes of host memory used -host_seconds 1.32 # Real time elapsed on the host +host_inst_rate 89328 # Simulator instruction rate (inst/s) +host_op_rate 89293 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1403832 # Simulator tick rate (ticks/s) +host_mem_usage 454496 # Number of bytes of host memory used +host_seconds 0.03 # Real time elapsed on the host sim_insts 2577 # Number of instructions simulated sim_ops 2577 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts system.clk_domain.clock 1 # Clock period in ticks +system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 40527 # Cumulative time (in ticks) in various power states system.mem_ctrls.bytes_read::ruby.dir_cntrl0 28672 # Number of bytes read from this memory system.mem_ctrls.bytes_read::total 28672 # Number of bytes read from this memory system.mem_ctrls.bytes_written::ruby.dir_cntrl0 5376 # Number of bytes written to this memory @@ -260,6 +261,7 @@ system.mem_ctrls_1.memoryStateTime::REF 1300 # Ti system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states system.mem_ctrls_1.memoryStateTime::ACT 37083 # Time in different power states system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states +system.pwrStateResidencyTicks::UNDEFINED 40527 # Cumulative time (in ticks) in various power states system.cpu.clk_domain.clock 1 # Clock period in ticks system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses @@ -294,6 +296,7 @@ system.cpu.itb.data_misses 0 # DT system.cpu.itb.data_acv 0 # DTB access violations system.cpu.itb.data_accesses 0 # DTB accesses system.cpu.workload.num_syscalls 4 # Number of system calls +system.cpu.pwrStateResidencyTicks::ON 40527 # Cumulative time (in ticks) in various power states system.cpu.numCycles 40527 # number of cpu cycles simulated system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed @@ -353,6 +356,7 @@ system.cpu.op_class::IprAccess 0 0.00% 100.00% # Cl system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction system.cpu.op_class::total 2585 # Class of executed instruction system.ruby.clk_domain.clock 1 # Clock period in ticks +system.ruby.pwrStateResidencyTicks::UNDEFINED 40527 # Cumulative time (in ticks) in various power states system.ruby.outstanding_req_hist_seqr::bucket_size 1 system.ruby.outstanding_req_hist_seqr::max_bucket 9 system.ruby.outstanding_req_hist_seqr::samples 3295 @@ -385,16 +389,21 @@ system.ruby.miss_latency_hist_seqr::stdev 29.782878 system.ruby.miss_latency_hist_seqr | 73 16.29% 16.29% | 368 82.14% 98.44% | 2 0.45% 98.88% | 0 0.00% 98.88% | 3 0.67% 99.55% | 2 0.45% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% system.ruby.miss_latency_hist_seqr::total 448 system.ruby.Directory.incomplete_times_seqr 447 +system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 40527 # Cumulative time (in ticks) in various power states system.ruby.l1_cntrl0.L1Dcache.demand_hits 461 # Number of cache demand hits system.ruby.l1_cntrl0.L1Dcache.demand_misses 248 # Number of cache demand misses system.ruby.l1_cntrl0.L1Dcache.demand_accesses 709 # Number of cache demand accesses system.ruby.l1_cntrl0.L1Icache.demand_hits 2315 # Number of cache demand hits system.ruby.l1_cntrl0.L1Icache.demand_misses 270 # Number of cache demand misses system.ruby.l1_cntrl0.L1Icache.demand_accesses 2585 # Number of cache demand accesses +system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 40527 # Cumulative time (in ticks) in various power states +system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED 40527 # Cumulative time (in ticks) in various power states system.ruby.l2_cntrl0.L2cache.demand_hits 64 # Number of cache demand hits system.ruby.l2_cntrl0.L2cache.demand_misses 454 # Number of cache demand misses system.ruby.l2_cntrl0.L2cache.demand_accesses 518 # Number of cache demand accesses +system.ruby.l2_cntrl0.pwrStateResidencyTicks::UNDEFINED 40527 # Cumulative time (in ticks) in various power states system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks +system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 40527 # Cumulative time (in ticks) in various power states system.ruby.network.routers0.percent_links_utilized 5.992918 system.ruby.network.routers0.msg_count.Request_Control::1 518 system.ruby.network.routers0.msg_count.Response_Data::4 448 @@ -408,6 +417,7 @@ system.ruby.network.routers0.msg_bytes.ResponseL2hit_Data::4 5040 system.ruby.network.routers0.msg_bytes.Response_Control::4 8 system.ruby.network.routers0.msg_bytes.Writeback_Data::4 36144 system.ruby.network.routers0.msg_bytes.Persistent_Control::3 128 +system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED 40527 # Cumulative time (in ticks) in various power states system.ruby.network.routers1.percent_links_utilized 4.472327 system.ruby.network.routers1.msg_count.Request_Control::1 518 system.ruby.network.routers1.msg_count.Request_Control::2 454 @@ -423,6 +433,7 @@ system.ruby.network.routers1.msg_bytes.Response_Control::4 8 system.ruby.network.routers1.msg_bytes.Writeback_Data::4 42192 system.ruby.network.routers1.msg_bytes.Writeback_Control::4 2920 system.ruby.network.routers1.msg_bytes.Persistent_Control::3 64 +system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED 40527 # Cumulative time (in ticks) in various power states system.ruby.network.routers2.percent_links_utilized 3.463740 system.ruby.network.routers2.msg_count.Request_Control::2 454 system.ruby.network.routers2.msg_count.Response_Data::4 448 @@ -434,6 +445,7 @@ system.ruby.network.routers2.msg_bytes.Response_Data::4 32256 system.ruby.network.routers2.msg_bytes.Writeback_Data::4 6048 system.ruby.network.routers2.msg_bytes.Writeback_Control::4 2920 system.ruby.network.routers2.msg_bytes.Persistent_Control::3 64 +system.ruby.network.routers3.pwrStateResidencyTicks::UNDEFINED 40527 # Cumulative time (in ticks) in various power states system.ruby.network.routers3.percent_links_utilized 4.642995 system.ruby.network.routers3.msg_count.Request_Control::1 518 system.ruby.network.routers3.msg_count.Request_Control::2 454 @@ -451,6 +463,7 @@ system.ruby.network.routers3.msg_bytes.Response_Control::4 8 system.ruby.network.routers3.msg_bytes.Writeback_Data::4 42192 system.ruby.network.routers3.msg_bytes.Writeback_Control::4 2920 system.ruby.network.routers3.msg_bytes.Persistent_Control::3 128 +system.ruby.network.pwrStateResidencyTicks::UNDEFINED 40527 # Cumulative time (in ticks) in various power states system.ruby.network.msg_count.Request_Control 2916 system.ruby.network.msg_count.Response_Data 1344 system.ruby.network.msg_count.ResponseL2hit_Data 210 @@ -465,6 +478,7 @@ system.ruby.network.msg_byte.Response_Control 24 system.ruby.network.msg_byte.Writeback_Data 126576 system.ruby.network.msg_byte.Writeback_Control 8760 system.ruby.network.msg_byte.Persistent_Control 384 +system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 40527 # Cumulative time (in ticks) in various power states system.ruby.network.routers0.throttle0.link_utilization 5.762825 system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 448 system.ruby.network.routers0.throttle0.msg_count.ResponseL2hit_Data::4 70 diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt index 2707b659f..71e93d920 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt @@ -4,15 +4,16 @@ sim_seconds 0.000033 # Nu sim_ticks 32936 # Number of ticks simulated final_tick 32936 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 83066 # Simulator instruction rate (inst/s) -host_op_rate 82987 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1059779 # Simulator tick rate (ticks/s) -host_mem_usage 407644 # Number of bytes of host memory used +host_inst_rate 91605 # Simulator instruction rate (inst/s) +host_op_rate 91573 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 1170024 # Simulator tick rate (ticks/s) +host_mem_usage 453424 # Number of bytes of host memory used host_seconds 0.03 # Real time elapsed on the host sim_insts 2577 # Number of instructions simulated sim_ops 2577 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts system.clk_domain.clock 1 # Clock period in ticks +system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 32936 # Cumulative time (in ticks) in various power states system.mem_ctrls.bytes_read::ruby.dir_cntrl0 28224 # Number of bytes read from this memory system.mem_ctrls.bytes_read::total 28224 # Number of bytes read from this memory system.mem_ctrls.bytes_written::ruby.dir_cntrl0 5184 # Number of bytes written to this memory @@ -260,6 +261,7 @@ system.mem_ctrls_1.memoryStateTime::REF 1040 # Ti system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states system.mem_ctrls_1.memoryStateTime::ACT 29634 # Time in different power states system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states +system.pwrStateResidencyTicks::UNDEFINED 32936 # Cumulative time (in ticks) in various power states system.cpu.clk_domain.clock 1 # Clock period in ticks system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses @@ -294,6 +296,7 @@ system.cpu.itb.data_misses 0 # DT system.cpu.itb.data_acv 0 # DTB access violations system.cpu.itb.data_accesses 0 # DTB accesses system.cpu.workload.num_syscalls 4 # Number of system calls +system.cpu.pwrStateResidencyTicks::ON 32936 # Cumulative time (in ticks) in various power states system.cpu.numCycles 32936 # number of cpu cycles simulated system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed @@ -353,6 +356,7 @@ system.cpu.op_class::IprAccess 0 0.00% 100.00% # Cl system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction system.cpu.op_class::total 2585 # Class of executed instruction system.ruby.clk_domain.clock 1 # Clock period in ticks +system.ruby.pwrStateResidencyTicks::UNDEFINED 32936 # Cumulative time (in ticks) in various power states system.ruby.outstanding_req_hist_seqr::bucket_size 1 system.ruby.outstanding_req_hist_seqr::max_bucket 9 system.ruby.outstanding_req_hist_seqr::samples 3295 @@ -388,6 +392,7 @@ system.ruby.Directory.incomplete_times_seqr 440 system.ruby.dir_cntrl0.probeFilter.demand_hits 0 # Number of cache demand hits system.ruby.dir_cntrl0.probeFilter.demand_misses 0 # Number of cache demand misses system.ruby.dir_cntrl0.probeFilter.demand_accesses 0 # Number of cache demand accesses +system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 32936 # Cumulative time (in ticks) in various power states system.ruby.l1_cntrl0.L1Dcache.demand_hits 469 # Number of cache demand hits system.ruby.l1_cntrl0.L1Dcache.demand_misses 240 # Number of cache demand misses system.ruby.l1_cntrl0.L1Dcache.demand_accesses 709 # Number of cache demand accesses @@ -397,8 +402,11 @@ system.ruby.l1_cntrl0.L1Icache.demand_accesses 2585 system.ruby.l1_cntrl0.L2cache.demand_hits 69 # Number of cache demand hits system.ruby.l1_cntrl0.L2cache.demand_misses 441 # Number of cache demand misses system.ruby.l1_cntrl0.L2cache.demand_accesses 510 # Number of cache demand accesses +system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 32936 # Cumulative time (in ticks) in various power states +system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED 32936 # Cumulative time (in ticks) in various power states system.ruby.l1_cntrl0.fully_busy_cycles 5 # cycles for which number of transistions == max transitions system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks +system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 32936 # Cumulative time (in ticks) in various power states system.ruby.network.routers0.percent_links_utilized 5.141031 system.ruby.network.routers0.msg_count.Request_Control::2 441 system.ruby.network.routers0.msg_count.Response_Data::4 441 @@ -414,6 +422,7 @@ system.ruby.network.routers0.msg_bytes.Writeback_Control::2 3400 system.ruby.network.routers0.msg_bytes.Writeback_Control::3 3400 system.ruby.network.routers0.msg_bytes.Writeback_Control::5 2752 system.ruby.network.routers0.msg_bytes.Unblock_Control::5 3520 +system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED 32936 # Cumulative time (in ticks) in various power states system.ruby.network.routers1.percent_links_utilized 5.141031 system.ruby.network.routers1.msg_count.Request_Control::2 441 system.ruby.network.routers1.msg_count.Response_Data::4 441 @@ -429,6 +438,7 @@ system.ruby.network.routers1.msg_bytes.Writeback_Control::2 3400 system.ruby.network.routers1.msg_bytes.Writeback_Control::3 3400 system.ruby.network.routers1.msg_bytes.Writeback_Control::5 2752 system.ruby.network.routers1.msg_bytes.Unblock_Control::5 3520 +system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED 32936 # Cumulative time (in ticks) in various power states system.ruby.network.routers2.percent_links_utilized 5.141031 system.ruby.network.routers2.msg_count.Request_Control::2 441 system.ruby.network.routers2.msg_count.Response_Data::4 441 @@ -444,6 +454,7 @@ system.ruby.network.routers2.msg_bytes.Writeback_Control::2 3400 system.ruby.network.routers2.msg_bytes.Writeback_Control::3 3400 system.ruby.network.routers2.msg_bytes.Writeback_Control::5 2752 system.ruby.network.routers2.msg_bytes.Unblock_Control::5 3520 +system.ruby.network.pwrStateResidencyTicks::UNDEFINED 32936 # Cumulative time (in ticks) in various power states system.ruby.network.msg_count.Request_Control 1323 system.ruby.network.msg_count.Response_Data 1323 system.ruby.network.msg_count.Writeback_Data 243 @@ -454,6 +465,7 @@ system.ruby.network.msg_byte.Response_Data 95256 system.ruby.network.msg_byte.Writeback_Data 17496 system.ruby.network.msg_byte.Writeback_Control 28656 system.ruby.network.msg_byte.Unblock_Control 10560 +system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 32936 # Cumulative time (in ticks) in various power states system.ruby.network.routers0.throttle0.link_utilization 6.670513 system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 441 system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 425 diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/stats.txt index 15c5cf0e9..f97a14626 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/stats.txt @@ -4,15 +4,16 @@ sim_seconds 0.000042 # Nu sim_ticks 41659 # Number of ticks simulated final_tick 41659 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 92225 # Simulator instruction rate (inst/s) -host_op_rate 92177 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 1489374 # Simulator tick rate (ticks/s) -host_mem_usage 407716 # Number of bytes of host memory used -host_seconds 0.03 # Real time elapsed on the host +host_inst_rate 54027 # Simulator instruction rate (inst/s) +host_op_rate 54016 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 873053 # Simulator tick rate (ticks/s) +host_mem_usage 453224 # Number of bytes of host memory used +host_seconds 0.05 # Real time elapsed on the host sim_insts 2577 # Number of instructions simulated sim_ops 2577 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts system.clk_domain.clock 1 # Clock period in ticks +system.mem_ctrls.pwrStateResidencyTicks::UNDEFINED 41659 # Cumulative time (in ticks) in various power states system.mem_ctrls.bytes_read::ruby.dir_cntrl0 40064 # Number of bytes read from this memory system.mem_ctrls.bytes_read::total 40064 # Number of bytes read from this memory system.mem_ctrls.bytes_written::ruby.dir_cntrl0 39808 # Number of bytes written to this memory @@ -266,6 +267,7 @@ system.mem_ctrls_1.memoryStateTime::REF 1300 # Ti system.mem_ctrls_1.memoryStateTime::PRE_PDN 0 # Time in different power states system.mem_ctrls_1.memoryStateTime::ACT 37357 # Time in different power states system.mem_ctrls_1.memoryStateTime::ACT_PDN 0 # Time in different power states +system.pwrStateResidencyTicks::UNDEFINED 41659 # Cumulative time (in ticks) in various power states system.cpu.clk_domain.clock 1 # Clock period in ticks system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses @@ -300,6 +302,7 @@ system.cpu.itb.data_misses 0 # DT system.cpu.itb.data_acv 0 # DTB access violations system.cpu.itb.data_accesses 0 # DTB accesses system.cpu.workload.num_syscalls 4 # Number of system calls +system.cpu.pwrStateResidencyTicks::ON 41659 # Cumulative time (in ticks) in various power states system.cpu.numCycles 41659 # number of cpu cycles simulated system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed @@ -359,6 +362,7 @@ system.cpu.op_class::IprAccess 0 0.00% 100.00% # Cl system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction system.cpu.op_class::total 2585 # Class of executed instruction system.ruby.clk_domain.clock 1 # Clock period in ticks +system.ruby.pwrStateResidencyTicks::UNDEFINED 41659 # Cumulative time (in ticks) in various power states system.ruby.delayHist::bucket_size 1 # delay histogram for all message system.ruby.delayHist::max_bucket 9 # delay histogram for all message system.ruby.delayHist::samples 1248 # delay histogram for all message @@ -395,10 +399,14 @@ system.ruby.miss_latency_hist_seqr::stdev 32.986607 system.ruby.miss_latency_hist_seqr | 517 82.59% 82.59% | 90 14.38% 96.96% | 14 2.24% 99.20% | 0 0.00% 99.20% | 2 0.32% 99.52% | 3 0.48% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% | 0 0.00% 100.00% system.ruby.miss_latency_hist_seqr::total 626 system.ruby.Directory.incomplete_times_seqr 625 +system.ruby.dir_cntrl0.pwrStateResidencyTicks::UNDEFINED 41659 # Cumulative time (in ticks) in various power states system.ruby.l1_cntrl0.cacheMemory.demand_hits 2668 # Number of cache demand hits system.ruby.l1_cntrl0.cacheMemory.demand_misses 626 # Number of cache demand misses system.ruby.l1_cntrl0.cacheMemory.demand_accesses 3294 # Number of cache demand accesses +system.ruby.l1_cntrl0.sequencer.pwrStateResidencyTicks::UNDEFINED 41659 # Cumulative time (in ticks) in various power states +system.ruby.l1_cntrl0.pwrStateResidencyTicks::UNDEFINED 41659 # Cumulative time (in ticks) in various power states system.ruby.memctrl_clk_domain.clock 3 # Clock period in ticks +system.ruby.network.routers0.pwrStateResidencyTicks::UNDEFINED 41659 # Cumulative time (in ticks) in various power states system.ruby.network.routers0.percent_links_utilized 7.489378 system.ruby.network.routers0.msg_count.Control::2 626 system.ruby.network.routers0.msg_count.Data::2 622 @@ -408,6 +416,7 @@ system.ruby.network.routers0.msg_bytes.Control::2 5008 system.ruby.network.routers0.msg_bytes.Data::2 44784 system.ruby.network.routers0.msg_bytes.Response_Data::4 45072 system.ruby.network.routers0.msg_bytes.Writeback_Control::3 4976 +system.ruby.network.routers1.pwrStateResidencyTicks::UNDEFINED 41659 # Cumulative time (in ticks) in various power states system.ruby.network.routers1.percent_links_utilized 7.489378 system.ruby.network.routers1.msg_count.Control::2 626 system.ruby.network.routers1.msg_count.Data::2 622 @@ -417,6 +426,7 @@ system.ruby.network.routers1.msg_bytes.Control::2 5008 system.ruby.network.routers1.msg_bytes.Data::2 44784 system.ruby.network.routers1.msg_bytes.Response_Data::4 45072 system.ruby.network.routers1.msg_bytes.Writeback_Control::3 4976 +system.ruby.network.routers2.pwrStateResidencyTicks::UNDEFINED 41659 # Cumulative time (in ticks) in various power states system.ruby.network.routers2.percent_links_utilized 7.489378 system.ruby.network.routers2.msg_count.Control::2 626 system.ruby.network.routers2.msg_count.Data::2 622 @@ -426,6 +436,7 @@ system.ruby.network.routers2.msg_bytes.Control::2 5008 system.ruby.network.routers2.msg_bytes.Data::2 44784 system.ruby.network.routers2.msg_bytes.Response_Data::4 45072 system.ruby.network.routers2.msg_bytes.Writeback_Control::3 4976 +system.ruby.network.pwrStateResidencyTicks::UNDEFINED 41659 # Cumulative time (in ticks) in various power states system.ruby.network.msg_count.Control 1878 system.ruby.network.msg_count.Data 1866 system.ruby.network.msg_count.Response_Data 1878 @@ -434,6 +445,7 @@ system.ruby.network.msg_byte.Control 15024 system.ruby.network.msg_byte.Data 134352 system.ruby.network.msg_byte.Response_Data 135216 system.ruby.network.msg_byte.Writeback_Control 14928 +system.sys_port_proxy.pwrStateResidencyTicks::UNDEFINED 41659 # Cumulative time (in ticks) in various power states system.ruby.network.routers0.throttle0.link_utilization 7.508582 system.ruby.network.routers0.throttle0.msg_count.Response_Data::4 626 system.ruby.network.routers0.throttle0.msg_count.Writeback_Control::3 622 diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/stats.txt index 9736e3d18..a94783b9b 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/stats.txt @@ -4,15 +4,16 @@ sim_seconds 0.000018 # Nu sim_ticks 18239500 # Number of ticks simulated final_tick 18239500 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000000 # Frequency of simulated ticks -host_inst_rate 339288 # Simulator instruction rate (inst/s) -host_op_rate 338780 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 2394585777 # Simulator tick rate (ticks/s) -host_mem_usage 246188 # Number of bytes of host memory used +host_inst_rate 346390 # Simulator instruction rate (inst/s) +host_op_rate 345952 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 2445638693 # Simulator tick rate (ticks/s) +host_mem_usage 291156 # Number of bytes of host memory used host_seconds 0.01 # Real time elapsed on the host sim_insts 2577 # Number of instructions simulated sim_ops 2577 # Number of ops (including micro ops) simulated system.voltage_domain.voltage 1 # Voltage in Volts system.clk_domain.clock 1000 # Clock period in ticks +system.physmem.pwrStateResidencyTicks::UNDEFINED 18239500 # Cumulative time (in ticks) in various power states system.physmem.bytes_read::cpu.inst 10432 # Number of bytes read from this memory system.physmem.bytes_read::cpu.data 5248 # Number of bytes read from this memory system.physmem.bytes_read::total 15680 # Number of bytes read from this memory @@ -29,6 +30,7 @@ system.physmem.bw_inst_read::total 571945503 # In system.physmem.bw_total::cpu.inst 571945503 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::cpu.data 287727186 # Total bandwidth to/from this memory (bytes/s) system.physmem.bw_total::total 859672688 # Total bandwidth to/from this memory (bytes/s) +system.pwrStateResidencyTicks::UNDEFINED 18239500 # Cumulative time (in ticks) in various power states system.cpu_clk_domain.clock 500 # Clock period in ticks system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses @@ -63,6 +65,7 @@ system.cpu.itb.data_misses 0 # DT system.cpu.itb.data_acv 0 # DTB access violations system.cpu.itb.data_accesses 0 # DTB accesses system.cpu.workload.num_syscalls 4 # Number of system calls +system.cpu.pwrStateResidencyTicks::ON 18239500 # Cumulative time (in ticks) in various power states system.cpu.numCycles 36479 # number of cpu cycles simulated system.cpu.numWorkItemsStarted 0 # number of work items this cpu started system.cpu.numWorkItemsCompleted 0 # number of work items this cpu completed @@ -121,6 +124,7 @@ system.cpu.op_class::MemWrite 298 11.53% 100.00% # Cl system.cpu.op_class::IprAccess 0 0.00% 100.00% # Class of executed instruction system.cpu.op_class::InstPrefetch 0 0.00% 100.00% # Class of executed instruction system.cpu.op_class::total 2585 # Class of executed instruction +system.cpu.dcache.tags.pwrStateResidencyTicks::UNDEFINED 18239500 # Cumulative time (in ticks) in various power states system.cpu.dcache.tags.replacements 0 # number of replacements system.cpu.dcache.tags.tagsinuse 47.277997 # Cycle average of tags in use system.cpu.dcache.tags.total_refs 627 # Total number of references to valid blocks. @@ -136,6 +140,7 @@ system.cpu.dcache.tags.age_task_id_blocks_1024::1 49 system.cpu.dcache.tags.occ_task_id_percent::1024 0.020020 # Percentage of cache occupancy per task id system.cpu.dcache.tags.tag_accesses 1500 # Number of tag accesses system.cpu.dcache.tags.data_accesses 1500 # Number of data accesses +system.cpu.dcache.pwrStateResidencyTicks::UNDEFINED 18239500 # Cumulative time (in ticks) in various power states system.cpu.dcache.ReadReq_hits::cpu.data 360 # number of ReadReq hits system.cpu.dcache.ReadReq_hits::total 360 # number of ReadReq hits system.cpu.dcache.WriteReq_hits::cpu.data 267 # number of WriteReq hits @@ -222,6 +227,7 @@ system.cpu.dcache.demand_avg_mshr_miss_latency::cpu.data 61000 system.cpu.dcache.demand_avg_mshr_miss_latency::total 61000 # average overall mshr miss latency system.cpu.dcache.overall_avg_mshr_miss_latency::cpu.data 61000 # average overall mshr miss latency system.cpu.dcache.overall_avg_mshr_miss_latency::total 61000 # average overall mshr miss latency +system.cpu.icache.tags.pwrStateResidencyTicks::UNDEFINED 18239500 # Cumulative time (in ticks) in various power states system.cpu.icache.tags.replacements 0 # number of replacements system.cpu.icache.tags.tagsinuse 79.677134 # Cycle average of tags in use system.cpu.icache.tags.total_refs 2423 # Total number of references to valid blocks. @@ -237,6 +243,7 @@ system.cpu.icache.tags.age_task_id_blocks_1024::1 69 system.cpu.icache.tags.occ_task_id_percent::1024 0.079590 # Percentage of cache occupancy per task id system.cpu.icache.tags.tag_accesses 5335 # Number of tag accesses system.cpu.icache.tags.data_accesses 5335 # Number of data accesses +system.cpu.icache.pwrStateResidencyTicks::UNDEFINED 18239500 # Cumulative time (in ticks) in various power states system.cpu.icache.ReadReq_hits::cpu.inst 2423 # number of ReadReq hits system.cpu.icache.ReadReq_hits::total 2423 # number of ReadReq hits system.cpu.icache.demand_hits::cpu.inst 2423 # number of demand (read+write) hits @@ -303,6 +310,7 @@ system.cpu.icache.demand_avg_mshr_miss_latency::cpu.inst 61003.067485 system.cpu.icache.demand_avg_mshr_miss_latency::total 61003.067485 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::cpu.inst 61003.067485 # average overall mshr miss latency system.cpu.icache.overall_avg_mshr_miss_latency::total 61003.067485 # average overall mshr miss latency +system.cpu.l2cache.tags.pwrStateResidencyTicks::UNDEFINED 18239500 # Cumulative time (in ticks) in various power states system.cpu.l2cache.tags.replacements 0 # number of replacements system.cpu.l2cache.tags.tagsinuse 106.649585 # Cycle average of tags in use system.cpu.l2cache.tags.total_refs 0 # Total number of references to valid blocks. @@ -320,6 +328,7 @@ system.cpu.l2cache.tags.age_task_id_blocks_1024::1 94 system.cpu.l2cache.tags.occ_task_id_percent::1024 0.006653 # Percentage of cache occupancy per task id system.cpu.l2cache.tags.tag_accesses 2205 # Number of tag accesses system.cpu.l2cache.tags.data_accesses 2205 # Number of data accesses +system.cpu.l2cache.pwrStateResidencyTicks::UNDEFINED 18239500 # Cumulative time (in ticks) in various power states system.cpu.l2cache.ReadExReq_misses::cpu.data 27 # number of ReadExReq misses system.cpu.l2cache.ReadExReq_misses::total 27 # number of ReadExReq misses system.cpu.l2cache.ReadCleanReq_misses::cpu.inst 163 # number of ReadCleanReq misses @@ -440,6 +449,7 @@ system.cpu.toL2Bus.snoop_filter.hit_multi_requests 0 system.cpu.toL2Bus.snoop_filter.tot_snoops 0 # Total number of snoops made to the snoop filter. system.cpu.toL2Bus.snoop_filter.hit_single_snoops 0 # Number of snoops hitting in the snoop filter with a single holder of the requested data. system.cpu.toL2Bus.snoop_filter.hit_multi_snoops 0 # Number of snoops hitting in the snoop filter with multiple (>1) holders of the requested data. +system.cpu.toL2Bus.pwrStateResidencyTicks::UNDEFINED 18239500 # Cumulative time (in ticks) in various power states system.cpu.toL2Bus.trans_dist::ReadResp 218 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExReq 27 # Transaction distribution system.cpu.toL2Bus.trans_dist::ReadExResp 27 # Transaction distribution @@ -469,6 +479,7 @@ system.cpu.toL2Bus.respLayer0.occupancy 244500 # La system.cpu.toL2Bus.respLayer0.utilization 1.3 # Layer utilization (%) system.cpu.toL2Bus.respLayer1.occupancy 123000 # Layer occupancy (ticks) system.cpu.toL2Bus.respLayer1.utilization 0.7 # Layer utilization (%) +system.membus.pwrStateResidencyTicks::UNDEFINED 18239500 # Cumulative time (in ticks) in various power states system.membus.trans_dist::ReadResp 218 # Transaction distribution system.membus.trans_dist::ReadExReq 27 # Transaction distribution system.membus.trans_dist::ReadExResp 27 # Transaction distribution |