diff options
| author | Steve Reinhardt <stever@gmail.com> | 2013-09-28 15:25:17 -0400 |
|---|---|---|
| committer | Steve Reinhardt <stever@gmail.com> | 2013-09-28 15:25:17 -0400 |
| commit | fbc1feb39ac19379983ca714f4c7fadcd9fdabf6 (patch) | |
| tree | 59e49142d5930eb044e9fc09d94c5060a810d545 /tests/quick/se/00.hello/ref/alpha | |
| parent | e5c319db43751f45b2bcca1d018fc39d4561ef9c (diff) | |
| download | gem5-fbc1feb39ac19379983ca714f4c7fadcd9fdabf6.tar.xz | |
tests: update reference outputs
Apparently only stats.txt was updated the last time, so
this changeset updates other reference output files
(config.ini, simout, simerr, ruby.stats) so that
test output diffs should not be cluttered with irrelevant
changes. There are a few stats.txt updates too, but
they are in the minority.
Diffstat (limited to 'tests/quick/se/00.hello/ref/alpha')
64 files changed, 734 insertions, 467 deletions
diff --git a/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/config.ini index c1097366b..8be59c81c 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/config.ini @@ -8,9 +8,10 @@ time_sync_spin_threshold=100000000 [system] type=System -children=cpu membus physmem +children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain boot_osflags=a -clock=1000 +cache_line_size=64 +clk_domain=system.clk_domain init_param=0 kernel= load_addr_mask=1099511627775 @@ -29,6 +30,11 @@ work_end_exit_count=0 work_item_id=-1 system_port=system.membus.slave[0] +[system.clk_domain] +type=SrcClockDomain +clock=1000 +voltage_domain=system.voltage_domain + [system.cpu] type=InOrderCPU children=branchPred dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload @@ -36,7 +42,7 @@ activity=0 branchPred=system.cpu.branchPred cachePorts=2 checker=Null -clock=500 +clk_domain=system.cpu_clk_domain cpu_id=0 div16Latency=1 div16RepeatRate=1 @@ -66,6 +72,7 @@ multRepeatRate=1 numThreads=1 profile=0 progress_interval=0 +simpoint_start_insts= stageTracing=false stageWidth=4 switched_out=false @@ -84,11 +91,9 @@ RASSize=16 choiceCtrBits=2 choicePredictorSize=8192 globalCtrBits=2 -globalHistoryBits=13 globalPredictorSize=8192 instShiftAmt=2 localCtrBits=2 -localHistoryBits=11 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 @@ -96,10 +101,10 @@ predType=tournament [system.cpu.dcache] type=BaseCache +children=tags addr_ranges=0:18446744073709551615 assoc=2 -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain forward_snoops=true hit_latency=2 is_top_level=true @@ -110,22 +115,31 @@ prefetcher=Null response_latency=2 size=262144 system=system +tags=system.cpu.dcache.tags tgts_per_mshr=20 two_queue=false write_buffers=8 cpu_side=system.cpu.dcache_port mem_side=system.cpu.toL2Bus.slave[1] +[system.cpu.dcache.tags] +type=LRU +assoc=2 +block_size=64 +clk_domain=system.cpu_clk_domain +hit_latency=2 +size=262144 + [system.cpu.dtb] type=AlphaTLB size=64 [system.cpu.icache] type=BaseCache +children=tags addr_ranges=0:18446744073709551615 assoc=2 -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain forward_snoops=true hit_latency=2 is_top_level=true @@ -136,12 +150,21 @@ prefetcher=Null response_latency=2 size=131072 system=system +tags=system.cpu.icache.tags tgts_per_mshr=20 two_queue=false write_buffers=8 cpu_side=system.cpu.icache_port mem_side=system.cpu.toL2Bus.slave[0] +[system.cpu.icache.tags] +type=LRU +assoc=2 +block_size=64 +clk_domain=system.cpu_clk_domain +hit_latency=2 +size=131072 + [system.cpu.interrupts] type=AlphaInterrupts @@ -154,10 +177,10 @@ size=48 [system.cpu.l2cache] type=BaseCache +children=tags addr_ranges=0:18446744073709551615 assoc=8 -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain forward_snoops=true hit_latency=20 is_top_level=false @@ -168,16 +191,24 @@ prefetcher=Null response_latency=20 size=2097152 system=system +tags=system.cpu.l2cache.tags tgts_per_mshr=12 two_queue=false write_buffers=8 cpu_side=system.cpu.toL2Bus.master[0] mem_side=system.membus.slave[1] +[system.cpu.l2cache.tags] +type=LRU +assoc=8 +block_size=64 +clk_domain=system.cpu_clk_domain +hit_latency=20 +size=2097152 + [system.cpu.toL2Bus] type=CoherentBus -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain header_cycles=1 system=system use_default_range=false @@ -196,7 +227,7 @@ egid=100 env= errout=cerr euid=100 -executable=tests/test-progs/hello/bin/alpha/linux/hello +executable=/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello gid=100 input=cin max_stack_size=67108864 @@ -207,10 +238,14 @@ simpoint=0 system=system uid=100 +[system.cpu_clk_domain] +type=SrcClockDomain +clock=500 +voltage_domain=system.voltage_domain + [system.membus] type=CoherentBus -block_size=64 -clock=1000 +clk_domain=system.clk_domain header_cycles=1 system=system use_default_range=false @@ -221,19 +256,24 @@ slave=system.system_port system.cpu.l2cache.mem_side [system.physmem] type=SimpleDRAM activation_limit=4 -addr_mapping=openmap +addr_mapping=RaBaChCo banks_per_rank=8 +burst_length=8 channels=1 -clock=1000 -conf_table_reported=false +clk_domain=system.clk_domain +conf_table_reported=true +device_bus_width=8 +device_rowbuffer_size=1024 +devices_per_rank=8 in_addr_map=true -lines_per_rowbuffer=32 mem_sched_policy=frfcfs null=false page_policy=open range=0:134217727 ranks_per_channel=2 read_buffer_size=32 +static_backend_latency=10000 +static_frontend_latency=10000 tBURST=5000 tCL=13750 tRCD=13750 @@ -244,6 +284,9 @@ tWTR=7500 tXAW=40000 write_buffer_size=32 write_thresh_perc=70 -zero=false port=system.membus.master[0] +[system.voltage_domain] +type=VoltageDomain +voltage=1.000000 + diff --git a/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/simout b/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/simout index fa2cf12dd..b50e34b75 100755 --- a/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/simout +++ b/tests/quick/se/00.hello/ref/alpha/linux/inorder-timing/simout @@ -3,12 +3,12 @@ Redirecting stderr to build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/inorde gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jan 23 2013 13:29:14 -gem5 started Jan 23 2013 14:17:23 -gem5 executing on ribera.cs.wisc.edu +gem5 compiled Sep 24 2013 03:08:53 +gem5 started Sep 28 2013 03:05:26 +gem5 executing on zizzer command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/inorder-timing -re tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/inorder-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... info: Increasing stack size by one page. Hello world! -Exiting @ tick 18737000 because target called exit() +Exiting @ tick 25046000 because target called exit() diff --git a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/config.ini index 765a5ac14..dce50f688 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/config.ini @@ -8,9 +8,10 @@ time_sync_spin_threshold=100000000 [system] type=System -children=cpu membus physmem +children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain boot_osflags=a -clock=1000 +cache_line_size=64 +clk_domain=system.clk_domain init_param=0 kernel= load_addr_mask=1099511627775 @@ -29,6 +30,11 @@ work_end_exit_count=0 work_item_id=-1 system_port=system.membus.slave[0] +[system.clk_domain] +type=SrcClockDomain +clock=1000 +voltage_domain=system.voltage_domain + [system.cpu] type=DerivO3CPU children=branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer workload @@ -43,7 +49,7 @@ backComSize=5 branchPred=system.cpu.branchPred cachePorts=200 checker=Null -clock=500 +clk_domain=system.cpu_clk_domain commitToDecodeDelay=1 commitToFetchDelay=1 commitToIEWDelay=1 @@ -92,6 +98,7 @@ renameToFetchDelay=1 renameToIEWDelay=2 renameToROBDelay=1 renameWidth=8 +simpoint_start_insts= smtCommitPolicy=RoundRobin smtFetchPolicy=SingleThread smtIQPolicy=Partitioned @@ -121,11 +128,9 @@ RASSize=16 choiceCtrBits=2 choicePredictorSize=8192 globalCtrBits=2 -globalHistoryBits=13 globalPredictorSize=8192 instShiftAmt=2 localCtrBits=2 -localHistoryBits=11 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 @@ -133,10 +138,10 @@ predType=tournament [system.cpu.dcache] type=BaseCache +children=tags addr_ranges=0:18446744073709551615 assoc=2 -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain forward_snoops=true hit_latency=2 is_top_level=true @@ -147,12 +152,21 @@ prefetcher=Null response_latency=2 size=262144 system=system +tags=system.cpu.dcache.tags tgts_per_mshr=20 two_queue=false write_buffers=8 cpu_side=system.cpu.dcache_port mem_side=system.cpu.toL2Bus.slave[1] +[system.cpu.dcache.tags] +type=LRU +assoc=2 +block_size=64 +clk_domain=system.cpu_clk_domain +hit_latency=2 +size=262144 + [system.cpu.dtb] type=AlphaTLB size=64 @@ -422,10 +436,10 @@ opLat=3 [system.cpu.icache] type=BaseCache +children=tags addr_ranges=0:18446744073709551615 assoc=2 -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain forward_snoops=true hit_latency=2 is_top_level=true @@ -436,12 +450,21 @@ prefetcher=Null response_latency=2 size=131072 system=system +tags=system.cpu.icache.tags tgts_per_mshr=20 two_queue=false write_buffers=8 cpu_side=system.cpu.icache_port mem_side=system.cpu.toL2Bus.slave[0] +[system.cpu.icache.tags] +type=LRU +assoc=2 +block_size=64 +clk_domain=system.cpu_clk_domain +hit_latency=2 +size=131072 + [system.cpu.interrupts] type=AlphaInterrupts @@ -454,10 +477,10 @@ size=48 [system.cpu.l2cache] type=BaseCache +children=tags addr_ranges=0:18446744073709551615 assoc=8 -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain forward_snoops=true hit_latency=20 is_top_level=false @@ -468,16 +491,24 @@ prefetcher=Null response_latency=20 size=2097152 system=system +tags=system.cpu.l2cache.tags tgts_per_mshr=12 two_queue=false write_buffers=8 cpu_side=system.cpu.toL2Bus.master[0] mem_side=system.membus.slave[1] +[system.cpu.l2cache.tags] +type=LRU +assoc=8 +block_size=64 +clk_domain=system.cpu_clk_domain +hit_latency=20 +size=2097152 + [system.cpu.toL2Bus] type=CoherentBus -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain header_cycles=1 system=system use_default_range=false @@ -496,7 +527,7 @@ egid=100 env= errout=cerr euid=100 -executable=tests/test-progs/hello/bin/alpha/linux/hello +executable=/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello gid=100 input=cin max_stack_size=67108864 @@ -507,10 +538,14 @@ simpoint=0 system=system uid=100 +[system.cpu_clk_domain] +type=SrcClockDomain +clock=500 +voltage_domain=system.voltage_domain + [system.membus] type=CoherentBus -block_size=64 -clock=1000 +clk_domain=system.clk_domain header_cycles=1 system=system use_default_range=false @@ -521,19 +556,24 @@ slave=system.system_port system.cpu.l2cache.mem_side [system.physmem] type=SimpleDRAM activation_limit=4 -addr_mapping=openmap +addr_mapping=RaBaChCo banks_per_rank=8 +burst_length=8 channels=1 -clock=1000 -conf_table_reported=false +clk_domain=system.clk_domain +conf_table_reported=true +device_bus_width=8 +device_rowbuffer_size=1024 +devices_per_rank=8 in_addr_map=true -lines_per_rowbuffer=32 mem_sched_policy=frfcfs null=false page_policy=open range=0:134217727 ranks_per_channel=2 read_buffer_size=32 +static_backend_latency=10000 +static_frontend_latency=10000 tBURST=5000 tCL=13750 tRCD=13750 @@ -544,6 +584,9 @@ tWTR=7500 tXAW=40000 write_buffer_size=32 write_thresh_perc=70 -zero=false port=system.membus.master[0] +[system.voltage_domain] +type=VoltageDomain +voltage=1.000000 + diff --git a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/simout b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/simout index 800d8e238..ab8450b87 100755 --- a/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/simout +++ b/tests/quick/se/00.hello/ref/alpha/linux/o3-timing/simout @@ -3,12 +3,12 @@ Redirecting stderr to build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/o3-tim gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Mar 26 2013 14:38:52 -gem5 started Mar 26 2013 14:39:12 -gem5 executing on ribera.cs.wisc.edu +gem5 compiled Sep 24 2013 03:08:53 +gem5 started Sep 28 2013 03:05:26 +gem5 executing on zizzer command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/o3-timing -re tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/o3-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... info: Increasing stack size by one page. Hello world! -Exiting @ tick 16032500 because target called exit() +Exiting @ tick 20671000 because target called exit() diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-atomic/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/simple-atomic/config.ini index 38823b11f..3d9687a29 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-atomic/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-atomic/config.ini @@ -8,9 +8,10 @@ time_sync_spin_threshold=100000000 [system] type=System -children=cpu membus physmem +children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain boot_osflags=a -clock=1000 +cache_line_size=64 +clk_domain=system.clk_domain init_param=0 kernel= load_addr_mask=1099511627775 @@ -29,12 +30,16 @@ work_end_exit_count=0 work_item_id=-1 system_port=system.membus.slave[0] +[system.clk_domain] +type=SrcClockDomain +clock=1000 +voltage_domain=system.voltage_domain + [system.cpu] type=AtomicSimpleCPU children=dtb interrupts isa itb tracer workload -branchPred=Null checker=Null -clock=500 +clk_domain=system.cpu_clk_domain cpu_id=0 do_checkpoint_insts=true do_quiesce=true @@ -53,6 +58,10 @@ max_loads_any_thread=0 numThreads=1 profile=0 progress_interval=0 +simpoint_interval=100000000 +simpoint_profile=false +simpoint_profile_file=simpoint.bb.gz +simpoint_start_insts= simulate_data_stalls=false simulate_inst_stalls=false switched_out=false @@ -88,7 +97,7 @@ egid=100 env= errout=cerr euid=100 -executable=tests/test-progs/hello/bin/alpha/linux/hello +executable=/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello gid=100 input=cin max_stack_size=67108864 @@ -99,11 +108,16 @@ simpoint=0 system=system uid=100 +[system.cpu_clk_domain] +type=SrcClockDomain +clock=500 +voltage_domain=system.voltage_domain + [system.membus] type=CoherentBus -block_size=64 -clock=1000 +clk_domain=system.clk_domain header_cycles=1 +system=system use_default_range=false width=8 master=system.physmem.port @@ -112,13 +126,16 @@ slave=system.system_port system.cpu.icache_port system.cpu.dcache_port [system.physmem] type=SimpleMemory bandwidth=73.000000 -clock=1000 -conf_table_reported=false +clk_domain=system.clk_domain +conf_table_reported=true in_addr_map=true latency=30000 latency_var=0 null=false range=0:134217727 -zero=false port=system.membus.master[0] +[system.voltage_domain] +type=VoltageDomain +voltage=1.000000 + diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-atomic/simout b/tests/quick/se/00.hello/ref/alpha/linux/simple-atomic/simout index dc9014a9b..1fb01db1e 100755 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-atomic/simout +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-atomic/simout @@ -3,9 +3,9 @@ Redirecting stderr to build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jan 23 2013 13:29:14 -gem5 started Jan 23 2013 13:33:24 -gem5 executing on ribera.cs.wisc.edu +gem5 compiled Sep 24 2013 03:08:53 +gem5 started Sep 28 2013 03:05:26 +gem5 executing on zizzer command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-atomic -re tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-atomic Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/config.ini index 4a9baa29b..90c3ec168 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/config.ini @@ -38,7 +38,6 @@ voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=clk_domain dtb interrupts isa itb tracer workload -branchPred=Null checker=Null clk_domain=system.cpu.clk_domain cpu_id=0 @@ -96,7 +95,7 @@ egid=100 env= errout=cerr euid=100 -executable=tests/test-progs/hello/bin/alpha/linux/hello +executable=/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello gid=100 input=cin max_stack_size=67108864 diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/ruby.stats b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/ruby.stats index 49b667e6c..11de6c024 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/ruby.stats +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/ruby.stats @@ -1,24 +1,24 @@ -Real time: Aug/29/2013 10:03:49 +Real time: Sep/22/2013 05:27:18 Profiler Stats -------------- -Elapsed_time_in_seconds: 8 -Elapsed_time_in_minutes: 0.133333 -Elapsed_time_in_hours: 0.00222222 -Elapsed_time_in_days: 9.25926e-05 +Elapsed_time_in_seconds: 6 +Elapsed_time_in_minutes: 0.1 +Elapsed_time_in_hours: 0.00166667 +Elapsed_time_in_days: 6.94444e-05 -Virtual_time_in_seconds: 0.65 -Virtual_time_in_minutes: 0.0108333 -Virtual_time_in_hours: 0.000180556 -Virtual_time_in_days: 7.52315e-06 +Virtual_time_in_seconds: 0.5 +Virtual_time_in_minutes: 0.00833333 +Virtual_time_in_hours: 0.000138889 +Virtual_time_in_days: 5.78704e-06 Ruby_current_time: 138616 Ruby_start_time: 0 Ruby_cycles: 138616 -mbytes_resident: 76.7812 -mbytes_total: 170.938 -resident_ratio: 0.4492 +mbytes_resident: 70.7109 +mbytes_total: 125.152 +resident_ratio: 0.564999 Busy Controller Counts: L1Cache-0:0 diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simerr b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simerr index e45cd058f..bbc0c797e 100755 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simerr +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simerr @@ -1,2 +1,6 @@ +warn: rounding error > tolerance + 0.072760 rounded to 0 +warn: rounding error > tolerance + 0.072760 rounded to 0 warn: Sockets disabled, not accepting gdb connections hack: be nice to actually delete the event here diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simout b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simout index 226bed9cc..5fac9bcf7 100755 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simout +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/simout @@ -3,9 +3,9 @@ Redirecting stderr to build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/00.hello gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 1 2012 14:01:54 -gem5 started Sep 1 2012 14:02:52 -gem5 executing on doudou.cs.wisc.edu +gem5 compiled Sep 22 2013 05:27:02 +gem5 started Sep 22 2013 05:27:12 +gem5 executing on zizzer command line: build/ALPHA_MESI_CMP_directory/gem5.opt -d build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MESI_CMP_directory -re tests/run.py build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MESI_CMP_directory Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/stats.txt b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/stats.txt index 966ab8ba5..5c3b6f3c7 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MESI_CMP_directory/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000139 # Nu sim_ticks 138616 # Number of ticks simulated final_tick 138616 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 871 # Simulator instruction rate (inst/s) -host_op_rate 871 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 18892 # Simulator tick rate (ticks/s) -host_mem_usage 175044 # Number of bytes of host memory used -host_seconds 7.34 # Real time elapsed on the host +host_inst_rate 1056 # Simulator instruction rate (inst/s) +host_op_rate 1056 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 22900 # Simulator tick rate (ticks/s) +host_mem_usage 128160 # Number of bytes of host memory used +host_seconds 6.05 # Real time elapsed on the host sim_insts 6390 # Number of instructions simulated sim_ops 6390 # Number of ops (including micro ops) simulated system.ruby.l1_cntrl0.L1Dcache.demand_hits 1249 # Number of cache demand hits @@ -101,6 +101,18 @@ system.ruby.network.routers3.msg_bytes.Response_Control::2 6392 system.ruby.network.routers3.msg_bytes.Writeback_Data::0 10584 system.ruby.network.routers3.msg_bytes.Writeback_Data::1 10152 system.ruby.network.routers3.msg_bytes.Writeback_Control::0 2312 +system.ruby.network.msg_count.Control 8850 +system.ruby.network.msg_count.Request_Control 3123 +system.ruby.network.msg_count.Response_Data 9681 +system.ruby.network.msg_count.Response_Control 14286 +system.ruby.network.msg_count.Writeback_Data 864 +system.ruby.network.msg_count.Writeback_Control 867 +system.ruby.network.msg_byte.Control 70800 +system.ruby.network.msg_byte.Request_Control 24984 +system.ruby.network.msg_byte.Response_Data 697032 +system.ruby.network.msg_byte.Response_Control 114288 +system.ruby.network.msg_byte.Writeback_Data 62208 +system.ruby.network.msg_byte.Writeback_Control 6936 system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses system.cpu.dtb.fetch_acv 0 # ITB acv @@ -272,18 +284,6 @@ system.ruby.l1_cntrl0.IS.Data_Exclusive 583 0.00% 0.00% system.ruby.l1_cntrl0.IS.Data_all_Acks 691 0.00% 0.00% system.ruby.l1_cntrl0.IM.Data_all_Acks 216 0.00% 0.00% system.ruby.l1_cntrl0.M_I.WB_Ack 436 0.00% 0.00% -system.ruby.network.msg_count.Control 8850 -system.ruby.network.msg_count.Request_Control 3123 -system.ruby.network.msg_count.Response_Data 9681 -system.ruby.network.msg_count.Response_Control 14286 -system.ruby.network.msg_count.Writeback_Data 864 -system.ruby.network.msg_count.Writeback_Control 867 -system.ruby.network.msg_byte.Control 70800 -system.ruby.network.msg_byte.Request_Control 24984 -system.ruby.network.msg_byte.Response_Data 697032 -system.ruby.network.msg_byte.Response_Control 114288 -system.ruby.network.msg_byte.Writeback_Data 62208 -system.ruby.network.msg_byte.Writeback_Control 6936 system.ruby.l2_cntrl0.L1_GET_INSTR 691 0.00% 0.00% system.ruby.l2_cntrl0.L1_GETS 583 0.00% 0.00% system.ruby.l2_cntrl0.L1_GETX 216 0.00% 0.00% diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/config.ini index e1b2b2ccf..454f386da 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/config.ini @@ -38,7 +38,6 @@ voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=clk_domain dtb interrupts isa itb tracer workload -branchPred=Null checker=Null clk_domain=system.cpu.clk_domain cpu_id=0 @@ -96,7 +95,7 @@ egid=100 env= errout=cerr euid=100 -executable=tests/test-progs/hello/bin/alpha/linux/hello +executable=/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello gid=100 input=cin max_stack_size=67108864 diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/ruby.stats b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/ruby.stats index 94f281262..f796e6d64 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/ruby.stats +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/ruby.stats @@ -1,4 +1,4 @@ -Real time: Aug/29/2013 10:04:57 +Real time: Sep/22/2013 05:36:35 Profiler Stats -------------- @@ -7,18 +7,18 @@ Elapsed_time_in_minutes: 0.0166667 Elapsed_time_in_hours: 0.000277778 Elapsed_time_in_days: 1.15741e-05 -Virtual_time_in_seconds: 0.74 -Virtual_time_in_minutes: 0.0123333 -Virtual_time_in_hours: 0.000205556 -Virtual_time_in_days: 8.56481e-06 +Virtual_time_in_seconds: 0.52 +Virtual_time_in_minutes: 0.00866667 +Virtual_time_in_hours: 0.000144444 +Virtual_time_in_days: 6.01852e-06 Ruby_current_time: 117611 Ruby_start_time: 0 Ruby_cycles: 117611 -mbytes_resident: 78.3398 -mbytes_total: 172.082 -resident_ratio: 0.45527 +mbytes_resident: 72.1758 +mbytes_total: 126.289 +resident_ratio: 0.571513 Busy Controller Counts: L1Cache-0:0 diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/simerr b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/simerr index e45cd058f..bbc0c797e 100755 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/simerr +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/simerr @@ -1,2 +1,6 @@ +warn: rounding error > tolerance + 0.072760 rounded to 0 +warn: rounding error > tolerance + 0.072760 rounded to 0 warn: Sockets disabled, not accepting gdb connections hack: be nice to actually delete the event here diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/simout b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/simout index 0b27bcc43..7aebf91e4 100755 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/simout +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/simout @@ -3,9 +3,9 @@ Redirecting stderr to build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hell gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 1 2012 14:10:16 -gem5 started Sep 1 2012 14:11:17 -gem5 executing on doudou.cs.wisc.edu +gem5 compiled Sep 22 2013 05:36:12 +gem5 started Sep 22 2013 05:36:34 +gem5 executing on zizzer command line: build/ALPHA_MOESI_CMP_directory/gem5.opt -d build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_directory -re tests/run.py build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_directory Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/stats.txt b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/stats.txt index 3af3398f7..a243c0ad3 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_directory/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000118 # Nu sim_ticks 117611 # Number of ticks simulated final_tick 117611 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 19051 # Simulator instruction rate (inst/s) -host_op_rate 19050 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 350596 # Simulator tick rate (ticks/s) -host_mem_usage 176216 # Number of bytes of host memory used -host_seconds 0.34 # Real time elapsed on the host +host_inst_rate 22489 # Simulator instruction rate (inst/s) +host_op_rate 22487 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 413867 # Simulator tick rate (ticks/s) +host_mem_usage 129324 # Number of bytes of host memory used +host_seconds 0.28 # Real time elapsed on the host sim_insts 6390 # Number of instructions simulated sim_ops 6390 # Number of ops (including micro ops) simulated system.ruby.l1_cntrl0.L1Dcache.demand_hits 1332 # Number of cache demand hits @@ -98,6 +98,18 @@ system.ruby.network.routers3.msg_bytes.Writeback_Control::0 21664 system.ruby.network.routers3.msg_bytes.Writeback_Control::1 17488 system.ruby.network.routers3.msg_bytes.Writeback_Control::2 7192 system.ruby.network.routers3.msg_bytes.Unblock_Control::2 19768 +system.ruby.network.msg_count.Request_Control 7413 +system.ruby.network.msg_count.Response_Data 6654 +system.ruby.network.msg_count.ResponseL2hit_Data 759 +system.ruby.network.msg_count.Writeback_Data 4644 +system.ruby.network.msg_count.Writeback_Control 17379 +system.ruby.network.msg_count.Unblock_Control 7413 +system.ruby.network.msg_byte.Request_Control 59304 +system.ruby.network.msg_byte.Response_Data 479088 +system.ruby.network.msg_byte.ResponseL2hit_Data 54648 +system.ruby.network.msg_byte.Writeback_Data 334368 +system.ruby.network.msg_byte.Writeback_Control 139032 +system.ruby.network.msg_byte.Unblock_Control 59304 system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses system.cpu.dtb.fetch_acv 0 # ITB acv @@ -277,18 +289,6 @@ system.ruby.l1_cntrl0.IM.Exclusive_Data 191 0.00% 0.00% system.ruby.l1_cntrl0.OM.All_acks 191 0.00% 0.00% system.ruby.l1_cntrl0.IS.Exclusive_Data 1171 0.00% 0.00% system.ruby.l1_cntrl0.MI.Writeback_Ack_Data 1354 0.00% 0.00% -system.ruby.network.msg_count.Request_Control 7413 -system.ruby.network.msg_count.Response_Data 6654 -system.ruby.network.msg_count.ResponseL2hit_Data 759 -system.ruby.network.msg_count.Writeback_Data 4644 -system.ruby.network.msg_count.Writeback_Control 17379 -system.ruby.network.msg_count.Unblock_Control 7413 -system.ruby.network.msg_byte.Request_Control 59304 -system.ruby.network.msg_byte.Response_Data 479088 -system.ruby.network.msg_byte.ResponseL2hit_Data 54648 -system.ruby.network.msg_byte.Writeback_Data 334368 -system.ruby.network.msg_byte.Writeback_Control 139032 -system.ruby.network.msg_byte.Unblock_Control 59304 system.ruby.l2_cntrl0.L1_GETS 1171 0.00% 0.00% system.ruby.l2_cntrl0.L1_GETX 191 0.00% 0.00% system.ruby.l2_cntrl0.L1_PUTX 1354 0.00% 0.00% diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/config.ini index 5bdc495d8..98cbeddd9 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/config.ini @@ -38,7 +38,6 @@ voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=clk_domain dtb interrupts isa itb tracer workload -branchPred=Null checker=Null clk_domain=system.cpu.clk_domain cpu_id=0 @@ -96,7 +95,7 @@ egid=100 env= errout=cerr euid=100 -executable=tests/test-progs/hello/bin/alpha/linux/hello +executable=/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello gid=100 input=cin max_stack_size=67108864 diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/ruby.stats b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/ruby.stats index 442dd3499..878f29081 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/ruby.stats +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/ruby.stats @@ -1,24 +1,24 @@ -Real time: Aug/29/2013 10:04:43 +Real time: Sep/22/2013 05:45:04 Profiler Stats -------------- -Elapsed_time_in_seconds: 1 -Elapsed_time_in_minutes: 0.0166667 -Elapsed_time_in_hours: 0.000277778 -Elapsed_time_in_days: 1.15741e-05 +Elapsed_time_in_seconds: 4 +Elapsed_time_in_minutes: 0.0666667 +Elapsed_time_in_hours: 0.00111111 +Elapsed_time_in_days: 4.62963e-05 -Virtual_time_in_seconds: 0.6 -Virtual_time_in_minutes: 0.01 -Virtual_time_in_hours: 0.000166667 -Virtual_time_in_days: 6.94444e-06 +Virtual_time_in_seconds: 0.44 +Virtual_time_in_minutes: 0.00733333 +Virtual_time_in_hours: 0.000122222 +Virtual_time_in_days: 5.09259e-06 Ruby_current_time: 113627 Ruby_start_time: 0 Ruby_cycles: 113627 -mbytes_resident: 75.7461 -mbytes_total: 170.031 -resident_ratio: 0.445506 +mbytes_resident: 69.5977 +mbytes_total: 124.223 +resident_ratio: 0.560265 Busy Controller Counts: L1Cache-0:0 diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/simerr b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/simerr index e45cd058f..bbc0c797e 100755 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/simerr +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/simerr @@ -1,2 +1,6 @@ +warn: rounding error > tolerance + 0.072760 rounded to 0 +warn: rounding error > tolerance + 0.072760 rounded to 0 warn: Sockets disabled, not accepting gdb connections hack: be nice to actually delete the event here diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/simout b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/simout index c5809ae71..972ce6ed2 100755 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/simout +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/simout @@ -3,9 +3,9 @@ Redirecting stderr to build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/al gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 9 2012 13:38:07 -gem5 started Sep 9 2012 13:38:15 -gem5 executing on ribera.cs.wisc.edu +gem5 compiled Sep 22 2013 05:44:48 +gem5 started Sep 22 2013 05:44:59 +gem5 executing on zizzer command line: build/ALPHA_MOESI_CMP_token/gem5.opt -d build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_token -re tests/run.py build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_CMP_token Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/stats.txt b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/stats.txt index be82f1052..da21a8b1c 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_CMP_token/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000114 # Nu sim_ticks 113627 # Number of ticks simulated final_tick 113627 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 27885 # Simulator instruction rate (inst/s) -host_op_rate 27883 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 495765 # Simulator tick rate (ticks/s) -host_mem_usage 174116 # Number of bytes of host memory used -host_seconds 0.23 # Real time elapsed on the host +host_inst_rate 1471 # Simulator instruction rate (inst/s) +host_op_rate 1471 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 26154 # Simulator tick rate (ticks/s) +host_mem_usage 127208 # Number of bytes of host memory used +host_seconds 4.34 # Real time elapsed on the host sim_insts 6390 # Number of instructions simulated sim_ops 6390 # Number of ops (including micro ops) simulated system.ruby.l1_cntrl0.L1Dcache.demand_hits 1312 # Number of cache demand hits @@ -82,6 +82,18 @@ system.ruby.network.routers3.msg_bytes.ResponseL2hit_Data::4 14688 system.ruby.network.routers3.msg_bytes.Response_Control::4 8 system.ruby.network.routers3.msg_bytes.Writeback_Data::4 113976 system.ruby.network.routers3.msg_bytes.Writeback_Control::4 7736 +system.ruby.network.msg_count.Request_Control 7731 +system.ruby.network.msg_count.Response_Data 3534 +system.ruby.network.msg_count.ResponseL2hit_Data 612 +system.ruby.network.msg_count.Response_Control 3 +system.ruby.network.msg_count.Writeback_Data 4749 +system.ruby.network.msg_count.Writeback_Control 2901 +system.ruby.network.msg_byte.Request_Control 61848 +system.ruby.network.msg_byte.Response_Data 254448 +system.ruby.network.msg_byte.ResponseL2hit_Data 44064 +system.ruby.network.msg_byte.Response_Control 24 +system.ruby.network.msg_byte.Writeback_Data 341928 +system.ruby.network.msg_byte.Writeback_Control 23208 system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses system.cpu.dtb.fetch_acv 0 # ITB acv @@ -230,18 +242,6 @@ system.ruby.l1_cntrl0.IM.Ack 1 0.00% 0.00% system.ruby.l1_cntrl0.SM.Data_All_Tokens 20 0.00% 0.00% system.ruby.l1_cntrl0.IS.Data_Shared 161 0.00% 0.00% system.ruby.l1_cntrl0.IS.Data_All_Tokens 1010 0.00% 0.00% -system.ruby.network.msg_count.Request_Control 7731 -system.ruby.network.msg_count.Response_Data 3534 -system.ruby.network.msg_count.ResponseL2hit_Data 612 -system.ruby.network.msg_count.Response_Control 3 -system.ruby.network.msg_count.Writeback_Data 4749 -system.ruby.network.msg_count.Writeback_Control 2901 -system.ruby.network.msg_byte.Request_Control 61848 -system.ruby.network.msg_byte.Response_Data 254448 -system.ruby.network.msg_byte.ResponseL2hit_Data 44064 -system.ruby.network.msg_byte.Response_Control 24 -system.ruby.network.msg_byte.Writeback_Data 341928 -system.ruby.network.msg_byte.Writeback_Control 23208 system.ruby.l2_cntrl0.L1_GETS 1122 0.00% 0.00% system.ruby.l2_cntrl0.L1_GETS_Last_Token 49 0.00% 0.00% system.ruby.l2_cntrl0.L1_GETX 211 0.00% 0.00% diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/config.ini index 0bd814b7d..5efa528b0 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/config.ini @@ -38,7 +38,6 @@ voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=clk_domain dtb interrupts isa itb tracer workload -branchPred=Null checker=Null clk_domain=system.cpu.clk_domain cpu_id=0 @@ -96,7 +95,7 @@ egid=100 env= errout=cerr euid=100 -executable=tests/test-progs/hello/bin/alpha/linux/hello +executable=/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello gid=100 input=cin max_stack_size=67108864 diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/ruby.stats b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/ruby.stats index 167b82c92..23062d8c8 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/ruby.stats +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/ruby.stats @@ -1,24 +1,24 @@ -Real time: Aug/29/2013 10:02:57 +Real time: Sep/22/2013 05:18:00 Profiler Stats -------------- -Elapsed_time_in_seconds: 1 -Elapsed_time_in_minutes: 0.0166667 -Elapsed_time_in_hours: 0.000277778 -Elapsed_time_in_days: 1.15741e-05 +Elapsed_time_in_seconds: 0 +Elapsed_time_in_minutes: 0 +Elapsed_time_in_hours: 0 +Elapsed_time_in_days: 0 -Virtual_time_in_seconds: 0.8 -Virtual_time_in_minutes: 0.0133333 -Virtual_time_in_hours: 0.000222222 -Virtual_time_in_days: 9.25926e-06 +Virtual_time_in_seconds: 0.41 +Virtual_time_in_minutes: 0.00683333 +Virtual_time_in_hours: 0.000113889 +Virtual_time_in_days: 4.74537e-06 Ruby_current_time: 93341 Ruby_start_time: 0 Ruby_cycles: 93341 -mbytes_resident: 75.5039 -mbytes_total: 169.965 -resident_ratio: 0.444255 +mbytes_resident: 69.2852 +mbytes_total: 124.195 +resident_ratio: 0.557873 Busy Controller Counts: L1Cache-0:0 diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/simerr b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/simerr index e45cd058f..bbc0c797e 100755 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/simerr +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/simerr @@ -1,2 +1,6 @@ +warn: rounding error > tolerance + 0.072760 rounded to 0 +warn: rounding error > tolerance + 0.072760 rounded to 0 warn: Sockets disabled, not accepting gdb connections hack: be nice to actually delete the event here diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/simout b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/simout index d752652fe..2f946fb64 100755 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/simout +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/simout @@ -3,9 +3,9 @@ Redirecting stderr to build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 1 2012 13:53:26 -gem5 started Sep 1 2012 13:54:22 -gem5 executing on doudou.cs.wisc.edu +gem5 compiled Sep 22 2013 05:17:28 +gem5 started Sep 22 2013 05:18:00 +gem5 executing on zizzer command line: build/ALPHA_MOESI_hammer/gem5.opt -d build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_hammer -re tests/run.py build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby-MOESI_hammer Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/stats.txt b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/stats.txt index 0558d3744..2decdb14a 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby-MOESI_hammer/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000093 # Nu sim_ticks 93341 # Number of ticks simulated final_tick 93341 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 19138 # Simulator instruction rate (inst/s) -host_op_rate 19136 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 279518 # Simulator tick rate (ticks/s) -host_mem_usage 174048 # Number of bytes of host memory used -host_seconds 0.33 # Real time elapsed on the host +host_inst_rate 35131 # Simulator instruction rate (inst/s) +host_op_rate 35128 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 513083 # Simulator tick rate (ticks/s) +host_mem_usage 127180 # Number of bytes of host memory used +host_seconds 0.18 # Real time elapsed on the host sim_insts 6390 # Number of instructions simulated sim_ops 6390 # Number of ops (including micro ops) simulated system.ruby.l1_cntrl0.L1Dcache.demand_hits 1332 # Number of cache demand hits @@ -83,6 +83,16 @@ system.ruby.network.routers2.msg_bytes.Writeback_Control::2 9144 system.ruby.network.routers2.msg_bytes.Writeback_Control::3 9144 system.ruby.network.routers2.msg_bytes.Writeback_Control::5 7384 system.ruby.network.routers2.msg_bytes.Unblock_Control::5 9272 +system.ruby.network.msg_count.Request_Control 3477 +system.ruby.network.msg_count.Response_Data 3477 +system.ruby.network.msg_count.Writeback_Data 660 +system.ruby.network.msg_count.Writeback_Control 9627 +system.ruby.network.msg_count.Unblock_Control 3477 +system.ruby.network.msg_byte.Request_Control 27816 +system.ruby.network.msg_byte.Response_Data 250344 +system.ruby.network.msg_byte.Writeback_Data 47520 +system.ruby.network.msg_byte.Writeback_Control 77016 +system.ruby.network.msg_byte.Unblock_Control 27816 system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses system.cpu.dtb.fetch_acv 0 # ITB acv @@ -227,16 +237,6 @@ system.ruby.l1_cntrl0.MI.Store 27 0.00% 0.00% system.ruby.l1_cntrl0.MI.Writeback_Ack 1143 0.00% 0.00% system.ruby.l1_cntrl0.MT.Complete_L2_to_L1 133 0.00% 0.00% system.ruby.l1_cntrl0.MMT.Complete_L2_to_L1 70 0.00% 0.00% -system.ruby.network.msg_count.Request_Control 3477 -system.ruby.network.msg_count.Response_Data 3477 -system.ruby.network.msg_count.Writeback_Data 660 -system.ruby.network.msg_count.Writeback_Control 9627 -system.ruby.network.msg_count.Unblock_Control 3477 -system.ruby.network.msg_byte.Request_Control 27816 -system.ruby.network.msg_byte.Response_Data 250344 -system.ruby.network.msg_byte.Writeback_Data 47520 -system.ruby.network.msg_byte.Writeback_Control 77016 -system.ruby.network.msg_byte.Unblock_Control 27816 system.ruby.dir_cntrl0.GETX 186 0.00% 0.00% system.ruby.dir_cntrl0.GETS 1022 0.00% 0.00% system.ruby.dir_cntrl0.PUT 1143 0.00% 0.00% diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/config.ini index 3473bb901..5c6bf177e 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/config.ini @@ -38,7 +38,6 @@ voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=clk_domain dtb interrupts isa itb tracer workload -branchPred=Null checker=Null clk_domain=system.cpu.clk_domain cpu_id=0 @@ -96,7 +95,7 @@ egid=100 env= errout=cerr euid=100 -executable=tests/test-progs/hello/bin/alpha/linux/hello +executable=/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello gid=100 input=cin max_stack_size=67108864 diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats index 92d7e563b..07bf20a9b 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/ruby.stats @@ -1,24 +1,24 @@ -Real time: Aug/29/2013 10:03:31 +Real time: Sep/28/2013 03:05:29 Profiler Stats -------------- -Elapsed_time_in_seconds: 0 -Elapsed_time_in_minutes: 0 -Elapsed_time_in_hours: 0 -Elapsed_time_in_days: 0 +Elapsed_time_in_seconds: 1 +Elapsed_time_in_minutes: 0.0166667 +Elapsed_time_in_hours: 0.000277778 +Elapsed_time_in_days: 1.15741e-05 -Virtual_time_in_seconds: 0.61 -Virtual_time_in_minutes: 0.0101667 -Virtual_time_in_hours: 0.000169444 -Virtual_time_in_days: 7.06019e-06 +Virtual_time_in_seconds: 0.43 +Virtual_time_in_minutes: 0.00716667 +Virtual_time_in_hours: 0.000119444 +Virtual_time_in_days: 4.97685e-06 Ruby_current_time: 143853 Ruby_start_time: 0 Ruby_cycles: 143853 -mbytes_resident: 75.2305 -mbytes_total: 169.531 -resident_ratio: 0.443779 +mbytes_resident: 69.0312 +mbytes_total: 123.75 +resident_ratio: 0.557828 Busy Controller Counts: L1Cache-0:0 diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/simerr b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/simerr index 5da3f0737..bbc0c797e 100755 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/simerr +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/simerr @@ -1,6 +1,6 @@ -Warning: rounding error > tolerance +warn: rounding error > tolerance 0.072760 rounded to 0 -Warning: rounding error > tolerance +warn: rounding error > tolerance 0.072760 rounded to 0 warn: Sockets disabled, not accepting gdb connections hack: be nice to actually delete the event here diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/simout b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/simout index 070ea92d3..cedef1822 100755 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/simout +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/simout @@ -3,9 +3,9 @@ Redirecting stderr to build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jan 23 2013 13:29:14 -gem5 started Jan 23 2013 13:45:23 -gem5 executing on ribera.cs.wisc.edu +gem5 compiled Sep 24 2013 03:08:53 +gem5 started Sep 28 2013 03:05:27 +gem5 executing on zizzer command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby -re tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing-ruby Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt index 8d6d3a37f..c8df30ebb 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000144 # Nu sim_ticks 143853 # Number of ticks simulated final_tick 143853 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 32139 # Simulator instruction rate (inst/s) -host_op_rate 32136 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 723384 # Simulator tick rate (ticks/s) -host_mem_usage 173604 # Number of bytes of host memory used -host_seconds 0.20 # Real time elapsed on the host +host_inst_rate 29196 # Simulator instruction rate (inst/s) +host_op_rate 29194 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 657174 # Simulator tick rate (ticks/s) +host_mem_usage 126724 # Number of bytes of host memory used +host_seconds 0.22 # Real time elapsed on the host sim_insts 6390 # Number of instructions simulated sim_ops 6390 # Number of ops (including micro ops) simulated system.ruby.l1_cntrl0.cacheMemory.demand_hits 6718 # Number of cache demand hits @@ -56,6 +56,14 @@ system.ruby.network.routers2.msg_bytes.Control::2 13840 system.ruby.network.routers2.msg_bytes.Data::2 124272 system.ruby.network.routers2.msg_bytes.Response_Data::4 124560 system.ruby.network.routers2.msg_bytes.Writeback_Control::3 13808 +system.ruby.network.msg_count.Control 5190 +system.ruby.network.msg_count.Data 5178 +system.ruby.network.msg_count.Response_Data 5190 +system.ruby.network.msg_count.Writeback_Control 5178 +system.ruby.network.msg_byte.Control 41520 +system.ruby.network.msg_byte.Data 372816 +system.ruby.network.msg_byte.Response_Data 373680 +system.ruby.network.msg_byte.Writeback_Control 41424 system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses system.cpu.dtb.fetch_acv 0 # ITB acv @@ -157,14 +165,6 @@ system.ruby.l1_cntrl0.M.Replacement 1726 0.00% 0.00% system.ruby.l1_cntrl0.MI.Writeback_Ack 1726 0.00% 0.00% system.ruby.l1_cntrl0.IS.Data 1457 0.00% 0.00% system.ruby.l1_cntrl0.IM.Data 273 0.00% 0.00% -system.ruby.network.msg_count.Control 5190 -system.ruby.network.msg_count.Data 5178 -system.ruby.network.msg_count.Response_Data 5190 -system.ruby.network.msg_count.Writeback_Control 5178 -system.ruby.network.msg_byte.Control 41520 -system.ruby.network.msg_byte.Data 372816 -system.ruby.network.msg_byte.Response_Data 373680 -system.ruby.network.msg_byte.Writeback_Control 41424 system.ruby.dir_cntrl0.GETX 1730 0.00% 0.00% system.ruby.dir_cntrl0.PUTX 1726 0.00% 0.00% system.ruby.dir_cntrl0.Memory_Data 1730 0.00% 0.00% diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/config.ini b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/config.ini index c41a1c22b..595a8159f 100644 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/config.ini @@ -8,9 +8,10 @@ time_sync_spin_threshold=100000000 [system] type=System -children=cpu membus physmem +children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain boot_osflags=a -clock=1000 +cache_line_size=64 +clk_domain=system.clk_domain init_param=0 kernel= load_addr_mask=1099511627775 @@ -29,12 +30,16 @@ work_end_exit_count=0 work_item_id=-1 system_port=system.membus.slave[0] +[system.clk_domain] +type=SrcClockDomain +clock=1000 +voltage_domain=system.voltage_domain + [system.cpu] type=TimingSimpleCPU children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload -branchPred=Null checker=Null -clock=500 +clk_domain=system.cpu_clk_domain cpu_id=0 do_checkpoint_insts=true do_quiesce=true @@ -52,6 +57,7 @@ max_loads_any_thread=0 numThreads=1 profile=0 progress_interval=0 +simpoint_start_insts= switched_out=false system=system tracer=system.cpu.tracer @@ -61,10 +67,10 @@ icache_port=system.cpu.icache.cpu_side [system.cpu.dcache] type=BaseCache +children=tags addr_ranges=0:18446744073709551615 assoc=2 -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain forward_snoops=true hit_latency=2 is_top_level=true @@ -75,22 +81,31 @@ prefetcher=Null response_latency=2 size=262144 system=system +tags=system.cpu.dcache.tags tgts_per_mshr=20 two_queue=false write_buffers=8 cpu_side=system.cpu.dcache_port mem_side=system.cpu.toL2Bus.slave[1] +[system.cpu.dcache.tags] +type=LRU +assoc=2 +block_size=64 +clk_domain=system.cpu_clk_domain +hit_latency=2 +size=262144 + [system.cpu.dtb] type=AlphaTLB size=64 [system.cpu.icache] type=BaseCache +children=tags addr_ranges=0:18446744073709551615 assoc=2 -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain forward_snoops=true hit_latency=2 is_top_level=true @@ -101,12 +116,21 @@ prefetcher=Null response_latency=2 size=131072 system=system +tags=system.cpu.icache.tags tgts_per_mshr=20 two_queue=false write_buffers=8 cpu_side=system.cpu.icache_port mem_side=system.cpu.toL2Bus.slave[0] +[system.cpu.icache.tags] +type=LRU +assoc=2 +block_size=64 +clk_domain=system.cpu_clk_domain +hit_latency=2 +size=131072 + [system.cpu.interrupts] type=AlphaInterrupts @@ -119,10 +143,10 @@ size=48 [system.cpu.l2cache] type=BaseCache +children=tags addr_ranges=0:18446744073709551615 assoc=8 -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain forward_snoops=true hit_latency=20 is_top_level=false @@ -133,17 +157,26 @@ prefetcher=Null response_latency=20 size=2097152 system=system +tags=system.cpu.l2cache.tags tgts_per_mshr=12 two_queue=false write_buffers=8 cpu_side=system.cpu.toL2Bus.master[0] mem_side=system.membus.slave[1] +[system.cpu.l2cache.tags] +type=LRU +assoc=8 +block_size=64 +clk_domain=system.cpu_clk_domain +hit_latency=20 +size=2097152 + [system.cpu.toL2Bus] type=CoherentBus -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain header_cycles=1 +system=system use_default_range=false width=32 master=system.cpu.l2cache.cpu_side @@ -160,7 +193,7 @@ egid=100 env= errout=cerr euid=100 -executable=tests/test-progs/hello/bin/alpha/linux/hello +executable=/dist/m5/regression/test-progs/hello/bin/alpha/linux/hello gid=100 input=cin max_stack_size=67108864 @@ -171,11 +204,16 @@ simpoint=0 system=system uid=100 +[system.cpu_clk_domain] +type=SrcClockDomain +clock=500 +voltage_domain=system.voltage_domain + [system.membus] type=CoherentBus -block_size=64 -clock=1000 +clk_domain=system.clk_domain header_cycles=1 +system=system use_default_range=false width=8 master=system.physmem.port @@ -184,13 +222,16 @@ slave=system.system_port system.cpu.l2cache.mem_side [system.physmem] type=SimpleMemory bandwidth=73.000000 -clock=1000 -conf_table_reported=false +clk_domain=system.clk_domain +conf_table_reported=true in_addr_map=true latency=30000 latency_var=0 null=false range=0:134217727 -zero=false port=system.membus.master[0] +[system.voltage_domain] +type=VoltageDomain +voltage=1.000000 + diff --git a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/simout b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/simout index fc43aac0c..b5f87b785 100755 --- a/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/simout +++ b/tests/quick/se/00.hello/ref/alpha/linux/simple-timing/simout @@ -3,9 +3,9 @@ Redirecting stderr to build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jan 23 2013 13:29:14 -gem5 started Jan 23 2013 13:45:47 -gem5 executing on ribera.cs.wisc.edu +gem5 compiled Sep 24 2013 03:08:53 +gem5 started Sep 28 2013 03:05:26 +gem5 executing on zizzer command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing -re tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/linux/simple-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/config.ini index 5c71a7c03..c5e8a16e6 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/config.ini @@ -8,9 +8,10 @@ time_sync_spin_threshold=100000000 [system] type=System -children=cpu membus physmem +children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain boot_osflags=a -clock=1000 +cache_line_size=64 +clk_domain=system.clk_domain init_param=0 kernel= load_addr_mask=1099511627775 @@ -29,6 +30,11 @@ work_end_exit_count=0 work_item_id=-1 system_port=system.membus.slave[0] +[system.clk_domain] +type=SrcClockDomain +clock=1000 +voltage_domain=system.voltage_domain + [system.cpu] type=DerivO3CPU children=branchPred dcache dtb fuPool icache interrupts isa itb l2cache toL2Bus tracer workload @@ -43,7 +49,7 @@ backComSize=5 branchPred=system.cpu.branchPred cachePorts=200 checker=Null -clock=500 +clk_domain=system.cpu_clk_domain commitToDecodeDelay=1 commitToFetchDelay=1 commitToIEWDelay=1 @@ -92,6 +98,7 @@ renameToFetchDelay=1 renameToIEWDelay=2 renameToROBDelay=1 renameWidth=8 +simpoint_start_insts= smtCommitPolicy=RoundRobin smtFetchPolicy=SingleThread smtIQPolicy=Partitioned @@ -121,11 +128,9 @@ RASSize=16 choiceCtrBits=2 choicePredictorSize=8192 globalCtrBits=2 -globalHistoryBits=13 globalPredictorSize=8192 instShiftAmt=2 localCtrBits=2 -localHistoryBits=11 localHistoryTableSize=2048 localPredictorSize=2048 numThreads=1 @@ -133,10 +138,10 @@ predType=tournament [system.cpu.dcache] type=BaseCache +children=tags addr_ranges=0:18446744073709551615 assoc=2 -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain forward_snoops=true hit_latency=2 is_top_level=true @@ -147,12 +152,21 @@ prefetcher=Null response_latency=2 size=262144 system=system +tags=system.cpu.dcache.tags tgts_per_mshr=20 two_queue=false write_buffers=8 cpu_side=system.cpu.dcache_port mem_side=system.cpu.toL2Bus.slave[1] +[system.cpu.dcache.tags] +type=LRU +assoc=2 +block_size=64 +clk_domain=system.cpu_clk_domain +hit_latency=2 +size=262144 + [system.cpu.dtb] type=AlphaTLB size=64 @@ -422,10 +436,10 @@ opLat=3 [system.cpu.icache] type=BaseCache +children=tags addr_ranges=0:18446744073709551615 assoc=2 -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain forward_snoops=true hit_latency=2 is_top_level=true @@ -436,12 +450,21 @@ prefetcher=Null response_latency=2 size=131072 system=system +tags=system.cpu.icache.tags tgts_per_mshr=20 two_queue=false write_buffers=8 cpu_side=system.cpu.icache_port mem_side=system.cpu.toL2Bus.slave[0] +[system.cpu.icache.tags] +type=LRU +assoc=2 +block_size=64 +clk_domain=system.cpu_clk_domain +hit_latency=2 +size=131072 + [system.cpu.interrupts] type=AlphaInterrupts @@ -454,10 +477,10 @@ size=48 [system.cpu.l2cache] type=BaseCache +children=tags addr_ranges=0:18446744073709551615 assoc=8 -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain forward_snoops=true hit_latency=20 is_top_level=false @@ -468,16 +491,24 @@ prefetcher=Null response_latency=20 size=2097152 system=system +tags=system.cpu.l2cache.tags tgts_per_mshr=12 two_queue=false write_buffers=8 cpu_side=system.cpu.toL2Bus.master[0] mem_side=system.membus.slave[1] +[system.cpu.l2cache.tags] +type=LRU +assoc=8 +block_size=64 +clk_domain=system.cpu_clk_domain +hit_latency=20 +size=2097152 + [system.cpu.toL2Bus] type=CoherentBus -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain header_cycles=1 system=system use_default_range=false @@ -496,7 +527,7 @@ egid=100 env= errout=cerr euid=100 -executable=tests/test-progs/hello/bin/alpha/tru64/hello +executable=/dist/m5/regression/test-progs/hello/bin/alpha/tru64/hello gid=100 input=cin max_stack_size=67108864 @@ -507,10 +538,14 @@ simpoint=0 system=system uid=100 +[system.cpu_clk_domain] +type=SrcClockDomain +clock=500 +voltage_domain=system.voltage_domain + [system.membus] type=CoherentBus -block_size=64 -clock=1000 +clk_domain=system.clk_domain header_cycles=1 system=system use_default_range=false @@ -521,19 +556,24 @@ slave=system.system_port system.cpu.l2cache.mem_side [system.physmem] type=SimpleDRAM activation_limit=4 -addr_mapping=openmap +addr_mapping=RaBaChCo banks_per_rank=8 +burst_length=8 channels=1 -clock=1000 -conf_table_reported=false +clk_domain=system.clk_domain +conf_table_reported=true +device_bus_width=8 +device_rowbuffer_size=1024 +devices_per_rank=8 in_addr_map=true -lines_per_rowbuffer=32 mem_sched_policy=frfcfs null=false page_policy=open range=0:134217727 ranks_per_channel=2 read_buffer_size=32 +static_backend_latency=10000 +static_frontend_latency=10000 tBURST=5000 tCL=13750 tRCD=13750 @@ -544,6 +584,9 @@ tWTR=7500 tXAW=40000 write_buffer_size=32 write_thresh_perc=70 -zero=false port=system.membus.master[0] +[system.voltage_domain] +type=VoltageDomain +voltage=1.000000 + diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/simout b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/simout index 4ea05c228..c47a79c1f 100755 --- a/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/simout +++ b/tests/quick/se/00.hello/ref/alpha/tru64/o3-timing/simout @@ -3,12 +3,12 @@ Redirecting stderr to build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/o3-tim gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Mar 26 2013 14:38:52 -gem5 started Mar 26 2013 14:39:13 -gem5 executing on ribera.cs.wisc.edu +gem5 compiled Sep 24 2013 03:08:53 +gem5 started Sep 28 2013 03:05:27 +gem5 executing on zizzer command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/o3-timing -re tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/o3-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... info: Increasing stack size by one page. Hello world! -Exiting @ tick 9350000 because target called exit() +Exiting @ tick 11933500 because target called exit() diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/config.ini index 81a4de4d4..b66459c3a 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/config.ini @@ -8,9 +8,10 @@ time_sync_spin_threshold=100000000 [system] type=System -children=cpu membus physmem +children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain boot_osflags=a -clock=1000 +cache_line_size=64 +clk_domain=system.clk_domain init_param=0 kernel= load_addr_mask=1099511627775 @@ -29,12 +30,16 @@ work_end_exit_count=0 work_item_id=-1 system_port=system.membus.slave[0] +[system.clk_domain] +type=SrcClockDomain +clock=1000 +voltage_domain=system.voltage_domain + [system.cpu] type=AtomicSimpleCPU children=dtb interrupts isa itb tracer workload -branchPred=Null checker=Null -clock=500 +clk_domain=system.cpu_clk_domain cpu_id=0 do_checkpoint_insts=true do_quiesce=true @@ -53,6 +58,10 @@ max_loads_any_thread=0 numThreads=1 profile=0 progress_interval=0 +simpoint_interval=100000000 +simpoint_profile=false +simpoint_profile_file=simpoint.bb.gz +simpoint_start_insts= simulate_data_stalls=false simulate_inst_stalls=false switched_out=false @@ -88,7 +97,7 @@ egid=100 env= errout=cerr euid=100 -executable=tests/test-progs/hello/bin/alpha/tru64/hello +executable=/dist/m5/regression/test-progs/hello/bin/alpha/tru64/hello gid=100 input=cin max_stack_size=67108864 @@ -99,11 +108,16 @@ simpoint=0 system=system uid=100 +[system.cpu_clk_domain] +type=SrcClockDomain +clock=500 +voltage_domain=system.voltage_domain + [system.membus] type=CoherentBus -block_size=64 -clock=1000 +clk_domain=system.clk_domain header_cycles=1 +system=system use_default_range=false width=8 master=system.physmem.port @@ -112,13 +126,16 @@ slave=system.system_port system.cpu.icache_port system.cpu.dcache_port [system.physmem] type=SimpleMemory bandwidth=73.000000 -clock=1000 -conf_table_reported=false +clk_domain=system.clk_domain +conf_table_reported=true in_addr_map=true latency=30000 latency_var=0 null=false range=0:134217727 -zero=false port=system.membus.master[0] +[system.voltage_domain] +type=VoltageDomain +voltage=1.000000 + diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/simout b/tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/simout index d9d6fa90d..034bc5823 100755 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/simout +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-atomic/simout @@ -3,9 +3,9 @@ Redirecting stderr to build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jan 23 2013 13:29:14 -gem5 started Jan 23 2013 13:45:35 -gem5 executing on ribera.cs.wisc.edu +gem5 compiled Sep 24 2013 03:08:53 +gem5 started Sep 28 2013 03:05:27 +gem5 executing on zizzer command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-atomic -re tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-atomic Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini index 759014fd3..362eaad12 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/config.ini @@ -38,7 +38,6 @@ voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=clk_domain dtb interrupts isa itb tracer workload -branchPred=Null checker=Null clk_domain=system.cpu.clk_domain cpu_id=0 @@ -96,7 +95,7 @@ egid=100 env= errout=cerr euid=100 -executable=tests/test-progs/hello/bin/alpha/tru64/hello +executable=/dist/m5/regression/test-progs/hello/bin/alpha/tru64/hello gid=100 input=cin max_stack_size=67108864 diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats index 110acb8ec..1ce96a614 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/ruby.stats @@ -1,24 +1,24 @@ -Real time: Aug/29/2013 10:03:38 +Real time: Sep/22/2013 05:27:18 Profiler Stats -------------- -Elapsed_time_in_seconds: 0 -Elapsed_time_in_minutes: 0 -Elapsed_time_in_hours: 0 -Elapsed_time_in_days: 0 +Elapsed_time_in_seconds: 5 +Elapsed_time_in_minutes: 0.0833333 +Elapsed_time_in_hours: 0.00138889 +Elapsed_time_in_days: 5.78704e-05 -Virtual_time_in_seconds: 0.51 -Virtual_time_in_minutes: 0.0085 -Virtual_time_in_hours: 0.000141667 -Virtual_time_in_days: 5.90278e-06 +Virtual_time_in_seconds: 0.38 +Virtual_time_in_minutes: 0.00633333 +Virtual_time_in_hours: 0.000105556 +Virtual_time_in_days: 4.39815e-06 Ruby_current_time: 52575 Ruby_start_time: 0 Ruby_cycles: 52575 -mbytes_resident: 74.6133 -mbytes_total: 168.652 -resident_ratio: 0.442432 +mbytes_resident: 68.4688 +mbytes_total: 122.754 +resident_ratio: 0.557772 Busy Controller Counts: L1Cache-0:0 diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simerr b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simerr index 31ae36f2e..492f3e68f 100755 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simerr +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simerr @@ -1,3 +1,7 @@ +warn: rounding error > tolerance + 0.072760 rounded to 0 +warn: rounding error > tolerance + 0.072760 rounded to 0 warn: Sockets disabled, not accepting gdb connections warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) hack: be nice to actually delete the event here diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simout b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simout index b08e9f127..5722711d2 100755 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simout +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/simout @@ -3,9 +3,9 @@ Redirecting stderr to build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/00.hello gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 1 2012 14:01:54 -gem5 started Sep 1 2012 14:03:04 -gem5 executing on doudou.cs.wisc.edu +gem5 compiled Sep 22 2013 05:27:02 +gem5 started Sep 22 2013 05:27:13 +gem5 executing on zizzer command line: build/ALPHA_MESI_CMP_directory/gem5.opt -d build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MESI_CMP_directory -re tests/run.py build/ALPHA_MESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MESI_CMP_directory Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt index 784ed2300..5b945b27d 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MESI_CMP_directory/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000053 # Nu sim_ticks 52575 # Number of ticks simulated final_tick 52575 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 7067 # Simulator instruction rate (inst/s) -host_op_rate 7067 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 144167 # Simulator tick rate (ticks/s) -host_mem_usage 172704 # Number of bytes of host memory used -host_seconds 0.36 # Real time elapsed on the host +host_inst_rate 459 # Simulator instruction rate (inst/s) +host_op_rate 459 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 9361 # Simulator tick rate (ticks/s) +host_mem_usage 125832 # Number of bytes of host memory used +host_seconds 5.62 # Real time elapsed on the host sim_insts 2577 # Number of instructions simulated sim_ops 2577 # Number of ops (including micro ops) simulated system.ruby.l1_cntrl0.L1Dcache.demand_hits 437 # Number of cache demand hits @@ -100,6 +100,18 @@ system.ruby.network.routers3.msg_bytes.Response_Control::2 2176 system.ruby.network.routers3.msg_bytes.Writeback_Data::0 3384 system.ruby.network.routers3.msg_bytes.Writeback_Data::1 4464 system.ruby.network.routers3.msg_bytes.Writeback_Control::0 616 +system.ruby.network.msg_count.Control 3357 +system.ruby.network.msg_count.Request_Control 1293 +system.ruby.network.msg_count.Response_Data 3666 +system.ruby.network.msg_count.Response_Control 5220 +system.ruby.network.msg_count.Writeback_Data 327 +system.ruby.network.msg_count.Writeback_Control 231 +system.ruby.network.msg_byte.Control 26856 +system.ruby.network.msg_byte.Request_Control 10344 +system.ruby.network.msg_byte.Response_Data 263952 +system.ruby.network.msg_byte.Response_Control 41760 +system.ruby.network.msg_byte.Writeback_Data 23544 +system.ruby.network.msg_byte.Writeback_Control 1848 system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses system.cpu.dtb.fetch_acv 0 # ITB acv @@ -271,18 +283,6 @@ system.ruby.l1_cntrl0.IS.Data_Exclusive 204 0.00% 0.00% system.ruby.l1_cntrl0.IS.Data_all_Acks 300 0.00% 0.00% system.ruby.l1_cntrl0.IM.Data_all_Acks 68 0.00% 0.00% system.ruby.l1_cntrl0.M_I.WB_Ack 124 0.00% 0.00% -system.ruby.network.msg_count.Control 3357 -system.ruby.network.msg_count.Request_Control 1293 -system.ruby.network.msg_count.Response_Data 3666 -system.ruby.network.msg_count.Response_Control 5220 -system.ruby.network.msg_count.Writeback_Data 327 -system.ruby.network.msg_count.Writeback_Control 231 -system.ruby.network.msg_byte.Control 26856 -system.ruby.network.msg_byte.Request_Control 10344 -system.ruby.network.msg_byte.Response_Data 263952 -system.ruby.network.msg_byte.Response_Control 41760 -system.ruby.network.msg_byte.Writeback_Data 23544 -system.ruby.network.msg_byte.Writeback_Control 1848 system.ruby.l2_cntrl0.L1_GET_INSTR 300 0.00% 0.00% system.ruby.l2_cntrl0.L1_GETS 204 0.00% 0.00% system.ruby.l2_cntrl0.L1_GETX 68 0.00% 0.00% diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/config.ini index 3660a930a..1cc47929f 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/config.ini @@ -38,7 +38,6 @@ voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=clk_domain dtb interrupts isa itb tracer workload -branchPred=Null checker=Null clk_domain=system.cpu.clk_domain cpu_id=0 @@ -96,7 +95,7 @@ egid=100 env= errout=cerr euid=100 -executable=tests/test-progs/hello/bin/alpha/tru64/hello +executable=/dist/m5/regression/test-progs/hello/bin/alpha/tru64/hello gid=100 input=cin max_stack_size=67108864 diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/ruby.stats b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/ruby.stats index ccd8b498a..fb852a546 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/ruby.stats +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/ruby.stats @@ -1,24 +1,24 @@ -Real time: Aug/29/2013 10:04:53 +Real time: Sep/22/2013 05:36:30 Profiler Stats -------------- -Elapsed_time_in_seconds: 1 -Elapsed_time_in_minutes: 0.0166667 -Elapsed_time_in_hours: 0.000277778 -Elapsed_time_in_days: 1.15741e-05 +Elapsed_time_in_seconds: 7 +Elapsed_time_in_minutes: 0.116667 +Elapsed_time_in_hours: 0.00194444 +Elapsed_time_in_days: 8.10185e-05 -Virtual_time_in_seconds: 0.55 -Virtual_time_in_minutes: 0.00916667 -Virtual_time_in_hours: 0.000152778 -Virtual_time_in_days: 6.36574e-06 +Virtual_time_in_seconds: 0.39 +Virtual_time_in_minutes: 0.0065 +Virtual_time_in_hours: 0.000108333 +Virtual_time_in_days: 4.51389e-06 Ruby_current_time: 44968 Ruby_start_time: 0 Ruby_cycles: 44968 -mbytes_resident: 75.9648 -mbytes_total: 169.809 -resident_ratio: 0.447379 +mbytes_resident: 69.9375 +mbytes_total: 124.047 +resident_ratio: 0.563799 Busy Controller Counts: L1Cache-0:0 diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simerr b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simerr index 31ae36f2e..492f3e68f 100755 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simerr +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simerr @@ -1,3 +1,7 @@ +warn: rounding error > tolerance + 0.072760 rounded to 0 +warn: rounding error > tolerance + 0.072760 rounded to 0 warn: Sockets disabled, not accepting gdb connections warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) hack: be nice to actually delete the event here diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simout b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simout index 0eff99821..e2683dd74 100755 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simout +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/simout @@ -3,9 +3,9 @@ Redirecting stderr to build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hell gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 1 2012 14:10:16 -gem5 started Sep 1 2012 14:11:29 -gem5 executing on doudou.cs.wisc.edu +gem5 compiled Sep 22 2013 05:36:12 +gem5 started Sep 22 2013 05:36:23 +gem5 executing on zizzer command line: build/ALPHA_MOESI_CMP_directory/gem5.opt -d build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory -re tests/run.py build/ALPHA_MOESI_CMP_directory/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/stats.txt index 88933afb4..811c48f82 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_directory/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000045 # Nu sim_ticks 44968 # Number of ticks simulated final_tick 44968 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 10546 # Simulator instruction rate (inst/s) -host_op_rate 10545 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 183989 # Simulator tick rate (ticks/s) -host_mem_usage 174912 # Number of bytes of host memory used -host_seconds 0.24 # Real time elapsed on the host +host_inst_rate 423 # Simulator instruction rate (inst/s) +host_op_rate 423 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 7389 # Simulator tick rate (ticks/s) +host_mem_usage 127028 # Number of bytes of host memory used +host_seconds 6.09 # Real time elapsed on the host sim_insts 2577 # Number of instructions simulated sim_ops 2577 # Number of ops (including micro ops) simulated system.ruby.l1_cntrl0.L1Dcache.demand_hits 469 # Number of cache demand hits @@ -98,6 +98,18 @@ system.ruby.network.routers3.msg_bytes.Writeback_Control::0 8032 system.ruby.network.routers3.msg_bytes.Writeback_Control::1 6512 system.ruby.network.routers3.msg_bytes.Writeback_Control::2 2648 system.ruby.network.routers3.msg_bytes.Unblock_Control::2 7464 +system.ruby.network.msg_count.Request_Control 2799 +system.ruby.network.msg_count.Response_Data 2538 +system.ruby.network.msg_count.ResponseL2hit_Data 261 +system.ruby.network.msg_count.Writeback_Data 1734 +system.ruby.network.msg_count.Writeback_Control 6447 +system.ruby.network.msg_count.Unblock_Control 2798 +system.ruby.network.msg_byte.Request_Control 22392 +system.ruby.network.msg_byte.Response_Data 182736 +system.ruby.network.msg_byte.ResponseL2hit_Data 18792 +system.ruby.network.msg_byte.Writeback_Data 124848 +system.ruby.network.msg_byte.Writeback_Control 51576 +system.ruby.network.msg_byte.Unblock_Control 22384 system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses system.cpu.dtb.fetch_acv 0 # ITB acv @@ -276,18 +288,6 @@ system.ruby.l1_cntrl0.IM.Exclusive_Data 58 0.00% 0.00% system.ruby.l1_cntrl0.OM.All_acks 58 0.00% 0.00% system.ruby.l1_cntrl0.IS.Exclusive_Data 452 0.00% 0.00% system.ruby.l1_cntrl0.MI.Writeback_Ack_Data 502 0.00% 0.00% -system.ruby.network.msg_count.Request_Control 2799 -system.ruby.network.msg_count.Response_Data 2538 -system.ruby.network.msg_count.ResponseL2hit_Data 261 -system.ruby.network.msg_count.Writeback_Data 1734 -system.ruby.network.msg_count.Writeback_Control 6447 -system.ruby.network.msg_count.Unblock_Control 2798 -system.ruby.network.msg_byte.Request_Control 22392 -system.ruby.network.msg_byte.Response_Data 182736 -system.ruby.network.msg_byte.ResponseL2hit_Data 18792 -system.ruby.network.msg_byte.Writeback_Data 124848 -system.ruby.network.msg_byte.Writeback_Control 51576 -system.ruby.network.msg_byte.Unblock_Control 22384 system.ruby.l2_cntrl0.L1_GETS 454 0.00% 0.00% system.ruby.l2_cntrl0.L1_GETX 58 0.00% 0.00% system.ruby.l2_cntrl0.L1_PUTX 502 0.00% 0.00% diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/config.ini index 963916828..57448e3a7 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/config.ini @@ -38,7 +38,6 @@ voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=clk_domain dtb interrupts isa itb tracer workload -branchPred=Null checker=Null clk_domain=system.cpu.clk_domain cpu_id=0 @@ -96,7 +95,7 @@ egid=100 env= errout=cerr euid=100 -executable=tests/test-progs/hello/bin/alpha/tru64/hello +executable=/dist/m5/regression/test-progs/hello/bin/alpha/tru64/hello gid=100 input=cin max_stack_size=67108864 diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/ruby.stats b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/ruby.stats index 07281999c..95ae6441f 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/ruby.stats +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/ruby.stats @@ -1,24 +1,24 @@ -Real time: Aug/29/2013 10:04:45 +Real time: Sep/22/2013 05:45:04 Profiler Stats -------------- -Elapsed_time_in_seconds: 0 -Elapsed_time_in_minutes: 0 -Elapsed_time_in_hours: 0 -Elapsed_time_in_days: 0 +Elapsed_time_in_seconds: 4 +Elapsed_time_in_minutes: 0.0666667 +Elapsed_time_in_hours: 0.00111111 +Elapsed_time_in_days: 4.62963e-05 -Virtual_time_in_seconds: 0.5 -Virtual_time_in_minutes: 0.00833333 -Virtual_time_in_hours: 0.000138889 -Virtual_time_in_days: 5.78704e-06 +Virtual_time_in_seconds: 0.35 +Virtual_time_in_minutes: 0.00583333 +Virtual_time_in_hours: 9.72222e-05 +Virtual_time_in_days: 4.05093e-06 Ruby_current_time: 43073 Ruby_start_time: 0 Ruby_cycles: 43073 -mbytes_resident: 74.1172 -mbytes_total: 168.629 -resident_ratio: 0.439552 +mbytes_resident: 67.8711 +mbytes_total: 121.816 +resident_ratio: 0.557159 Busy Controller Counts: L1Cache-0:0 diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simerr b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simerr index 31ae36f2e..492f3e68f 100755 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simerr +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simerr @@ -1,3 +1,7 @@ +warn: rounding error > tolerance + 0.072760 rounded to 0 +warn: rounding error > tolerance + 0.072760 rounded to 0 warn: Sockets disabled, not accepting gdb connections warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) hack: be nice to actually delete the event here diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simout b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simout index f8e247e3b..76c77f4a5 100755 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simout +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/simout @@ -3,9 +3,9 @@ Redirecting stderr to build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/al gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 9 2012 13:38:07 -gem5 started Sep 9 2012 13:38:15 -gem5 executing on ribera.cs.wisc.edu +gem5 compiled Sep 22 2013 05:44:48 +gem5 started Sep 22 2013 05:45:00 +gem5 executing on zizzer command line: build/ALPHA_MOESI_CMP_token/gem5.opt -d build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_token -re tests/run.py build/ALPHA_MOESI_CMP_token/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_CMP_token Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt index 18f891852..c2d79012b 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_CMP_token/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000043 # Nu sim_ticks 43073 # Number of ticks simulated final_tick 43073 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 28702 # Simulator instruction rate (inst/s) -host_op_rate 28696 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 479543 # Simulator tick rate (ticks/s) -host_mem_usage 172680 # Number of bytes of host memory used -host_seconds 0.09 # Real time elapsed on the host +host_inst_rate 753 # Simulator instruction rate (inst/s) +host_op_rate 753 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 12587 # Simulator tick rate (ticks/s) +host_mem_usage 125800 # Number of bytes of host memory used +host_seconds 3.42 # Real time elapsed on the host sim_insts 2577 # Number of instructions simulated sim_ops 2577 # Number of ops (including micro ops) simulated system.ruby.l1_cntrl0.L1Dcache.demand_hits 461 # Number of cache demand hits @@ -82,6 +82,18 @@ system.ruby.network.routers3.msg_bytes.ResponseL2hit_Data::4 5040 system.ruby.network.routers3.msg_bytes.Response_Control::4 8 system.ruby.network.routers3.msg_bytes.Writeback_Data::4 42192 system.ruby.network.routers3.msg_bytes.Writeback_Control::4 2920 +system.ruby.network.msg_count.Request_Control 2916 +system.ruby.network.msg_count.Response_Data 1344 +system.ruby.network.msg_count.ResponseL2hit_Data 210 +system.ruby.network.msg_count.Response_Control 3 +system.ruby.network.msg_count.Writeback_Data 1758 +system.ruby.network.msg_count.Writeback_Control 1095 +system.ruby.network.msg_byte.Request_Control 23328 +system.ruby.network.msg_byte.Response_Data 96768 +system.ruby.network.msg_byte.ResponseL2hit_Data 15120 +system.ruby.network.msg_byte.Response_Control 24 +system.ruby.network.msg_byte.Writeback_Data 126576 +system.ruby.network.msg_byte.Writeback_Control 8760 system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses system.cpu.dtb.fetch_acv 0 # ITB acv @@ -230,18 +242,6 @@ system.ruby.l1_cntrl0.IM.Ack 1 0.00% 0.00% system.ruby.l1_cntrl0.SM.Data_All_Tokens 8 0.00% 0.00% system.ruby.l1_cntrl0.IS.Data_Shared 56 0.00% 0.00% system.ruby.l1_cntrl0.IS.Data_All_Tokens 396 0.00% 0.00% -system.ruby.network.msg_count.Request_Control 2916 -system.ruby.network.msg_count.Response_Data 1344 -system.ruby.network.msg_count.ResponseL2hit_Data 210 -system.ruby.network.msg_count.Response_Control 3 -system.ruby.network.msg_count.Writeback_Data 1758 -system.ruby.network.msg_count.Writeback_Control 1095 -system.ruby.network.msg_byte.Request_Control 23328 -system.ruby.network.msg_byte.Response_Data 96768 -system.ruby.network.msg_byte.ResponseL2hit_Data 15120 -system.ruby.network.msg_byte.Response_Control 24 -system.ruby.network.msg_byte.Writeback_Data 126576 -system.ruby.network.msg_byte.Writeback_Control 8760 system.ruby.l2_cntrl0.L1_GETS 448 0.00% 0.00% system.ruby.l2_cntrl0.L1_GETS_Last_Token 4 0.00% 0.00% system.ruby.l2_cntrl0.L1_GETX 66 0.00% 0.00% diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/config.ini index 88d0e9108..fed15fed0 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/config.ini @@ -38,7 +38,6 @@ voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=clk_domain dtb interrupts isa itb tracer workload -branchPred=Null checker=Null clk_domain=system.cpu.clk_domain cpu_id=0 @@ -96,7 +95,7 @@ egid=100 env= errout=cerr euid=100 -executable=tests/test-progs/hello/bin/alpha/tru64/hello +executable=/dist/m5/regression/test-progs/hello/bin/alpha/tru64/hello gid=100 input=cin max_stack_size=67108864 diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/ruby.stats b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/ruby.stats index 11219bf48..fa2e0f324 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/ruby.stats +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/ruby.stats @@ -1,4 +1,4 @@ -Real time: Aug/29/2013 10:02:56 +Real time: Sep/22/2013 05:17:49 Profiler Stats -------------- @@ -7,18 +7,18 @@ Elapsed_time_in_minutes: 0 Elapsed_time_in_hours: 0 Elapsed_time_in_days: 0 -Virtual_time_in_seconds: 0.71 -Virtual_time_in_minutes: 0.0118333 -Virtual_time_in_hours: 0.000197222 -Virtual_time_in_days: 8.21759e-06 +Virtual_time_in_seconds: 0.34 +Virtual_time_in_minutes: 0.00566667 +Virtual_time_in_hours: 9.44444e-05 +Virtual_time_in_days: 3.93519e-06 Ruby_current_time: 35432 Ruby_start_time: 0 Ruby_cycles: 35432 -mbytes_resident: 74.0898 -mbytes_total: 168.559 -resident_ratio: 0.439573 +mbytes_resident: 67.9453 +mbytes_total: 122.797 +resident_ratio: 0.553315 Busy Controller Counts: L1Cache-0:0 diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simerr b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simerr index 31ae36f2e..492f3e68f 100755 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simerr +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simerr @@ -1,3 +1,7 @@ +warn: rounding error > tolerance + 0.072760 rounded to 0 +warn: rounding error > tolerance + 0.072760 rounded to 0 warn: Sockets disabled, not accepting gdb connections warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) hack: be nice to actually delete the event here diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simout b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simout index 8fae8fc4c..fa7b05ab3 100755 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simout +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/simout @@ -3,9 +3,9 @@ Redirecting stderr to build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Sep 1 2012 13:53:26 -gem5 started Sep 1 2012 13:54:34 -gem5 executing on doudou.cs.wisc.edu +gem5 compiled Sep 22 2013 05:17:28 +gem5 started Sep 22 2013 05:17:49 +gem5 executing on zizzer command line: build/ALPHA_MOESI_hammer/gem5.opt -d build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_hammer -re tests/run.py build/ALPHA_MOESI_hammer/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby-MOESI_hammer Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt index f2e316805..f43282687 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby-MOESI_hammer/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000035 # Nu sim_ticks 35432 # Number of ticks simulated final_tick 35432 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 6072 # Simulator instruction rate (inst/s) -host_op_rate 6072 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 83479 # Simulator tick rate (ticks/s) -host_mem_usage 172608 # Number of bytes of host memory used -host_seconds 0.42 # Real time elapsed on the host +host_inst_rate 19167 # Simulator instruction rate (inst/s) +host_op_rate 19165 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 263474 # Simulator tick rate (ticks/s) +host_mem_usage 125748 # Number of bytes of host memory used +host_seconds 0.13 # Real time elapsed on the host sim_insts 2577 # Number of instructions simulated sim_ops 2577 # Number of ops (including micro ops) simulated system.ruby.l1_cntrl0.L1Dcache.demand_hits 469 # Number of cache demand hits @@ -82,6 +82,16 @@ system.ruby.network.routers2.msg_bytes.Writeback_Control::2 3400 system.ruby.network.routers2.msg_bytes.Writeback_Control::3 3400 system.ruby.network.routers2.msg_bytes.Writeback_Control::5 2752 system.ruby.network.routers2.msg_bytes.Unblock_Control::5 3520 +system.ruby.network.msg_count.Request_Control 1323 +system.ruby.network.msg_count.Response_Data 1323 +system.ruby.network.msg_count.Writeback_Data 243 +system.ruby.network.msg_count.Writeback_Control 3582 +system.ruby.network.msg_count.Unblock_Control 1320 +system.ruby.network.msg_byte.Request_Control 10584 +system.ruby.network.msg_byte.Response_Data 95256 +system.ruby.network.msg_byte.Writeback_Data 17496 +system.ruby.network.msg_byte.Writeback_Control 28656 +system.ruby.network.msg_byte.Unblock_Control 10560 system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses system.cpu.dtb.fetch_acv 0 # ITB acv @@ -226,16 +236,6 @@ system.ruby.l1_cntrl0.MI.Store 4 0.00% 0.00% system.ruby.l1_cntrl0.MI.Writeback_Ack 425 0.00% 0.00% system.ruby.l1_cntrl0.MT.Complete_L2_to_L1 45 0.00% 0.00% system.ruby.l1_cntrl0.MMT.Complete_L2_to_L1 24 0.00% 0.00% -system.ruby.network.msg_count.Request_Control 1323 -system.ruby.network.msg_count.Response_Data 1323 -system.ruby.network.msg_count.Writeback_Data 243 -system.ruby.network.msg_count.Writeback_Control 3582 -system.ruby.network.msg_count.Unblock_Control 1320 -system.ruby.network.msg_byte.Request_Control 10584 -system.ruby.network.msg_byte.Response_Data 95256 -system.ruby.network.msg_byte.Writeback_Data 17496 -system.ruby.network.msg_byte.Writeback_Control 28656 -system.ruby.network.msg_byte.Unblock_Control 10560 system.ruby.dir_cntrl0.GETX 51 0.00% 0.00% system.ruby.dir_cntrl0.GETS 410 0.00% 0.00% system.ruby.dir_cntrl0.PUT 425 0.00% 0.00% diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/config.ini index 222831dad..56f1e35ca 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/config.ini @@ -38,7 +38,6 @@ voltage_domain=system.voltage_domain [system.cpu] type=TimingSimpleCPU children=clk_domain dtb interrupts isa itb tracer workload -branchPred=Null checker=Null clk_domain=system.cpu.clk_domain cpu_id=0 @@ -96,7 +95,7 @@ egid=100 env= errout=cerr euid=100 -executable=tests/test-progs/hello/bin/alpha/tru64/hello +executable=/dist/m5/regression/test-progs/hello/bin/alpha/tru64/hello gid=100 input=cin max_stack_size=67108864 diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/ruby.stats b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/ruby.stats index 4a527e28b..dcfc1172a 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/ruby.stats +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/ruby.stats @@ -1,24 +1,24 @@ -Real time: Aug/29/2013 10:03:45 +Real time: Sep/28/2013 03:05:38 Profiler Stats -------------- -Elapsed_time_in_seconds: 19 -Elapsed_time_in_minutes: 0.316667 -Elapsed_time_in_hours: 0.00527778 -Elapsed_time_in_days: 0.000219907 +Elapsed_time_in_seconds: 0 +Elapsed_time_in_minutes: 0 +Elapsed_time_in_hours: 0 +Elapsed_time_in_days: 0 -Virtual_time_in_seconds: 0.51 -Virtual_time_in_minutes: 0.0085 -Virtual_time_in_hours: 0.000141667 -Virtual_time_in_days: 5.90278e-06 +Virtual_time_in_seconds: 0.33 +Virtual_time_in_minutes: 0.0055 +Virtual_time_in_hours: 9.16667e-05 +Virtual_time_in_days: 3.81944e-06 Ruby_current_time: 52498 Ruby_start_time: 0 Ruby_cycles: 52498 -mbytes_resident: 73.0898 -mbytes_total: 167.129 -resident_ratio: 0.43735 +mbytes_resident: 66.7812 +mbytes_total: 121.352 +resident_ratio: 0.550312 Busy Controller Counts: L1Cache-0:0 diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/simerr b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/simerr index 3bd6641db..492f3e68f 100755 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/simerr +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/simerr @@ -1,6 +1,6 @@ -Warning: rounding error > tolerance +warn: rounding error > tolerance 0.072760 rounded to 0 -Warning: rounding error > tolerance +warn: rounding error > tolerance 0.072760 rounded to 0 warn: Sockets disabled, not accepting gdb connections warn: ignoring syscall sigprocmask(18446744073709547831, 1, ...) diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/simout b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/simout index 8e744dee3..980ebae91 100755 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/simout +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/simout @@ -3,9 +3,9 @@ Redirecting stderr to build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jan 23 2013 13:29:14 -gem5 started Jan 23 2013 13:29:25 -gem5 executing on ribera.cs.wisc.edu +gem5 compiled Sep 24 2013 03:08:53 +gem5 started Sep 28 2013 03:05:38 +gem5 executing on zizzer command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby -re tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing-ruby Global frequency set at 1000000000 ticks per second info: Entering event queue @ 0. Starting simulation... diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/stats.txt b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/stats.txt index 892e92009..2e221d41c 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/stats.txt +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing-ruby/stats.txt @@ -4,11 +4,11 @@ sim_seconds 0.000052 # Nu sim_ticks 52498 # Number of ticks simulated final_tick 52498 # Number of ticks from beginning of simulation (restored from checkpoints and never reset) sim_freq 1000000000 # Frequency of simulated ticks -host_inst_rate 139 # Simulator instruction rate (inst/s) -host_op_rate 139 # Simulator op (including micro ops) rate (op/s) -host_tick_rate 2832 # Simulator tick rate (ticks/s) -host_mem_usage 171144 # Number of bytes of host memory used -host_seconds 18.54 # Real time elapsed on the host +host_inst_rate 20624 # Simulator instruction rate (inst/s) +host_op_rate 20621 # Simulator op (including micro ops) rate (op/s) +host_tick_rate 420021 # Simulator tick rate (ticks/s) +host_mem_usage 124268 # Number of bytes of host memory used +host_seconds 0.13 # Real time elapsed on the host sim_insts 2577 # Number of instructions simulated sim_ops 2577 # Number of ops (including micro ops) simulated system.ruby.l1_cntrl0.cacheMemory.demand_hits 2668 # Number of cache demand hits @@ -55,6 +55,14 @@ system.ruby.network.routers2.msg_bytes.Control::2 5008 system.ruby.network.routers2.msg_bytes.Data::2 44784 system.ruby.network.routers2.msg_bytes.Response_Data::4 45072 system.ruby.network.routers2.msg_bytes.Writeback_Control::3 4976 +system.ruby.network.msg_count.Control 1878 +system.ruby.network.msg_count.Data 1866 +system.ruby.network.msg_count.Response_Data 1878 +system.ruby.network.msg_count.Writeback_Control 1866 +system.ruby.network.msg_byte.Control 15024 +system.ruby.network.msg_byte.Data 134352 +system.ruby.network.msg_byte.Response_Data 135216 +system.ruby.network.msg_byte.Writeback_Control 14928 system.cpu.dtb.fetch_hits 0 # ITB hits system.cpu.dtb.fetch_misses 0 # ITB misses system.cpu.dtb.fetch_acv 0 # ITB acv @@ -156,14 +164,6 @@ system.ruby.l1_cntrl0.M.Replacement 622 0.00% 0.00% system.ruby.l1_cntrl0.MI.Writeback_Ack 622 0.00% 0.00% system.ruby.l1_cntrl0.IS.Data 542 0.00% 0.00% system.ruby.l1_cntrl0.IM.Data 84 0.00% 0.00% -system.ruby.network.msg_count.Control 1878 -system.ruby.network.msg_count.Data 1866 -system.ruby.network.msg_count.Response_Data 1878 -system.ruby.network.msg_count.Writeback_Control 1866 -system.ruby.network.msg_byte.Control 15024 -system.ruby.network.msg_byte.Data 134352 -system.ruby.network.msg_byte.Response_Data 135216 -system.ruby.network.msg_byte.Writeback_Control 14928 system.ruby.dir_cntrl0.GETX 626 0.00% 0.00% system.ruby.dir_cntrl0.PUTX 622 0.00% 0.00% system.ruby.dir_cntrl0.Memory_Data 626 0.00% 0.00% diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/config.ini b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/config.ini index adb7f583e..81f228137 100644 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/config.ini +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/config.ini @@ -8,9 +8,10 @@ time_sync_spin_threshold=100000000 [system] type=System -children=cpu membus physmem +children=clk_domain cpu cpu_clk_domain membus physmem voltage_domain boot_osflags=a -clock=1000 +cache_line_size=64 +clk_domain=system.clk_domain init_param=0 kernel= load_addr_mask=1099511627775 @@ -29,12 +30,16 @@ work_end_exit_count=0 work_item_id=-1 system_port=system.membus.slave[0] +[system.clk_domain] +type=SrcClockDomain +clock=1000 +voltage_domain=system.voltage_domain + [system.cpu] type=TimingSimpleCPU children=dcache dtb icache interrupts isa itb l2cache toL2Bus tracer workload -branchPred=Null checker=Null -clock=500 +clk_domain=system.cpu_clk_domain cpu_id=0 do_checkpoint_insts=true do_quiesce=true @@ -52,6 +57,7 @@ max_loads_any_thread=0 numThreads=1 profile=0 progress_interval=0 +simpoint_start_insts= switched_out=false system=system tracer=system.cpu.tracer @@ -61,10 +67,10 @@ icache_port=system.cpu.icache.cpu_side [system.cpu.dcache] type=BaseCache +children=tags addr_ranges=0:18446744073709551615 assoc=2 -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain forward_snoops=true hit_latency=2 is_top_level=true @@ -75,22 +81,31 @@ prefetcher=Null response_latency=2 size=262144 system=system +tags=system.cpu.dcache.tags tgts_per_mshr=20 two_queue=false write_buffers=8 cpu_side=system.cpu.dcache_port mem_side=system.cpu.toL2Bus.slave[1] +[system.cpu.dcache.tags] +type=LRU +assoc=2 +block_size=64 +clk_domain=system.cpu_clk_domain +hit_latency=2 +size=262144 + [system.cpu.dtb] type=AlphaTLB size=64 [system.cpu.icache] type=BaseCache +children=tags addr_ranges=0:18446744073709551615 assoc=2 -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain forward_snoops=true hit_latency=2 is_top_level=true @@ -101,12 +116,21 @@ prefetcher=Null response_latency=2 size=131072 system=system +tags=system.cpu.icache.tags tgts_per_mshr=20 two_queue=false write_buffers=8 cpu_side=system.cpu.icache_port mem_side=system.cpu.toL2Bus.slave[0] +[system.cpu.icache.tags] +type=LRU +assoc=2 +block_size=64 +clk_domain=system.cpu_clk_domain +hit_latency=2 +size=131072 + [system.cpu.interrupts] type=AlphaInterrupts @@ -119,10 +143,10 @@ size=48 [system.cpu.l2cache] type=BaseCache +children=tags addr_ranges=0:18446744073709551615 assoc=8 -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain forward_snoops=true hit_latency=20 is_top_level=false @@ -133,17 +157,26 @@ prefetcher=Null response_latency=20 size=2097152 system=system +tags=system.cpu.l2cache.tags tgts_per_mshr=12 two_queue=false write_buffers=8 cpu_side=system.cpu.toL2Bus.master[0] mem_side=system.membus.slave[1] +[system.cpu.l2cache.tags] +type=LRU +assoc=8 +block_size=64 +clk_domain=system.cpu_clk_domain +hit_latency=20 +size=2097152 + [system.cpu.toL2Bus] type=CoherentBus -block_size=64 -clock=500 +clk_domain=system.cpu_clk_domain header_cycles=1 +system=system use_default_range=false width=32 master=system.cpu.l2cache.cpu_side @@ -160,7 +193,7 @@ egid=100 env= errout=cerr euid=100 -executable=tests/test-progs/hello/bin/alpha/tru64/hello +executable=/dist/m5/regression/test-progs/hello/bin/alpha/tru64/hello gid=100 input=cin max_stack_size=67108864 @@ -171,11 +204,16 @@ simpoint=0 system=system uid=100 +[system.cpu_clk_domain] +type=SrcClockDomain +clock=500 +voltage_domain=system.voltage_domain + [system.membus] type=CoherentBus -block_size=64 -clock=1000 +clk_domain=system.clk_domain header_cycles=1 +system=system use_default_range=false width=8 master=system.physmem.port @@ -184,13 +222,16 @@ slave=system.system_port system.cpu.l2cache.mem_side [system.physmem] type=SimpleMemory bandwidth=73.000000 -clock=1000 -conf_table_reported=false +clk_domain=system.clk_domain +conf_table_reported=true in_addr_map=true latency=30000 latency_var=0 null=false range=0:134217727 -zero=false port=system.membus.master[0] +[system.voltage_domain] +type=VoltageDomain +voltage=1.000000 + diff --git a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/simout b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/simout index d3b147605..f5b60c70f 100755 --- a/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/simout +++ b/tests/quick/se/00.hello/ref/alpha/tru64/simple-timing/simout @@ -3,9 +3,9 @@ Redirecting stderr to build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple gem5 Simulator System. http://gem5.org gem5 is copyrighted software; use the --copyright option for details. -gem5 compiled Jan 23 2013 13:29:14 -gem5 started Jan 23 2013 13:46:30 -gem5 executing on ribera.cs.wisc.edu +gem5 compiled Sep 24 2013 03:08:53 +gem5 started Sep 28 2013 03:05:38 +gem5 executing on zizzer command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing -re tests/run.py build/ALPHA/tests/opt/quick/se/00.hello/alpha/tru64/simple-timing Global frequency set at 1000000000000 ticks per second info: Entering event queue @ 0. Starting simulation... |