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| author | Geoffrey Blake <geoffrey.blake@arm.com> | 2012-03-09 09:59:28 -0500 |
|---|---|---|
| committer | Geoffrey Blake <geoffrey.blake@arm.com> | 2012-03-09 09:59:28 -0500 |
| commit | da0d67c3d6468bedae93d14a9b7461e2b9d7a645 (patch) | |
| tree | cc450e9463d24939d2482b8135f7473c5d15acc2 /tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout | |
| parent | 98cf57fb89b76a8ca423083d52cc647c7923fe51 (diff) | |
| download | gem5-da0d67c3d6468bedae93d14a9b7461e2b9d7a645.tar.xz | |
CheckerCPU: Make some basic regression tests for CheckerCPU
Adds regression tests for the CheckerCPU. ARM ISA support
only at this point.
Diffstat (limited to 'tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout')
| -rwxr-xr-x | tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout new file mode 100755 index 000000000..5166f789f --- /dev/null +++ b/tests/quick/se/00.hello/ref/arm/linux/o3-timing-checker/simout @@ -0,0 +1,11 @@ +gem5 Simulator System. http://gem5.org +gem5 is copyrighted software; use the --copyright option for details. + +gem5 compiled Mar 7 2012 20:12:09 +gem5 started Mar 7 2012 20:12:14 +gem5 executing on zizzer +command line: build/ARM/gem5.fast -d build/ARM/tests/fast/quick/se/00.hello/arm/linux/o3-timing-checker -re tests/run.py build/ARM/tests/fast/quick/se/00.hello/arm/linux/o3-timing-checker +Global frequency set at 1000000000000 ticks per second +info: Entering event queue @ 0. Starting simulation... +Hello world! +Exiting @ tick 10389500 because target called exit() |