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author | Steve Reinhardt <steve.reinhardt@amd.com> | 2015-04-22 20:22:29 -0700 |
---|---|---|
committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2015-04-22 20:22:29 -0700 |
commit | 0cf36d94095aedef3c51447243c5a3cc14dd5d56 (patch) | |
tree | c0ed9e35fbbc5512f7fedf2947d4ae2702214f8e /tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini | |
parent | a70a83155bfe4c3877894c29f9dea720beb40f9c (diff) | |
download | gem5-0cf36d94095aedef3c51447243c5a3cc14dd5d56.tar.xz |
stats: update for previous changeset
Very small differences in IQ-specific O3 stats.
Diffstat (limited to 'tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini')
-rw-r--r-- | tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini | 10 |
1 files changed, 3 insertions, 7 deletions
diff --git a/tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini b/tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini index 8f050d759..d0a6f1772 100644 --- a/tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini +++ b/tests/quick/se/00.hello/ref/arm/linux/o3-timing/config.ini @@ -136,7 +136,7 @@ dcache_port=system.cpu.dcache.cpu_side icache_port=system.cpu.icache.cpu_side [system.cpu.branchPred] -type=BranchPredictor +type=BiModeBP BTBEntries=2048 BTBTagSize=18 RASSize=16 @@ -146,11 +146,7 @@ eventq_index=0 globalCtrBits=2 globalPredictorSize=8192 instShiftAmt=2 -localCtrBits=2 -localHistoryTableSize=2048 -localPredictorSize=2048 numThreads=1 -predType=bi-mode [system.cpu.dcache] type=BaseCache @@ -502,7 +498,7 @@ assoc=2 clk_domain=system.cpu_clk_domain demand_mshr_reserve=1 eventq_index=0 -forward_snoops=true +forward_snoops=false hit_latency=1 is_top_level=true max_miss_count=0 @@ -695,7 +691,7 @@ env= errout=cerr euid=100 eventq_index=0 -executable=/scratch/nilay/GEM5/gem5/tests/test-progs/hello/bin/arm/linux/hello +executable=/home/stever/hg/m5sim.org/gem5/tests/test-progs/hello/bin/arm/linux/hello gid=100 input=cin kvmInSE=false |